xref: /freebsd/sys/cddl/dev/dtrace/riscv/dtrace_asm.S (revision af23369a6deaaeb612ab266eb88b8bb8d560c322) 
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 *
22 * Portions Copyright 2016 Ruslan Bukin <br@bsdpad.com>
23 *
24 * $FreeBSD$
25 */
26/*
27 * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
28 * Use is subject to license terms.
29 */
30
31#define _ASM
32#define _LOCORE
33
34#include <sys/cpuvar_defs.h>
35#include <sys/dtrace.h>
36
37#include <machine/riscvreg.h>
38#include <machine/asm.h>
39
40#include "assym.inc"
41
42/*
43void dtrace_membar_producer(void)
44*/
45ENTRY(dtrace_membar_producer)
46	RET
47END(dtrace_membar_producer)
48
49/*
50void dtrace_membar_consumer(void)
51*/
52ENTRY(dtrace_membar_consumer)
53	RET
54END(dtrace_membar_consumer)
55
56/*
57dtrace_icookie_t dtrace_interrupt_disable(void)
58*/
59ENTRY(dtrace_interrupt_disable)
60	csrrci	a0, sstatus, (SSTATUS_SIE)
61	andi	a0, a0, (SSTATUS_SIE)
62	RET
63END(dtrace_interrupt_disable)
64
65/*
66void dtrace_interrupt_enable(dtrace_icookie_t cookie)
67*/
68ENTRY(dtrace_interrupt_enable)
69	csrs	sstatus, a0
70	RET
71END(dtrace_interrupt_enable)
72/*
73uint8_t
74dtrace_fuword8_nocheck(void *addr)
75*/
76ENTRY(dtrace_fuword8_nocheck)
77	ENTER_USER_ACCESS(t0)
78	lb	a0, 0(a0)
79	EXIT_USER_ACCESS(t0)
80	RET
81END(dtrace_fuword8_nocheck)
82
83/*
84uint16_t
85dtrace_fuword16_nocheck(void *addr)
86*/
87ENTRY(dtrace_fuword16_nocheck)
88	ENTER_USER_ACCESS(t0)
89	lh	a0, 0(a0)
90	EXIT_USER_ACCESS(t0)
91	RET
92END(dtrace_fuword16_nocheck)
93
94/*
95uint32_t
96dtrace_fuword32_nocheck(void *addr)
97*/
98ENTRY(dtrace_fuword32_nocheck)
99	ENTER_USER_ACCESS(t0)
100	lw	a0, 0(a0)
101	EXIT_USER_ACCESS(t0)
102	RET
103END(dtrace_fuword32_nocheck)
104
105/*
106uint64_t
107dtrace_fuword64_nocheck(void *addr)
108*/
109ENTRY(dtrace_fuword64_nocheck)
110	ENTER_USER_ACCESS(t0)
111	ld	a0, 0(a0)
112	EXIT_USER_ACCESS(t0)
113	RET
114END(dtrace_fuword64_nocheck)
115
116/*
117void
118dtrace_copy(uintptr_t uaddr, uintptr_t kaddr, size_t size)
119*/
120ENTRY(dtrace_copy)
121	beqz	a2, 2f		/* If len == 0 then skip loop */
122	ENTER_USER_ACCESS(t0)
1231:
124	lb	a4, 0(a0)	/* Load from uaddr */
125	addi	a0, a0, 1
126	sb	a4, 0(a1)	/* Store in kaddr */
127	addi	a1, a1, 1
128	addi	a2, a2, -1	/* len-- */
129	bnez	a2, 1b
130	EXIT_USER_ACCESS(t0)
1312:
132	RET
133END(dtrace_copy)
134
135/*
136void
137dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size,
138    volatile uint16_t *flags)
139XXX: Check for flags?
140*/
141ENTRY(dtrace_copystr)
142	beqz	a2, 3f		/* If len == 0 then skip loop */
143	ENTER_USER_ACCESS(t0)
1441:
145	lb	a4, 0(a0)	/* Load from uaddr */
146	addi	a0, a0, 1
147	sb	a4, 0(a1)	/* Store in kaddr */
148	addi	a1, a1, 1
149	beqz	a4, 2f		/* If == 0 then break */
150	addi	a2, a2, -1	/* len-- */
151	bnez	a2, 1b
1522:
153	EXIT_USER_ACCESS(t0)
1543:
155	RET
156END(dtrace_copystr)
157
158/*
159uintptr_t
160dtrace_caller(int aframes)
161*/
162ENTRY(dtrace_caller)
163	li	a0, -1
164	RET
165END(dtrace_caller)
166
167/*
168uint32_t
169dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new)
170*/
171ENTRY(dtrace_cas32)
1721:	lr.w	a3, 0(a0)	/* Load target */
173	bne	a3, a1, 2f	/* *target != cmp ? return */
174	sc.w	a4, a2, 0(a0)	/* Store new to target */
175	bnez	a4, 1b		/* Try again if store not succeed */
1762:	mv	a0, a3		/* Return the value loaded from target */
177	RET
178END(dtrace_cas32)
179
180/*
181void *
182dtrace_casptr(volatile void *target, volatile void *cmp, volatile void *new)
183*/
184ENTRY(dtrace_casptr)
1851:	lr.d	a3, 0(a0)	/* Load target */
186	bne	a3, a1, 2f	/* *target != cmp ? return */
187	sc.d	a4, a2, 0(a0)	/* Store new to target */
188	bnez	a4, 1b		/* Try again if store not succeed */
1892:	mv	a0, a3		/* Return the value loaded from target */
190	RET
191END(dtrace_casptr)
192