1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 * 22 * $FreeBSD$ 23 */ 24/* 25 * Copyright 2004 Sun Microsystems, Inc. All rights reserved. 26 * Use is subject to license terms. 27 */ 28 29#include "assym.s" 30 31#define _ASM 32 33#include <sys/cpuvar_defs.h> 34#include <sys/dtrace.h> 35 36#include <machine/asm.h> 37/* 38#include <machine/cpu.h> 39*/ 40 41/* 42 * Primitives 43 */ 44 45 .text 46 47/* 48void dtrace_membar_producer(void) 49*/ 50ASENTRY_NOPROF(dtrace_membar_producer) 51 blr 52END(dtrace_membar_producer) 53 54/* 55void dtrace_membar_consumer(void) 56*/ 57ASENTRY_NOPROF(dtrace_membar_consumer) 58 blr 59END(dtrace_membar_consumer) 60 61/* 62dtrace_icookie_t dtrace_interrupt_disable(void) 63*/ 64ASENTRY_NOPROF(dtrace_interrupt_disable) 65 mfmsr %r3 66 andi. %r0,%r3,~PSL_EE@l 67 mtmsr %r0 68 blr 69END(dtrace_interrupt_disable) 70 71/* 72void dtrace_interrupt_enable(dtrace_icookie_t cookie) 73*/ 74ASENTRY_NOPROF(dtrace_interrupt_enable) 75 mtmsr %r3 76 blr 77END(dtrace_interrupt_enable) 78 79/* 80uint32_t dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new) 81*/ 82ASENTRY_NOPROF(dtrace_cas32) 831: 84 lwarx %r0,0,%r3 85 cmpw %r4,%r0 86 bne 2f 87 stwcx. %r5,0,%r3 88 bne 1b 892: mr %r3,%r0 90 blr 91END(dtrace_cas32) 92 93/* 94void * 95dtrace_casptr(void *target, void *cmp, void *new) 96*/ 97ASENTRY_NOPROF(dtrace_casptr) 981: 99 lwarx %r0,0,%r3 100 cmpw %r4,%r0 101 bne 2f 102 stwcx. %r5,0,%r3 103 bne 1b 1042: mr %r3,%r0 105 blr 106END(dtrace_casptr) 107 108 109/* 110uintptr_t 111dtrace_fulword(void *addr) 112*/ 113ASENTRY_NOPROF(dtrace_fulword) 114END(dtrace_fulword) 115 116/* 117uint8_t 118dtrace_fuword8_nocheck(void *addr) 119*/ 120ASENTRY_NOPROF(dtrace_fuword8_nocheck) 121 lbz %r3,0(%r3) 122 blr 123END(dtrace_fuword8_nocheck) 124 125/* 126uint16_t 127dtrace_fuword16_nocheck(void *addr) 128*/ 129ASENTRY_NOPROF(dtrace_fuword16_nocheck) 130 lhz %r3,0(%r3) 131 blr 132END(dtrace_fuword16_nocheck) 133 134/* 135uint32_t 136dtrace_fuword32_nocheck(void *addr) 137*/ 138ASENTRY_NOPROF(dtrace_fuword32_nocheck) 139 lwz %r3,0(%r3) 140 blr 141END(dtrace_fuword32_nocheck) 142 143/* 144uint64_t 145dtrace_fuword64_nocheck(void *addr) 146*/ 147ASENTRY_NOPROF(dtrace_fuword64_nocheck) 148#if defined(__powerpc64__) 149 ld %r3,0(%r3) 150#else 151 lwz %r5,0(%r3) 152 lwz %r4,4(%r3) 153 mr %r3,%r5 154#endif 155 blr 156END(dtrace_fuword64_nocheck) 157 158/* 159XXX: unoptimized 160void 161dtrace_copy(uintptr_t src, uintptr_t dest, size_t size) 162*/ 163ASENTRY_NOPROF(dtrace_copy) 164 addme %r7,%r3 165 addme %r8,%r4 1661: 167 lbzu %r3,1(%r7) 168 stbu %r3,1(%r8) 169 addme %r5,%r5 170 beq 2f 1712: 172 blr 173END(dtrace_copy) 174 175/* 176void 177dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size, 178 volatile uint16_t *flags) 179*/ 180ASENTRY_NOPROF(dtrace_copystr) 181 addme %r7,%r3 182 addme %r8,%r4 1831: 184 lbzu %r3,1(%r7) 185 stbu %r3,1(%r8) 186 addme %r5,%r5 187 beq 2f 188 or %r3,%r3,%r3 189 beq 2f 190 andi. %r0,%r5,0x0fff 191 beq 2f 192 lwz %r0,0(%r6) 193 andi. %r0,%r0,CPU_DTRACE_BADADDR 194 beq 1b 1952: 196 blr 197END(dtrace_copystr) 198 199/* 200void dtrace_invop_init(void) 201*/ 202ASENTRY_NOPROF(dtrace_invop_init) 203 /* XXX: impement it properly -- implement dtrace_invop_start */ 204 li %r0,0 205 li %r3,dtrace_invop_jump_addr@l 206 addis %r3,%r3,dtrace_invop_jump_addr@ha 207 stw %r0,0(%r3) 208 blr 209END(dtrace_invop_init) 210 211/* 212void dtrace_invop_uninit(void) 213*/ 214ASENTRY_NOPROF(dtrace_invop_uninit) 215 li %r0,0 216 li %r3,dtrace_invop_jump_addr@l 217 addis %r3,%r3,dtrace_invop_jump_addr@ha 218 stw %r0,0(%r3) 219 blr 220END(dtrace_invop_uninit) 221 222/* 223 * The panic() and cmn_err() functions invoke vpanic() as a common entry point 224 * into the panic code implemented in panicsys(). vpanic() is responsible 225 * for passing through the format string and arguments, and constructing a 226 * regs structure on the stack into which it saves the current register 227 * values. If we are not dying due to a fatal trap, these registers will 228 * then be preserved in panicbuf as the current processor state. Before 229 * invoking panicsys(), vpanic() activates the first panic trigger (see 230 * common/os/panic.c) and switches to the panic_stack if successful. Note that 231 * DTrace takes a slightly different panic path if it must panic from probe 232 * context. Instead of calling panic, it calls into dtrace_vpanic(), which 233 * sets up the initial stack as vpanic does, calls dtrace_panic_trigger(), and 234 * branches back into vpanic(). 235 */ 236 237/* 238void 239vpanic(const char *format, va_list alist) 240*/ 241ASENTRY_NOPROF(vpanic) /* Initial stack layout: */ 242 243vpanic_common: 244 blr 245END(vpanic) 246 247 248 249/* 250void 251dtrace_vpanic(const char *format, va_list alist) 252*/ 253ASENTRY_NOPROF(dtrace_vpanic) /* Initial stack layout: */ 254 255#if 0 256 bl dtrace_panic_trigger /* %eax = dtrace_panic_trigger() */ 257#endif 258 b vpanic_common 259END(dtrace_vpanic) 260 261/* 262uintptr_t 263dtrace_caller(int aframes) 264*/ 265ASENTRY_NOPROF(dtrace_caller) 266 li %r3, -1 267 blr 268END(dtrace_caller) 269 270