1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 * 22 */ 23 /* 24 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 25 * Use is subject to license terms. 26 */ 27 28 /* 29 * Copyright (c) 2011, Joyent, Inc. All rights reserved. 30 */ 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/msan.h> 37 #include <sys/proc.h> 38 #include <sys/smp.h> 39 #include <sys/dtrace_impl.h> 40 #include <sys/dtrace_bsd.h> 41 #include <cddl/dev/dtrace/dtrace_cddl.h> 42 #include <machine/clock.h> 43 #include <machine/cpufunc.h> 44 #include <machine/frame.h> 45 #include <machine/md_var.h> 46 #include <machine/psl.h> 47 #include <machine/trap.h> 48 #include <vm/pmap.h> 49 50 extern void dtrace_getnanotime(struct timespec *tsp); 51 extern int (*dtrace_invop_jump_addr)(struct trapframe *); 52 53 int dtrace_invop(uintptr_t, struct trapframe *, void **); 54 int dtrace_invop_start(struct trapframe *frame); 55 void dtrace_invop_init(void); 56 void dtrace_invop_uninit(void); 57 58 typedef struct dtrace_invop_hdlr { 59 int (*dtih_func)(uintptr_t, struct trapframe *, uintptr_t); 60 struct dtrace_invop_hdlr *dtih_next; 61 } dtrace_invop_hdlr_t; 62 63 dtrace_invop_hdlr_t *dtrace_invop_hdlr; 64 65 int 66 dtrace_invop(uintptr_t addr, struct trapframe *frame, void **scratch) 67 { 68 struct thread *td; 69 dtrace_invop_hdlr_t *hdlr; 70 int rval; 71 72 kmsan_mark(frame, sizeof(*frame), KMSAN_STATE_INITED); 73 74 td = curthread; 75 td->t_dtrace_trapframe = frame; 76 rval = 0; 77 for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) { 78 rval = hdlr->dtih_func(addr, frame, (uintptr_t)scratch); 79 if (rval != 0) 80 break; 81 } 82 td->t_dtrace_trapframe = NULL; 83 return (rval); 84 } 85 86 void 87 dtrace_invop_add(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) 88 { 89 dtrace_invop_hdlr_t *hdlr; 90 91 hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP); 92 hdlr->dtih_func = func; 93 hdlr->dtih_next = dtrace_invop_hdlr; 94 dtrace_invop_hdlr = hdlr; 95 } 96 97 void 98 dtrace_invop_remove(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) 99 { 100 dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL; 101 102 for (;;) { 103 if (hdlr == NULL) 104 panic("attempt to remove non-existent invop handler"); 105 106 if (hdlr->dtih_func == func) 107 break; 108 109 prev = hdlr; 110 hdlr = hdlr->dtih_next; 111 } 112 113 if (prev == NULL) { 114 ASSERT(dtrace_invop_hdlr == hdlr); 115 dtrace_invop_hdlr = hdlr->dtih_next; 116 } else { 117 ASSERT(dtrace_invop_hdlr != hdlr); 118 prev->dtih_next = hdlr->dtih_next; 119 } 120 121 kmem_free(hdlr, 0); 122 } 123 124 void 125 dtrace_invop_init(void) 126 { 127 128 dtrace_invop_jump_addr = dtrace_invop_start; 129 } 130 131 void 132 dtrace_invop_uninit(void) 133 { 134 135 dtrace_invop_jump_addr = NULL; 136 } 137 138 /*ARGSUSED*/ 139 void 140 dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) 141 { 142 (*func)(0, la57 ? (uintptr_t)addr_P5Tmap : (uintptr_t)addr_P4Tmap); 143 } 144 145 void 146 dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg) 147 { 148 cpuset_t cpus; 149 150 if (cpu == DTRACE_CPUALL) 151 cpus = all_cpus; 152 else 153 CPU_SETOF(cpu, &cpus); 154 155 smp_rendezvous_cpus(cpus, smp_no_rendezvous_barrier, func, 156 smp_no_rendezvous_barrier, arg); 157 } 158 159 static void 160 dtrace_sync_func(void) 161 { 162 } 163 164 void 165 dtrace_sync(void) 166 { 167 dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL); 168 } 169 170 #ifdef notyet 171 void 172 dtrace_safe_synchronous_signal(void) 173 { 174 kthread_t *t = curthread; 175 struct regs *rp = lwptoregs(ttolwp(t)); 176 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 177 178 ASSERT(t->t_dtrace_on); 179 180 /* 181 * If we're not in the range of scratch addresses, we're not actually 182 * tracing user instructions so turn off the flags. If the instruction 183 * we copied out caused a synchonous trap, reset the pc back to its 184 * original value and turn off the flags. 185 */ 186 if (rp->r_pc < t->t_dtrace_scrpc || 187 rp->r_pc > t->t_dtrace_astpc + isz) { 188 t->t_dtrace_ft = 0; 189 } else if (rp->r_pc == t->t_dtrace_scrpc || 190 rp->r_pc == t->t_dtrace_astpc) { 191 rp->r_pc = t->t_dtrace_pc; 192 t->t_dtrace_ft = 0; 193 } 194 } 195 196 int 197 dtrace_safe_defer_signal(void) 198 { 199 kthread_t *t = curthread; 200 struct regs *rp = lwptoregs(ttolwp(t)); 201 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 202 203 ASSERT(t->t_dtrace_on); 204 205 /* 206 * If we're not in the range of scratch addresses, we're not actually 207 * tracing user instructions so turn off the flags. 208 */ 209 if (rp->r_pc < t->t_dtrace_scrpc || 210 rp->r_pc > t->t_dtrace_astpc + isz) { 211 t->t_dtrace_ft = 0; 212 return (0); 213 } 214 215 /* 216 * If we have executed the original instruction, but we have performed 217 * neither the jmp back to t->t_dtrace_npc nor the clean up of any 218 * registers used to emulate %rip-relative instructions in 64-bit mode, 219 * we'll save ourselves some effort by doing that here and taking the 220 * signal right away. We detect this condition by seeing if the program 221 * counter is the range [scrpc + isz, astpc). 222 */ 223 if (rp->r_pc >= t->t_dtrace_scrpc + isz && 224 rp->r_pc < t->t_dtrace_astpc) { 225 #ifdef __amd64 226 /* 227 * If there is a scratch register and we're on the 228 * instruction immediately after the modified instruction, 229 * restore the value of that scratch register. 230 */ 231 if (t->t_dtrace_reg != 0 && 232 rp->r_pc == t->t_dtrace_scrpc + isz) { 233 switch (t->t_dtrace_reg) { 234 case REG_RAX: 235 rp->r_rax = t->t_dtrace_regv; 236 break; 237 case REG_RCX: 238 rp->r_rcx = t->t_dtrace_regv; 239 break; 240 case REG_R8: 241 rp->r_r8 = t->t_dtrace_regv; 242 break; 243 case REG_R9: 244 rp->r_r9 = t->t_dtrace_regv; 245 break; 246 } 247 } 248 #endif 249 rp->r_pc = t->t_dtrace_npc; 250 t->t_dtrace_ft = 0; 251 return (0); 252 } 253 254 /* 255 * Otherwise, make sure we'll return to the kernel after executing 256 * the copied out instruction and defer the signal. 257 */ 258 if (!t->t_dtrace_step) { 259 ASSERT(rp->r_pc < t->t_dtrace_astpc); 260 rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc; 261 t->t_dtrace_step = 1; 262 } 263 264 t->t_dtrace_ast = 1; 265 266 return (1); 267 } 268 #endif 269 270 static int64_t tgt_cpu_tsc; 271 static int64_t hst_cpu_tsc; 272 static int64_t tsc_skew[MAXCPU]; 273 static uint64_t nsec_scale; 274 275 /* See below for the explanation of this macro. */ 276 #define SCALE_SHIFT 28 277 278 static void 279 dtrace_gethrtime_init_cpu(void *arg) 280 { 281 uintptr_t cpu = (uintptr_t) arg; 282 283 if (cpu == curcpu) 284 tgt_cpu_tsc = rdtsc(); 285 else 286 hst_cpu_tsc = rdtsc(); 287 } 288 289 static void 290 dtrace_gethrtime_init(void *arg) 291 { 292 struct pcpu *pc; 293 uint64_t tsc_f; 294 cpuset_t map; 295 int i; 296 297 /* 298 * Get TSC frequency known at this moment. 299 * This should be constant if TSC is invariant. 300 * Otherwise tick->time conversion will be inaccurate, but 301 * will preserve monotonic property of TSC. 302 */ 303 tsc_f = atomic_load_acq_64(&tsc_freq); 304 305 /* 306 * The following line checks that nsec_scale calculated below 307 * doesn't overflow 32-bit unsigned integer, so that it can multiply 308 * another 32-bit integer without overflowing 64-bit. 309 * Thus minimum supported TSC frequency is 62.5MHz. 310 */ 311 KASSERT(tsc_f > (NANOSEC >> (32 - SCALE_SHIFT)), 312 ("TSC frequency is too low")); 313 314 /* 315 * We scale up NANOSEC/tsc_f ratio to preserve as much precision 316 * as possible. 317 * 2^28 factor was chosen quite arbitrarily from practical 318 * considerations: 319 * - it supports TSC frequencies as low as 62.5MHz (see above); 320 * - it provides quite good precision (e < 0.01%) up to THz 321 * (terahertz) values; 322 */ 323 nsec_scale = ((uint64_t)NANOSEC << SCALE_SHIFT) / tsc_f; 324 325 if (vm_guest != VM_GUEST_NO) 326 return; 327 328 /* The current CPU is the reference one. */ 329 sched_pin(); 330 tsc_skew[curcpu] = 0; 331 CPU_FOREACH(i) { 332 if (i == curcpu) 333 continue; 334 335 pc = pcpu_find(i); 336 CPU_SETOF(PCPU_GET(cpuid), &map); 337 CPU_SET(pc->pc_cpuid, &map); 338 339 smp_rendezvous_cpus(map, NULL, 340 dtrace_gethrtime_init_cpu, 341 smp_no_rendezvous_barrier, (void *)(uintptr_t) i); 342 343 tsc_skew[i] = tgt_cpu_tsc - hst_cpu_tsc; 344 } 345 sched_unpin(); 346 } 347 SYSINIT(dtrace_gethrtime_init, SI_SUB_DTRACE, SI_ORDER_ANY, 348 dtrace_gethrtime_init, NULL); 349 350 /* 351 * DTrace needs a high resolution time function which can 352 * be called from a probe context and guaranteed not to have 353 * instrumented with probes itself. 354 * 355 * Returns nanoseconds since boot. 356 */ 357 uint64_t 358 dtrace_gethrtime(void) 359 { 360 uint64_t tsc; 361 uint32_t lo, hi; 362 register_t rflags; 363 364 /* 365 * We split TSC value into lower and higher 32-bit halves and separately 366 * scale them with nsec_scale, then we scale them down by 2^28 367 * (see nsec_scale calculations) taking into account 32-bit shift of 368 * the higher half and finally add. 369 */ 370 rflags = intr_disable(); 371 tsc = rdtsc() - tsc_skew[curcpu]; 372 intr_restore(rflags); 373 374 lo = tsc; 375 hi = tsc >> 32; 376 return (((lo * nsec_scale) >> SCALE_SHIFT) + 377 ((hi * nsec_scale) << (32 - SCALE_SHIFT))); 378 } 379 380 uint64_t 381 dtrace_gethrestime(void) 382 { 383 struct timespec current_time; 384 385 dtrace_getnanotime(¤t_time); 386 387 return (current_time.tv_sec * 1000000000ULL + current_time.tv_nsec); 388 } 389 390 /* Function to handle DTrace traps during probes. See amd64/amd64/trap.c. */ 391 int 392 dtrace_trap(struct trapframe *frame, u_int type) 393 { 394 uint16_t nofault; 395 396 /* 397 * A trap can occur while DTrace executes a probe. Before 398 * executing the probe, DTrace blocks re-scheduling and sets 399 * a flag in its per-cpu flags to indicate that it doesn't 400 * want to fault. On returning from the probe, the no-fault 401 * flag is cleared and finally re-scheduling is enabled. 402 * 403 * Check if DTrace has enabled 'no-fault' mode: 404 */ 405 sched_pin(); 406 nofault = cpu_core[curcpu].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT; 407 sched_unpin(); 408 if (nofault) { 409 KASSERT((read_rflags() & PSL_I) == 0, ("interrupts enabled")); 410 411 /* 412 * There are only a couple of trap types that are expected. 413 * All the rest will be handled in the usual way. 414 */ 415 switch (type) { 416 /* General protection fault. */ 417 case T_PROTFLT: 418 /* Flag an illegal operation. */ 419 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_ILLOP; 420 421 /* 422 * Offset the instruction pointer to the instruction 423 * following the one causing the fault. 424 */ 425 frame->tf_rip += dtrace_instr_size((uint8_t *) frame->tf_rip); 426 return (1); 427 /* Page fault. */ 428 case T_PAGEFLT: 429 /* Flag a bad address. */ 430 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR; 431 cpu_core[curcpu].cpuc_dtrace_illval = frame->tf_addr; 432 433 /* 434 * Offset the instruction pointer to the instruction 435 * following the one causing the fault. 436 */ 437 frame->tf_rip += dtrace_instr_size((uint8_t *) frame->tf_rip); 438 return (1); 439 default: 440 /* Handle all other traps in the usual way. */ 441 break; 442 } 443 } 444 445 /* Handle the trap in the usual way. */ 446 return (0); 447 } 448