1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 * 22 * $FreeBSD$ 23 * 24 */ 25 /* 26 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 27 * Use is subject to license terms. 28 */ 29 30 /* 31 * Copyright (c) 2011, Joyent, Inc. All rights reserved. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/types.h> 37 #include <sys/kernel.h> 38 #include <sys/malloc.h> 39 #include <sys/kmem.h> 40 #include <sys/smp.h> 41 #include <sys/dtrace_impl.h> 42 #include <sys/dtrace_bsd.h> 43 #include <machine/clock.h> 44 #include <machine/frame.h> 45 #include <vm/pmap.h> 46 47 extern void dtrace_getnanotime(struct timespec *tsp); 48 49 int dtrace_invop(uintptr_t, uintptr_t *, uintptr_t); 50 51 typedef struct dtrace_invop_hdlr { 52 int (*dtih_func)(uintptr_t, uintptr_t *, uintptr_t); 53 struct dtrace_invop_hdlr *dtih_next; 54 } dtrace_invop_hdlr_t; 55 56 dtrace_invop_hdlr_t *dtrace_invop_hdlr; 57 58 int 59 dtrace_invop(uintptr_t addr, uintptr_t *stack, uintptr_t eax) 60 { 61 dtrace_invop_hdlr_t *hdlr; 62 int rval; 63 64 for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) 65 if ((rval = hdlr->dtih_func(addr, stack, eax)) != 0) 66 return (rval); 67 68 return (0); 69 } 70 71 void 72 dtrace_invop_add(int (*func)(uintptr_t, uintptr_t *, uintptr_t)) 73 { 74 dtrace_invop_hdlr_t *hdlr; 75 76 hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP); 77 hdlr->dtih_func = func; 78 hdlr->dtih_next = dtrace_invop_hdlr; 79 dtrace_invop_hdlr = hdlr; 80 } 81 82 void 83 dtrace_invop_remove(int (*func)(uintptr_t, uintptr_t *, uintptr_t)) 84 { 85 dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL; 86 87 for (;;) { 88 if (hdlr == NULL) 89 panic("attempt to remove non-existent invop handler"); 90 91 if (hdlr->dtih_func == func) 92 break; 93 94 prev = hdlr; 95 hdlr = hdlr->dtih_next; 96 } 97 98 if (prev == NULL) { 99 ASSERT(dtrace_invop_hdlr == hdlr); 100 dtrace_invop_hdlr = hdlr->dtih_next; 101 } else { 102 ASSERT(dtrace_invop_hdlr != hdlr); 103 prev->dtih_next = hdlr->dtih_next; 104 } 105 106 kmem_free(hdlr, 0); 107 } 108 109 /*ARGSUSED*/ 110 void 111 dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) 112 { 113 (*func)(0, (uintptr_t) addr_PTmap); 114 } 115 116 void 117 dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg) 118 { 119 cpuset_t cpus; 120 121 if (cpu == DTRACE_CPUALL) 122 cpus = all_cpus; 123 else 124 CPU_SETOF(cpu, &cpus); 125 126 smp_rendezvous_cpus(cpus, smp_no_rendevous_barrier, func, 127 smp_no_rendevous_barrier, arg); 128 } 129 130 static void 131 dtrace_sync_func(void) 132 { 133 } 134 135 void 136 dtrace_sync(void) 137 { 138 dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL); 139 } 140 141 #ifdef notyet 142 void 143 dtrace_safe_synchronous_signal(void) 144 { 145 kthread_t *t = curthread; 146 struct regs *rp = lwptoregs(ttolwp(t)); 147 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 148 149 ASSERT(t->t_dtrace_on); 150 151 /* 152 * If we're not in the range of scratch addresses, we're not actually 153 * tracing user instructions so turn off the flags. If the instruction 154 * we copied out caused a synchonous trap, reset the pc back to its 155 * original value and turn off the flags. 156 */ 157 if (rp->r_pc < t->t_dtrace_scrpc || 158 rp->r_pc > t->t_dtrace_astpc + isz) { 159 t->t_dtrace_ft = 0; 160 } else if (rp->r_pc == t->t_dtrace_scrpc || 161 rp->r_pc == t->t_dtrace_astpc) { 162 rp->r_pc = t->t_dtrace_pc; 163 t->t_dtrace_ft = 0; 164 } 165 } 166 167 int 168 dtrace_safe_defer_signal(void) 169 { 170 kthread_t *t = curthread; 171 struct regs *rp = lwptoregs(ttolwp(t)); 172 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 173 174 ASSERT(t->t_dtrace_on); 175 176 /* 177 * If we're not in the range of scratch addresses, we're not actually 178 * tracing user instructions so turn off the flags. 179 */ 180 if (rp->r_pc < t->t_dtrace_scrpc || 181 rp->r_pc > t->t_dtrace_astpc + isz) { 182 t->t_dtrace_ft = 0; 183 return (0); 184 } 185 186 /* 187 * If we have executed the original instruction, but we have performed 188 * neither the jmp back to t->t_dtrace_npc nor the clean up of any 189 * registers used to emulate %rip-relative instructions in 64-bit mode, 190 * we'll save ourselves some effort by doing that here and taking the 191 * signal right away. We detect this condition by seeing if the program 192 * counter is the range [scrpc + isz, astpc). 193 */ 194 if (rp->r_pc >= t->t_dtrace_scrpc + isz && 195 rp->r_pc < t->t_dtrace_astpc) { 196 #ifdef __amd64 197 /* 198 * If there is a scratch register and we're on the 199 * instruction immediately after the modified instruction, 200 * restore the value of that scratch register. 201 */ 202 if (t->t_dtrace_reg != 0 && 203 rp->r_pc == t->t_dtrace_scrpc + isz) { 204 switch (t->t_dtrace_reg) { 205 case REG_RAX: 206 rp->r_rax = t->t_dtrace_regv; 207 break; 208 case REG_RCX: 209 rp->r_rcx = t->t_dtrace_regv; 210 break; 211 case REG_R8: 212 rp->r_r8 = t->t_dtrace_regv; 213 break; 214 case REG_R9: 215 rp->r_r9 = t->t_dtrace_regv; 216 break; 217 } 218 } 219 #endif 220 rp->r_pc = t->t_dtrace_npc; 221 t->t_dtrace_ft = 0; 222 return (0); 223 } 224 225 /* 226 * Otherwise, make sure we'll return to the kernel after executing 227 * the copied out instruction and defer the signal. 228 */ 229 if (!t->t_dtrace_step) { 230 ASSERT(rp->r_pc < t->t_dtrace_astpc); 231 rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc; 232 t->t_dtrace_step = 1; 233 } 234 235 t->t_dtrace_ast = 1; 236 237 return (1); 238 } 239 #endif 240 241 static int64_t tgt_cpu_tsc; 242 static int64_t hst_cpu_tsc; 243 static int64_t tsc_skew[MAXCPU]; 244 static uint64_t nsec_scale; 245 246 /* See below for the explanation of this macro. */ 247 #define SCALE_SHIFT 28 248 249 static void 250 dtrace_gethrtime_init_cpu(void *arg) 251 { 252 uintptr_t cpu = (uintptr_t) arg; 253 254 if (cpu == curcpu) 255 tgt_cpu_tsc = rdtsc(); 256 else 257 hst_cpu_tsc = rdtsc(); 258 } 259 260 static void 261 dtrace_gethrtime_init(void *arg) 262 { 263 struct pcpu *pc; 264 uint64_t tsc_f; 265 cpuset_t map; 266 int i; 267 268 /* 269 * Get TSC frequency known at this moment. 270 * This should be constant if TSC is invariant. 271 * Otherwise tick->time conversion will be inaccurate, but 272 * will preserve monotonic property of TSC. 273 */ 274 tsc_f = atomic_load_acq_64(&tsc_freq); 275 276 /* 277 * The following line checks that nsec_scale calculated below 278 * doesn't overflow 32-bit unsigned integer, so that it can multiply 279 * another 32-bit integer without overflowing 64-bit. 280 * Thus minimum supported TSC frequency is 62.5MHz. 281 */ 282 KASSERT(tsc_f > (NANOSEC >> (32 - SCALE_SHIFT)), ("TSC frequency is too low")); 283 284 /* 285 * We scale up NANOSEC/tsc_f ratio to preserve as much precision 286 * as possible. 287 * 2^28 factor was chosen quite arbitrarily from practical 288 * considerations: 289 * - it supports TSC frequencies as low as 62.5MHz (see above); 290 * - it provides quite good precision (e < 0.01%) up to THz 291 * (terahertz) values; 292 */ 293 nsec_scale = ((uint64_t)NANOSEC << SCALE_SHIFT) / tsc_f; 294 295 /* The current CPU is the reference one. */ 296 sched_pin(); 297 tsc_skew[curcpu] = 0; 298 CPU_FOREACH(i) { 299 if (i == curcpu) 300 continue; 301 302 pc = pcpu_find(i); 303 CPU_SETOF(PCPU_GET(cpuid), &map); 304 CPU_SET(pc->pc_cpuid, &map); 305 306 smp_rendezvous_cpus(map, NULL, 307 dtrace_gethrtime_init_cpu, 308 smp_no_rendevous_barrier, (void *)(uintptr_t) i); 309 310 tsc_skew[i] = tgt_cpu_tsc - hst_cpu_tsc; 311 } 312 sched_unpin(); 313 } 314 315 SYSINIT(dtrace_gethrtime_init, SI_SUB_SMP, SI_ORDER_ANY, dtrace_gethrtime_init, NULL); 316 317 /* 318 * DTrace needs a high resolution time function which can 319 * be called from a probe context and guaranteed not to have 320 * instrumented with probes itself. 321 * 322 * Returns nanoseconds since boot. 323 */ 324 uint64_t 325 dtrace_gethrtime() 326 { 327 uint64_t tsc; 328 uint32_t lo; 329 uint32_t hi; 330 331 /* 332 * We split TSC value into lower and higher 32-bit halves and separately 333 * scale them with nsec_scale, then we scale them down by 2^28 334 * (see nsec_scale calculations) taking into account 32-bit shift of 335 * the higher half and finally add. 336 */ 337 tsc = rdtsc() - tsc_skew[curcpu]; 338 lo = tsc; 339 hi = tsc >> 32; 340 return (((lo * nsec_scale) >> SCALE_SHIFT) + 341 ((hi * nsec_scale) << (32 - SCALE_SHIFT))); 342 } 343 344 uint64_t 345 dtrace_gethrestime(void) 346 { 347 struct timespec current_time; 348 349 dtrace_getnanotime(¤t_time); 350 351 return (current_time.tv_sec * 1000000000ULL + current_time.tv_nsec); 352 } 353 354 /* Function to handle DTrace traps during probes. See amd64/amd64/trap.c. */ 355 int 356 dtrace_trap(struct trapframe *frame, u_int type) 357 { 358 /* 359 * A trap can occur while DTrace executes a probe. Before 360 * executing the probe, DTrace blocks re-scheduling and sets 361 * a flag in its per-cpu flags to indicate that it doesn't 362 * want to fault. On returning from the probe, the no-fault 363 * flag is cleared and finally re-scheduling is enabled. 364 * 365 * Check if DTrace has enabled 'no-fault' mode: 366 */ 367 if ((cpu_core[curcpu].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT) != 0) { 368 /* 369 * There are only a couple of trap types that are expected. 370 * All the rest will be handled in the usual way. 371 */ 372 switch (type) { 373 /* General protection fault. */ 374 case T_PROTFLT: 375 /* Flag an illegal operation. */ 376 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_ILLOP; 377 378 /* 379 * Offset the instruction pointer to the instruction 380 * following the one causing the fault. 381 */ 382 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 383 return (1); 384 /* Page fault. */ 385 case T_PAGEFLT: 386 /* Flag a bad address. */ 387 cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR; 388 cpu_core[curcpu].cpuc_dtrace_illval = frame->tf_addr; 389 390 /* 391 * Offset the instruction pointer to the instruction 392 * following the one causing the fault. 393 */ 394 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 395 return (1); 396 default: 397 /* Handle all other traps in the usual way. */ 398 break; 399 } 400 } 401 402 /* Handle the trap in the usual way. */ 403 return (0); 404 } 405