xref: /freebsd/sys/cddl/dev/dtrace/aarch64/dtrace_asm.S (revision 258a0d760aa8b42899a000e30f610f900a402556)
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 *
22 * $FreeBSD$
23 */
24/*
25 * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
26 * Use is subject to license terms.
27 */
28
29#define _ASM
30#define _LOCORE
31
32#include <sys/cpuvar_defs.h>
33#include <sys/dtrace.h>
34
35#include <machine/armreg.h>
36#include <machine/asm.h>
37
38#include "assym.inc"
39
40/*
41void dtrace_membar_producer(void)
42*/
43ENTRY(dtrace_membar_producer)
44	RET
45END(dtrace_membar_producer)
46
47/*
48void dtrace_membar_consumer(void)
49*/
50ENTRY(dtrace_membar_consumer)
51	RET
52END(dtrace_membar_consumer)
53
54/*
55dtrace_icookie_t dtrace_interrupt_disable(void)
56*/
57ENTRY(dtrace_interrupt_disable)
58	mrs	x0, daif
59	msr	daifset, #2
60	RET
61END(dtrace_interrupt_disable)
62
63/*
64void dtrace_interrupt_enable(dtrace_icookie_t cookie)
65*/
66ENTRY(dtrace_interrupt_enable)
67	msr	daif, x0
68	RET
69END(dtrace_interrupt_enable)
70/*
71uint8_t
72dtrace_fuword8_nocheck(void *addr)
73*/
74ENTRY(dtrace_fuword8_nocheck)
75	ldtrb	w0, [x0]
76	RET
77END(dtrace_fuword8_nocheck)
78
79/*
80uint16_t
81dtrace_fuword16_nocheck(void *addr)
82*/
83ENTRY(dtrace_fuword16_nocheck)
84	ldtrh	w0, [x0]
85	RET
86END(dtrace_fuword16_nocheck)
87
88/*
89uint32_t
90dtrace_fuword32_nocheck(void *addr)
91*/
92ENTRY(dtrace_fuword32_nocheck)
93	ldtr	w0, [x0]
94	RET
95END(dtrace_fuword32_nocheck)
96
97/*
98uint64_t
99dtrace_fuword64_nocheck(void *addr)
100*/
101ENTRY(dtrace_fuword64_nocheck)
102	ldtr	x0, [x0]
103	RET
104END(dtrace_fuword64_nocheck)
105
106/*
107void
108dtrace_copy(uintptr_t uaddr, uintptr_t kaddr, size_t size)
109*/
110ENTRY(dtrace_copy)
111	cbz	x2, 2f		/* If len == 0 then skip loop */
1121:
113	ldtrb	w4, [x0]	/* Load from uaddr */
114	add	x0, x0, #1
115	strb	w4, [x1], #1	/* Store in kaddr */
116	sub	x2, x2, #1	/* len-- */
117	cbnz	x2, 1b
1182:
119	RET
120END(dtrace_copy)
121
122/*
123void
124dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size,
125    volatile uint16_t *flags)
126XXX: Check for flags?
127*/
128ENTRY(dtrace_copystr)
129	cbz     x2, 2f          /* If len == 0 then skip loop */
1301:
131	ldtrb	w4, [x0]	/* Load from uaddr */
132	add	x0, x0, #1
133	strb    w4, [x1], #1    /* Store in kaddr */
134	cbz     w4, 2f          /* If == 0 then break */
135	sub     x2, x2, #1      /* len-- */
136	cbnz    x2, 1b
1372:
138	RET
139END(dtrace_copystr)
140
141/*
142uintptr_t
143dtrace_caller(int aframes)
144*/
145ENTRY(dtrace_caller)
146	mov	x0, #-1
147	RET
148END(dtrace_caller)
149
150/*
151uint32_t
152dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new)
153*/
154ENTRY(dtrace_cas32)
1551:	ldxr	w3, [x0]	/* Load target */
156	cmp	w3, w1		/* Check if *target == cmp */
157	bne	2f		/* No, return */
158	stxr	w12, w2, [x0]	/* Store new to target */
159	cbnz	w12, 1b		/* Try again if store not succeed */
1602:	mov	w0, w3		/* Return the value loaded from target */
161	RET
162END(dtrace_cas32)
163
164/*
165void *
166dtrace_casptr(volatile void *target, volatile void *cmp, volatile void *new)
167*/
168ENTRY(dtrace_casptr)
1691:	ldxr	x3, [x0]	/* Load target */
170	cmp	x3, x1		/* Check if *target == cmp */
171	bne	2f		/* No, return */
172	stxr	w12, x2, [x0]	/* Store new to target */
173	cbnz	w12, 1b		/* Try again if store not succeed */
1742:	mov	x0, x3		/* Return the value loaded from target */
175	RET
176END(dtrace_casptr)
177