1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 * 21 * Portions Copyright 2010 The FreeBSD Foundation 22 * 23 * $FreeBSD$ 24 */ 25 26 /* 27 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 28 * Use is subject to license terms. 29 */ 30 31 #ifdef illumos 32 #pragma ident "%Z%%M% %I% %E% SMI" 33 #endif 34 35 #include <sys/fasttrap_isa.h> 36 #include <sys/fasttrap_impl.h> 37 #include <sys/dtrace.h> 38 #include <sys/dtrace_impl.h> 39 #include <sys/cmn_err.h> 40 #ifdef illumos 41 #include <sys/regset.h> 42 #include <sys/privregs.h> 43 #include <sys/segments.h> 44 #include <sys/x86_archext.h> 45 #else 46 #include <sys/types.h> 47 #include <sys/dtrace_bsd.h> 48 #include <sys/proc.h> 49 #include <sys/rmlock.h> 50 #include <cddl/dev/dtrace/dtrace_cddl.h> 51 #include <cddl/dev/dtrace/x86/regset.h> 52 #include <machine/segments.h> 53 #include <machine/reg.h> 54 #include <machine/pcb.h> 55 #endif 56 #include <sys/sysmacros.h> 57 #ifdef illumos 58 #include <sys/trap.h> 59 #include <sys/archsystm.h> 60 #else 61 #include <sys/ptrace.h> 62 #endif /* illumos */ 63 64 #ifdef __i386__ 65 #define r_rax r_eax 66 #define r_rbx r_ebx 67 #define r_rip r_eip 68 #define r_rflags r_eflags 69 #define r_rsp r_esp 70 #define r_rbp r_ebp 71 #endif 72 73 /* 74 * Lossless User-Land Tracing on x86 75 * --------------------------------- 76 * 77 * The execution of most instructions is not dependent on the address; for 78 * these instructions it is sufficient to copy them into the user process's 79 * address space and execute them. To effectively single-step an instruction 80 * in user-land, we copy out the following sequence of instructions to scratch 81 * space in the user thread's ulwp_t structure. 82 * 83 * We then set the program counter (%eip or %rip) to point to this scratch 84 * space. Once execution resumes, the original instruction is executed and 85 * then control flow is redirected to what was originally the subsequent 86 * instruction. If the kernel attemps to deliver a signal while single- 87 * stepping, the signal is deferred and the program counter is moved into the 88 * second sequence of instructions. The second sequence ends in a trap into 89 * the kernel where the deferred signal is then properly handled and delivered. 90 * 91 * For instructions whose execute is position dependent, we perform simple 92 * emulation. These instructions are limited to control transfer 93 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle 94 * of %rip-relative addressing that means that almost any instruction can be 95 * position dependent. For all the details on how we emulate generic 96 * instructions included %rip-relative instructions, see the code in 97 * fasttrap_pid_probe() below where we handle instructions of type 98 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing). 99 */ 100 101 #define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3) 102 #define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7) 103 #define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7) 104 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm)) 105 106 #define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3) 107 #define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7) 108 #define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7) 109 110 #define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1) 111 #define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1) 112 #define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1) 113 #define FASTTRAP_REX_B(rex) ((rex) & 1) 114 #define FASTTRAP_REX(w, r, x, b) \ 115 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b)) 116 117 /* 118 * Single-byte op-codes. 119 */ 120 #define FASTTRAP_PUSHL_EBP 0x55 121 122 #define FASTTRAP_JO 0x70 123 #define FASTTRAP_JNO 0x71 124 #define FASTTRAP_JB 0x72 125 #define FASTTRAP_JAE 0x73 126 #define FASTTRAP_JE 0x74 127 #define FASTTRAP_JNE 0x75 128 #define FASTTRAP_JBE 0x76 129 #define FASTTRAP_JA 0x77 130 #define FASTTRAP_JS 0x78 131 #define FASTTRAP_JNS 0x79 132 #define FASTTRAP_JP 0x7a 133 #define FASTTRAP_JNP 0x7b 134 #define FASTTRAP_JL 0x7c 135 #define FASTTRAP_JGE 0x7d 136 #define FASTTRAP_JLE 0x7e 137 #define FASTTRAP_JG 0x7f 138 139 #define FASTTRAP_NOP 0x90 140 141 #define FASTTRAP_MOV_EAX 0xb8 142 #define FASTTRAP_MOV_ECX 0xb9 143 144 #define FASTTRAP_RET16 0xc2 145 #define FASTTRAP_RET 0xc3 146 147 #define FASTTRAP_LOOPNZ 0xe0 148 #define FASTTRAP_LOOPZ 0xe1 149 #define FASTTRAP_LOOP 0xe2 150 #define FASTTRAP_JCXZ 0xe3 151 152 #define FASTTRAP_CALL 0xe8 153 #define FASTTRAP_JMP32 0xe9 154 #define FASTTRAP_JMP8 0xeb 155 156 #define FASTTRAP_INT3 0xcc 157 #define FASTTRAP_INT 0xcd 158 159 #define FASTTRAP_2_BYTE_OP 0x0f 160 #define FASTTRAP_GROUP5_OP 0xff 161 162 /* 163 * Two-byte op-codes (second byte only). 164 */ 165 #define FASTTRAP_0F_JO 0x80 166 #define FASTTRAP_0F_JNO 0x81 167 #define FASTTRAP_0F_JB 0x82 168 #define FASTTRAP_0F_JAE 0x83 169 #define FASTTRAP_0F_JE 0x84 170 #define FASTTRAP_0F_JNE 0x85 171 #define FASTTRAP_0F_JBE 0x86 172 #define FASTTRAP_0F_JA 0x87 173 #define FASTTRAP_0F_JS 0x88 174 #define FASTTRAP_0F_JNS 0x89 175 #define FASTTRAP_0F_JP 0x8a 176 #define FASTTRAP_0F_JNP 0x8b 177 #define FASTTRAP_0F_JL 0x8c 178 #define FASTTRAP_0F_JGE 0x8d 179 #define FASTTRAP_0F_JLE 0x8e 180 #define FASTTRAP_0F_JG 0x8f 181 182 #define FASTTRAP_EFLAGS_OF 0x800 183 #define FASTTRAP_EFLAGS_DF 0x400 184 #define FASTTRAP_EFLAGS_SF 0x080 185 #define FASTTRAP_EFLAGS_ZF 0x040 186 #define FASTTRAP_EFLAGS_AF 0x010 187 #define FASTTRAP_EFLAGS_PF 0x004 188 #define FASTTRAP_EFLAGS_CF 0x001 189 190 /* 191 * Instruction prefixes. 192 */ 193 #define FASTTRAP_PREFIX_OPERAND 0x66 194 #define FASTTRAP_PREFIX_ADDRESS 0x67 195 #define FASTTRAP_PREFIX_CS 0x2E 196 #define FASTTRAP_PREFIX_DS 0x3E 197 #define FASTTRAP_PREFIX_ES 0x26 198 #define FASTTRAP_PREFIX_FS 0x64 199 #define FASTTRAP_PREFIX_GS 0x65 200 #define FASTTRAP_PREFIX_SS 0x36 201 #define FASTTRAP_PREFIX_LOCK 0xF0 202 #define FASTTRAP_PREFIX_REP 0xF3 203 #define FASTTRAP_PREFIX_REPNE 0xF2 204 205 #define FASTTRAP_NOREG 0xff 206 207 /* 208 * Map between instruction register encodings and the kernel constants which 209 * correspond to indicies into struct regs. 210 */ 211 #ifdef __amd64 212 static const uint8_t regmap[16] = { 213 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI, 214 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15, 215 }; 216 #else 217 static const uint8_t regmap[8] = { 218 EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI 219 }; 220 #endif 221 222 static ulong_t fasttrap_getreg(struct reg *, uint_t); 223 224 static uint64_t 225 fasttrap_anarg(struct reg *rp, int function_entry, int argno) 226 { 227 uint64_t value = 0; 228 int shift = function_entry ? 1 : 0; 229 230 #ifdef __amd64 231 if (curproc->p_model == DATAMODEL_LP64) { 232 uintptr_t *stack; 233 234 /* 235 * In 64-bit mode, the first six arguments are stored in 236 * registers. 237 */ 238 if (argno < 6) 239 switch (argno) { 240 case 0: 241 return (rp->r_rdi); 242 case 1: 243 return (rp->r_rsi); 244 case 2: 245 return (rp->r_rdx); 246 case 3: 247 return (rp->r_rcx); 248 case 4: 249 return (rp->r_r8); 250 case 5: 251 return (rp->r_r9); 252 } 253 254 stack = (uintptr_t *)rp->r_rsp; 255 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 256 value = dtrace_fulword(&stack[argno - 6 + shift]); 257 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 258 } else { 259 #endif 260 uint32_t *stack = (uint32_t *)rp->r_rsp; 261 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 262 value = dtrace_fuword32(&stack[argno + shift]); 263 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 264 #ifdef __amd64 265 } 266 #endif 267 268 return (value); 269 } 270 271 /*ARGSUSED*/ 272 int 273 fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, 274 fasttrap_probe_type_t type) 275 { 276 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10]; 277 size_t len = FASTTRAP_MAX_INSTR_SIZE; 278 size_t first = MIN(len, PAGESIZE - (pc & PAGEOFFSET)); 279 uint_t start = 0; 280 int rmindex, size; 281 uint8_t seg, rex = 0; 282 283 /* 284 * Read the instruction at the given address out of the process's 285 * address space. We don't have to worry about a debugger 286 * changing this instruction before we overwrite it with our trap 287 * instruction since P_PR_LOCK is set. Since instructions can span 288 * pages, we potentially read the instruction in two parts. If the 289 * second part fails, we just zero out that part of the instruction. 290 */ 291 if (uread(p, &instr[0], first, pc) != 0) 292 return (-1); 293 if (len > first && 294 uread(p, &instr[first], len - first, pc + first) != 0) { 295 bzero(&instr[first], len - first); 296 len = first; 297 } 298 299 /* 300 * If the disassembly fails, then we have a malformed instruction. 301 */ 302 if ((size = dtrace_instr_size_isa(instr, p->p_model, &rmindex)) <= 0) 303 return (-1); 304 305 /* 306 * Make sure the disassembler isn't completely broken. 307 */ 308 ASSERT(-1 <= rmindex && rmindex < size); 309 310 /* 311 * If the computed size is greater than the number of bytes read, 312 * then it was a malformed instruction possibly because it fell on a 313 * page boundary and the subsequent page was missing or because of 314 * some malicious user. 315 */ 316 if (size > len) 317 return (-1); 318 319 tp->ftt_size = (uint8_t)size; 320 tp->ftt_segment = FASTTRAP_SEG_NONE; 321 322 /* 323 * Find the start of the instruction's opcode by processing any 324 * legacy prefixes. 325 */ 326 for (;;) { 327 seg = 0; 328 switch (instr[start]) { 329 case FASTTRAP_PREFIX_SS: 330 seg++; 331 /*FALLTHRU*/ 332 case FASTTRAP_PREFIX_GS: 333 seg++; 334 /*FALLTHRU*/ 335 case FASTTRAP_PREFIX_FS: 336 seg++; 337 /*FALLTHRU*/ 338 case FASTTRAP_PREFIX_ES: 339 seg++; 340 /*FALLTHRU*/ 341 case FASTTRAP_PREFIX_DS: 342 seg++; 343 /*FALLTHRU*/ 344 case FASTTRAP_PREFIX_CS: 345 seg++; 346 /*FALLTHRU*/ 347 case FASTTRAP_PREFIX_OPERAND: 348 case FASTTRAP_PREFIX_ADDRESS: 349 case FASTTRAP_PREFIX_LOCK: 350 case FASTTRAP_PREFIX_REP: 351 case FASTTRAP_PREFIX_REPNE: 352 if (seg != 0) { 353 /* 354 * It's illegal for an instruction to specify 355 * two segment prefixes -- give up on this 356 * illegal instruction. 357 */ 358 if (tp->ftt_segment != FASTTRAP_SEG_NONE) 359 return (-1); 360 361 tp->ftt_segment = seg; 362 } 363 start++; 364 continue; 365 } 366 break; 367 } 368 369 #ifdef __amd64 370 /* 371 * Identify the REX prefix on 64-bit processes. 372 */ 373 if (p->p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40) 374 rex = instr[start++]; 375 #endif 376 377 /* 378 * Now that we're pretty sure that the instruction is okay, copy the 379 * valid part to the tracepoint. 380 */ 381 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE); 382 383 tp->ftt_type = FASTTRAP_T_COMMON; 384 if (instr[start] == FASTTRAP_2_BYTE_OP) { 385 switch (instr[start + 1]) { 386 case FASTTRAP_0F_JO: 387 case FASTTRAP_0F_JNO: 388 case FASTTRAP_0F_JB: 389 case FASTTRAP_0F_JAE: 390 case FASTTRAP_0F_JE: 391 case FASTTRAP_0F_JNE: 392 case FASTTRAP_0F_JBE: 393 case FASTTRAP_0F_JA: 394 case FASTTRAP_0F_JS: 395 case FASTTRAP_0F_JNS: 396 case FASTTRAP_0F_JP: 397 case FASTTRAP_0F_JNP: 398 case FASTTRAP_0F_JL: 399 case FASTTRAP_0F_JGE: 400 case FASTTRAP_0F_JLE: 401 case FASTTRAP_0F_JG: 402 tp->ftt_type = FASTTRAP_T_JCC; 403 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO; 404 tp->ftt_dest = pc + tp->ftt_size + 405 /* LINTED - alignment */ 406 *(int32_t *)&instr[start + 2]; 407 break; 408 } 409 } else if (instr[start] == FASTTRAP_GROUP5_OP) { 410 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]); 411 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]); 412 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]); 413 414 if (reg == 2 || reg == 4) { 415 uint_t i, sz; 416 417 if (reg == 2) 418 tp->ftt_type = FASTTRAP_T_CALL; 419 else 420 tp->ftt_type = FASTTRAP_T_JMP; 421 422 if (mod == 3) 423 tp->ftt_code = 2; 424 else 425 tp->ftt_code = 1; 426 427 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0); 428 429 /* 430 * See AMD x86-64 Architecture Programmer's Manual 431 * Volume 3, Section 1.2.7, Table 1-12, and 432 * Appendix A.3.1, Table A-15. 433 */ 434 if (mod != 3 && rm == 4) { 435 uint8_t sib = instr[start + 2]; 436 uint_t index = FASTTRAP_SIB_INDEX(sib); 437 uint_t base = FASTTRAP_SIB_BASE(sib); 438 439 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib); 440 441 tp->ftt_index = (index == 4) ? 442 FASTTRAP_NOREG : 443 regmap[index | (FASTTRAP_REX_X(rex) << 3)]; 444 tp->ftt_base = (mod == 0 && base == 5) ? 445 FASTTRAP_NOREG : 446 regmap[base | (FASTTRAP_REX_B(rex) << 3)]; 447 448 i = 3; 449 sz = mod == 1 ? 1 : 4; 450 } else { 451 /* 452 * In 64-bit mode, mod == 0 and r/m == 5 453 * denotes %rip-relative addressing; in 32-bit 454 * mode, the base register isn't used. In both 455 * modes, there is a 32-bit operand. 456 */ 457 if (mod == 0 && rm == 5) { 458 #ifdef __amd64 459 if (p->p_model == DATAMODEL_LP64) 460 tp->ftt_base = REG_RIP; 461 else 462 #endif 463 tp->ftt_base = FASTTRAP_NOREG; 464 sz = 4; 465 } else { 466 uint8_t base = rm | 467 (FASTTRAP_REX_B(rex) << 3); 468 469 tp->ftt_base = regmap[base]; 470 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0; 471 } 472 tp->ftt_index = FASTTRAP_NOREG; 473 i = 2; 474 } 475 476 if (sz == 1) { 477 tp->ftt_dest = *(int8_t *)&instr[start + i]; 478 } else if (sz == 4) { 479 /* LINTED - alignment */ 480 tp->ftt_dest = *(int32_t *)&instr[start + i]; 481 } else { 482 tp->ftt_dest = 0; 483 } 484 } 485 } else { 486 switch (instr[start]) { 487 case FASTTRAP_RET: 488 tp->ftt_type = FASTTRAP_T_RET; 489 break; 490 491 case FASTTRAP_RET16: 492 tp->ftt_type = FASTTRAP_T_RET16; 493 /* LINTED - alignment */ 494 tp->ftt_dest = *(uint16_t *)&instr[start + 1]; 495 break; 496 497 case FASTTRAP_JO: 498 case FASTTRAP_JNO: 499 case FASTTRAP_JB: 500 case FASTTRAP_JAE: 501 case FASTTRAP_JE: 502 case FASTTRAP_JNE: 503 case FASTTRAP_JBE: 504 case FASTTRAP_JA: 505 case FASTTRAP_JS: 506 case FASTTRAP_JNS: 507 case FASTTRAP_JP: 508 case FASTTRAP_JNP: 509 case FASTTRAP_JL: 510 case FASTTRAP_JGE: 511 case FASTTRAP_JLE: 512 case FASTTRAP_JG: 513 tp->ftt_type = FASTTRAP_T_JCC; 514 tp->ftt_code = instr[start]; 515 tp->ftt_dest = pc + tp->ftt_size + 516 (int8_t)instr[start + 1]; 517 break; 518 519 case FASTTRAP_LOOPNZ: 520 case FASTTRAP_LOOPZ: 521 case FASTTRAP_LOOP: 522 tp->ftt_type = FASTTRAP_T_LOOP; 523 tp->ftt_code = instr[start]; 524 tp->ftt_dest = pc + tp->ftt_size + 525 (int8_t)instr[start + 1]; 526 break; 527 528 case FASTTRAP_JCXZ: 529 tp->ftt_type = FASTTRAP_T_JCXZ; 530 tp->ftt_dest = pc + tp->ftt_size + 531 (int8_t)instr[start + 1]; 532 break; 533 534 case FASTTRAP_CALL: 535 tp->ftt_type = FASTTRAP_T_CALL; 536 tp->ftt_dest = pc + tp->ftt_size + 537 /* LINTED - alignment */ 538 *(int32_t *)&instr[start + 1]; 539 tp->ftt_code = 0; 540 break; 541 542 case FASTTRAP_JMP32: 543 tp->ftt_type = FASTTRAP_T_JMP; 544 tp->ftt_dest = pc + tp->ftt_size + 545 /* LINTED - alignment */ 546 *(int32_t *)&instr[start + 1]; 547 break; 548 case FASTTRAP_JMP8: 549 tp->ftt_type = FASTTRAP_T_JMP; 550 tp->ftt_dest = pc + tp->ftt_size + 551 (int8_t)instr[start + 1]; 552 break; 553 554 case FASTTRAP_PUSHL_EBP: 555 if (start == 0) 556 tp->ftt_type = FASTTRAP_T_PUSHL_EBP; 557 break; 558 559 case FASTTRAP_NOP: 560 #ifdef __amd64 561 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0); 562 563 /* 564 * On amd64 we have to be careful not to confuse a nop 565 * (actually xchgl %eax, %eax) with an instruction using 566 * the same opcode, but that does something different 567 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax). 568 */ 569 if (FASTTRAP_REX_B(rex) == 0) 570 #endif 571 tp->ftt_type = FASTTRAP_T_NOP; 572 break; 573 574 case FASTTRAP_INT3: 575 /* 576 * The pid provider shares the int3 trap with debugger 577 * breakpoints so we can't instrument them. 578 */ 579 ASSERT(instr[start] == FASTTRAP_INSTR); 580 return (-1); 581 582 case FASTTRAP_INT: 583 /* 584 * Interrupts seem like they could be traced with 585 * no negative implications, but it's possible that 586 * a thread could be redirected by the trap handling 587 * code which would eventually return to the 588 * instruction after the interrupt. If the interrupt 589 * were in our scratch space, the subsequent 590 * instruction might be overwritten before we return. 591 * Accordingly we refuse to instrument any interrupt. 592 */ 593 return (-1); 594 } 595 } 596 597 #ifdef __amd64 598 if (p->p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) { 599 /* 600 * If the process is 64-bit and the instruction type is still 601 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an 602 * execute it -- we need to watch for %rip-relative 603 * addressing mode. See the portion of fasttrap_pid_probe() 604 * below where we handle tracepoints with type 605 * FASTTRAP_T_COMMON for how we emulate instructions that 606 * employ %rip-relative addressing. 607 */ 608 if (rmindex != -1) { 609 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]); 610 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]); 611 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]); 612 613 ASSERT(rmindex > start); 614 615 if (mod == 0 && rm == 5) { 616 /* 617 * We need to be sure to avoid other 618 * registers used by this instruction. While 619 * the reg field may determine the op code 620 * rather than denoting a register, assuming 621 * that it denotes a register is always safe. 622 * We leave the REX field intact and use 623 * whatever value's there for simplicity. 624 */ 625 if (reg != 0) { 626 tp->ftt_ripmode = FASTTRAP_RIP_1 | 627 (FASTTRAP_RIP_X * 628 FASTTRAP_REX_B(rex)); 629 rm = 0; 630 } else { 631 tp->ftt_ripmode = FASTTRAP_RIP_2 | 632 (FASTTRAP_RIP_X * 633 FASTTRAP_REX_B(rex)); 634 rm = 1; 635 } 636 637 tp->ftt_modrm = tp->ftt_instr[rmindex]; 638 tp->ftt_instr[rmindex] = 639 FASTTRAP_MODRM(2, reg, rm); 640 } 641 } 642 } 643 #endif 644 645 return (0); 646 } 647 648 int 649 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp) 650 { 651 fasttrap_instr_t instr = FASTTRAP_INSTR; 652 653 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0) 654 return (-1); 655 656 return (0); 657 } 658 659 int 660 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp) 661 { 662 uint8_t instr; 663 664 /* 665 * Distinguish between read or write failures and a changed 666 * instruction. 667 */ 668 if (uread(p, &instr, 1, tp->ftt_pc) != 0) 669 return (0); 670 if (instr != FASTTRAP_INSTR) 671 return (0); 672 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0) 673 return (-1); 674 675 return (0); 676 } 677 678 #ifdef __amd64 679 static uintptr_t 680 fasttrap_fulword_noerr(const void *uaddr) 681 { 682 uintptr_t ret; 683 684 if ((ret = fasttrap_fulword(uaddr)) != -1) 685 return (ret); 686 687 return (0); 688 } 689 #endif 690 691 static uint32_t 692 fasttrap_fuword32_noerr(const void *uaddr) 693 { 694 uint32_t ret; 695 696 if ((ret = fasttrap_fuword32(uaddr)) != -1) 697 return (ret); 698 699 return (0); 700 } 701 702 static void 703 fasttrap_return_common(struct reg *rp, uintptr_t pc, pid_t pid, 704 uintptr_t new_pc) 705 { 706 fasttrap_tracepoint_t *tp; 707 fasttrap_bucket_t *bucket; 708 fasttrap_id_t *id; 709 #ifdef illumos 710 kmutex_t *pid_mtx; 711 712 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 713 mutex_enter(pid_mtx); 714 #else 715 struct rm_priotracker tracker; 716 717 rm_rlock(&fasttrap_tp_lock, &tracker); 718 #endif 719 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 720 721 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 722 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 723 tp->ftt_proc->ftpc_acount != 0) 724 break; 725 } 726 727 /* 728 * Don't sweat it if we can't find the tracepoint again; unlike 729 * when we're in fasttrap_pid_probe(), finding the tracepoint here 730 * is not essential to the correct execution of the process. 731 */ 732 if (tp == NULL) { 733 #ifdef illumos 734 mutex_exit(pid_mtx); 735 #else 736 rm_runlock(&fasttrap_tp_lock, &tracker); 737 #endif 738 return; 739 } 740 741 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) { 742 /* 743 * If there's a branch that could act as a return site, we 744 * need to trace it, and check here if the program counter is 745 * external to the function. 746 */ 747 if (tp->ftt_type != FASTTRAP_T_RET && 748 tp->ftt_type != FASTTRAP_T_RET16 && 749 new_pc - id->fti_probe->ftp_faddr < 750 id->fti_probe->ftp_fsize) 751 continue; 752 753 dtrace_probe(id->fti_probe->ftp_id, 754 pc - id->fti_probe->ftp_faddr, 755 rp->r_rax, rp->r_rbx, 0, 0); 756 } 757 758 #ifdef illumos 759 mutex_exit(pid_mtx); 760 #else 761 rm_runlock(&fasttrap_tp_lock, &tracker); 762 #endif 763 } 764 765 static void 766 fasttrap_sigsegv(proc_t *p, kthread_t *t, uintptr_t addr) 767 { 768 #ifdef illumos 769 sigqueue_t *sqp = kmem_zalloc(sizeof (sigqueue_t), KM_SLEEP); 770 771 sqp->sq_info.si_signo = SIGSEGV; 772 sqp->sq_info.si_code = SEGV_MAPERR; 773 sqp->sq_info.si_addr = (caddr_t)addr; 774 775 mutex_enter(&p->p_lock); 776 sigaddqa(p, t, sqp); 777 mutex_exit(&p->p_lock); 778 779 if (t != NULL) 780 aston(t); 781 #else 782 ksiginfo_t *ksi = kmem_zalloc(sizeof (ksiginfo_t), KM_SLEEP); 783 784 ksiginfo_init(ksi); 785 ksi->ksi_signo = SIGSEGV; 786 ksi->ksi_code = SEGV_MAPERR; 787 ksi->ksi_addr = (caddr_t)addr; 788 (void) tdksignal(t, SIGSEGV, ksi); 789 #endif 790 } 791 792 #ifdef __amd64 793 static void 794 fasttrap_usdt_args64(fasttrap_probe_t *probe, struct reg *rp, int argc, 795 uintptr_t *argv) 796 { 797 int i, x, cap = MIN(argc, probe->ftp_nargs); 798 uintptr_t *stack = (uintptr_t *)rp->r_rsp; 799 800 for (i = 0; i < cap; i++) { 801 x = probe->ftp_argmap[i]; 802 803 if (x < 6) 804 argv[i] = (&rp->r_rdi)[x]; 805 else 806 argv[i] = fasttrap_fulword_noerr(&stack[x]); 807 } 808 809 for (; i < argc; i++) { 810 argv[i] = 0; 811 } 812 } 813 #endif 814 815 static void 816 fasttrap_usdt_args32(fasttrap_probe_t *probe, struct reg *rp, int argc, 817 uint32_t *argv) 818 { 819 int i, x, cap = MIN(argc, probe->ftp_nargs); 820 uint32_t *stack = (uint32_t *)rp->r_rsp; 821 822 for (i = 0; i < cap; i++) { 823 x = probe->ftp_argmap[i]; 824 825 argv[i] = fasttrap_fuword32_noerr(&stack[x]); 826 } 827 828 for (; i < argc; i++) { 829 argv[i] = 0; 830 } 831 } 832 833 static int 834 fasttrap_do_seg(fasttrap_tracepoint_t *tp, struct reg *rp, uintptr_t *addr) 835 { 836 proc_t *p = curproc; 837 #ifdef __i386__ 838 struct segment_descriptor *desc; 839 #else 840 struct user_segment_descriptor *desc; 841 #endif 842 uint16_t sel = 0, ndx, type; 843 uintptr_t limit; 844 845 switch (tp->ftt_segment) { 846 case FASTTRAP_SEG_CS: 847 sel = rp->r_cs; 848 break; 849 case FASTTRAP_SEG_DS: 850 sel = rp->r_ds; 851 break; 852 case FASTTRAP_SEG_ES: 853 sel = rp->r_es; 854 break; 855 case FASTTRAP_SEG_FS: 856 sel = rp->r_fs; 857 break; 858 case FASTTRAP_SEG_GS: 859 sel = rp->r_gs; 860 break; 861 case FASTTRAP_SEG_SS: 862 sel = rp->r_ss; 863 break; 864 } 865 866 /* 867 * Make sure the given segment register specifies a user priority 868 * selector rather than a kernel selector. 869 */ 870 if (ISPL(sel) != SEL_UPL) 871 return (-1); 872 873 ndx = IDXSEL(sel); 874 875 /* 876 * Check the bounds and grab the descriptor out of the specified 877 * descriptor table. 878 */ 879 if (ISLDT(sel)) { 880 #ifdef __i386__ 881 if (ndx > p->p_md.md_ldt->ldt_len) 882 return (-1); 883 884 desc = (struct segment_descriptor *) 885 p->p_md.md_ldt[ndx].ldt_base; 886 #else 887 if (ndx > max_ldt_segment) 888 return (-1); 889 890 desc = (struct user_segment_descriptor *) 891 p->p_md.md_ldt[ndx].ldt_base; 892 #endif 893 894 } else { 895 if (ndx >= NGDT) 896 return (-1); 897 898 #ifdef __i386__ 899 desc = &gdt[ndx].sd; 900 #else 901 desc = &gdt[ndx]; 902 #endif 903 } 904 905 /* 906 * The descriptor must have user privilege level and it must be 907 * present in memory. 908 */ 909 if (desc->sd_dpl != SEL_UPL || desc->sd_p != 1) 910 return (-1); 911 912 type = desc->sd_type; 913 914 /* 915 * If the S bit in the type field is not set, this descriptor can 916 * only be used in system context. 917 */ 918 if ((type & 0x10) != 0x10) 919 return (-1); 920 921 limit = USD_GETLIMIT(desc) * (desc->sd_gran ? PAGESIZE : 1); 922 923 if (tp->ftt_segment == FASTTRAP_SEG_CS) { 924 /* 925 * The code/data bit and readable bit must both be set. 926 */ 927 if ((type & 0xa) != 0xa) 928 return (-1); 929 930 if (*addr > limit) 931 return (-1); 932 } else { 933 /* 934 * The code/data bit must be clear. 935 */ 936 if ((type & 0x8) != 0) 937 return (-1); 938 939 /* 940 * If the expand-down bit is clear, we just check the limit as 941 * it would naturally be applied. Otherwise, we need to check 942 * that the address is the range [limit + 1 .. 0xffff] or 943 * [limit + 1 ... 0xffffffff] depending on if the default 944 * operand size bit is set. 945 */ 946 if ((type & 0x4) == 0) { 947 if (*addr > limit) 948 return (-1); 949 } else if (desc->sd_def32) { 950 if (*addr < limit + 1 || 0xffff < *addr) 951 return (-1); 952 } else { 953 if (*addr < limit + 1 || 0xffffffff < *addr) 954 return (-1); 955 } 956 } 957 958 *addr += USD_GETBASE(desc); 959 960 return (0); 961 } 962 963 int 964 fasttrap_pid_probe(struct reg *rp) 965 { 966 proc_t *p = curproc; 967 #ifndef illumos 968 struct rm_priotracker tracker; 969 proc_t *pp; 970 #endif 971 uintptr_t pc = rp->r_rip - 1; 972 uintptr_t new_pc = 0; 973 fasttrap_bucket_t *bucket; 974 #ifdef illumos 975 kmutex_t *pid_mtx; 976 #endif 977 fasttrap_tracepoint_t *tp, tp_local; 978 pid_t pid; 979 dtrace_icookie_t cookie; 980 uint_t is_enabled = 0; 981 982 /* 983 * It's possible that a user (in a veritable orgy of bad planning) 984 * could redirect this thread's flow of control before it reached the 985 * return probe fasttrap. In this case we need to kill the process 986 * since it's in a unrecoverable state. 987 */ 988 if (curthread->t_dtrace_step) { 989 ASSERT(curthread->t_dtrace_on); 990 fasttrap_sigtrap(p, curthread, pc); 991 return (0); 992 } 993 994 /* 995 * Clear all user tracing flags. 996 */ 997 curthread->t_dtrace_ft = 0; 998 curthread->t_dtrace_pc = 0; 999 curthread->t_dtrace_npc = 0; 1000 curthread->t_dtrace_scrpc = 0; 1001 curthread->t_dtrace_astpc = 0; 1002 #ifdef __amd64 1003 curthread->t_dtrace_regv = 0; 1004 #endif 1005 1006 /* 1007 * Treat a child created by a call to vfork(2) as if it were its 1008 * parent. We know that there's only one thread of control in such a 1009 * process: this one. 1010 */ 1011 #ifdef illumos 1012 while (p->p_flag & SVFORK) { 1013 p = p->p_parent; 1014 } 1015 1016 pid = p->p_pid; 1017 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 1018 mutex_enter(pid_mtx); 1019 #else 1020 pp = p; 1021 sx_slock(&proctree_lock); 1022 while (pp->p_vmspace == pp->p_pptr->p_vmspace) 1023 pp = pp->p_pptr; 1024 pid = pp->p_pid; 1025 sx_sunlock(&proctree_lock); 1026 pp = NULL; 1027 1028 rm_rlock(&fasttrap_tp_lock, &tracker); 1029 #endif 1030 1031 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 1032 1033 /* 1034 * Lookup the tracepoint that the process just hit. 1035 */ 1036 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 1037 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 1038 tp->ftt_proc->ftpc_acount != 0) 1039 break; 1040 } 1041 1042 /* 1043 * If we couldn't find a matching tracepoint, either a tracepoint has 1044 * been inserted without using the pid<pid> ioctl interface (see 1045 * fasttrap_ioctl), or somehow we have mislaid this tracepoint. 1046 */ 1047 if (tp == NULL) { 1048 #ifdef illumos 1049 mutex_exit(pid_mtx); 1050 #else 1051 rm_runlock(&fasttrap_tp_lock, &tracker); 1052 #endif 1053 return (-1); 1054 } 1055 1056 /* 1057 * Set the program counter to the address of the traced instruction 1058 * so that it looks right in ustack() output. 1059 */ 1060 rp->r_rip = pc; 1061 1062 if (tp->ftt_ids != NULL) { 1063 fasttrap_id_t *id; 1064 1065 #ifdef __amd64 1066 if (p->p_model == DATAMODEL_LP64) { 1067 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 1068 fasttrap_probe_t *probe = id->fti_probe; 1069 1070 if (id->fti_ptype == DTFTP_ENTRY) { 1071 /* 1072 * We note that this was an entry 1073 * probe to help ustack() find the 1074 * first caller. 1075 */ 1076 cookie = dtrace_interrupt_disable(); 1077 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 1078 dtrace_probe(probe->ftp_id, rp->r_rdi, 1079 rp->r_rsi, rp->r_rdx, rp->r_rcx, 1080 rp->r_r8); 1081 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 1082 dtrace_interrupt_enable(cookie); 1083 } else if (id->fti_ptype == DTFTP_IS_ENABLED) { 1084 /* 1085 * Note that in this case, we don't 1086 * call dtrace_probe() since it's only 1087 * an artificial probe meant to change 1088 * the flow of control so that it 1089 * encounters the true probe. 1090 */ 1091 is_enabled = 1; 1092 } else if (probe->ftp_argmap == NULL) { 1093 dtrace_probe(probe->ftp_id, rp->r_rdi, 1094 rp->r_rsi, rp->r_rdx, rp->r_rcx, 1095 rp->r_r8); 1096 } else { 1097 uintptr_t t[5]; 1098 1099 fasttrap_usdt_args64(probe, rp, 1100 sizeof (t) / sizeof (t[0]), t); 1101 1102 dtrace_probe(probe->ftp_id, t[0], t[1], 1103 t[2], t[3], t[4]); 1104 } 1105 } 1106 } else { 1107 #endif 1108 uintptr_t s0, s1, s2, s3, s4, s5; 1109 uint32_t *stack = (uint32_t *)rp->r_rsp; 1110 1111 /* 1112 * In 32-bit mode, all arguments are passed on the 1113 * stack. If this is a function entry probe, we need 1114 * to skip the first entry on the stack as it 1115 * represents the return address rather than a 1116 * parameter to the function. 1117 */ 1118 s0 = fasttrap_fuword32_noerr(&stack[0]); 1119 s1 = fasttrap_fuword32_noerr(&stack[1]); 1120 s2 = fasttrap_fuword32_noerr(&stack[2]); 1121 s3 = fasttrap_fuword32_noerr(&stack[3]); 1122 s4 = fasttrap_fuword32_noerr(&stack[4]); 1123 s5 = fasttrap_fuword32_noerr(&stack[5]); 1124 1125 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 1126 fasttrap_probe_t *probe = id->fti_probe; 1127 1128 if (id->fti_ptype == DTFTP_ENTRY) { 1129 /* 1130 * We note that this was an entry 1131 * probe to help ustack() find the 1132 * first caller. 1133 */ 1134 cookie = dtrace_interrupt_disable(); 1135 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 1136 dtrace_probe(probe->ftp_id, s1, s2, 1137 s3, s4, s5); 1138 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 1139 dtrace_interrupt_enable(cookie); 1140 } else if (id->fti_ptype == DTFTP_IS_ENABLED) { 1141 /* 1142 * Note that in this case, we don't 1143 * call dtrace_probe() since it's only 1144 * an artificial probe meant to change 1145 * the flow of control so that it 1146 * encounters the true probe. 1147 */ 1148 is_enabled = 1; 1149 } else if (probe->ftp_argmap == NULL) { 1150 dtrace_probe(probe->ftp_id, s0, s1, 1151 s2, s3, s4); 1152 } else { 1153 uint32_t t[5]; 1154 1155 fasttrap_usdt_args32(probe, rp, 1156 sizeof (t) / sizeof (t[0]), t); 1157 1158 dtrace_probe(probe->ftp_id, t[0], t[1], 1159 t[2], t[3], t[4]); 1160 } 1161 } 1162 #ifdef __amd64 1163 } 1164 #endif 1165 } 1166 1167 /* 1168 * We're about to do a bunch of work so we cache a local copy of 1169 * the tracepoint to emulate the instruction, and then find the 1170 * tracepoint again later if we need to light up any return probes. 1171 */ 1172 tp_local = *tp; 1173 #ifdef illumos 1174 mutex_exit(pid_mtx); 1175 #else 1176 rm_runlock(&fasttrap_tp_lock, &tracker); 1177 #endif 1178 tp = &tp_local; 1179 1180 /* 1181 * Set the program counter to appear as though the traced instruction 1182 * had completely executed. This ensures that fasttrap_getreg() will 1183 * report the expected value for REG_RIP. 1184 */ 1185 rp->r_rip = pc + tp->ftt_size; 1186 1187 /* 1188 * If there's an is-enabled probe connected to this tracepoint it 1189 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax' 1190 * instruction that was placed there by DTrace when the binary was 1191 * linked. As this probe is, in fact, enabled, we need to stuff 1 1192 * into %eax or %rax. Accordingly, we can bypass all the instruction 1193 * emulation logic since we know the inevitable result. It's possible 1194 * that a user could construct a scenario where the 'is-enabled' 1195 * probe was on some other instruction, but that would be a rather 1196 * exotic way to shoot oneself in the foot. 1197 */ 1198 if (is_enabled) { 1199 rp->r_rax = 1; 1200 new_pc = rp->r_rip; 1201 goto done; 1202 } 1203 1204 /* 1205 * We emulate certain types of instructions to ensure correctness 1206 * (in the case of position dependent instructions) or optimize 1207 * common cases. The rest we have the thread execute back in user- 1208 * land. 1209 */ 1210 switch (tp->ftt_type) { 1211 case FASTTRAP_T_RET: 1212 case FASTTRAP_T_RET16: 1213 { 1214 uintptr_t dst = 0; 1215 uintptr_t addr = 0; 1216 int ret = 0; 1217 1218 /* 1219 * We have to emulate _every_ facet of the behavior of a ret 1220 * instruction including what happens if the load from %esp 1221 * fails; in that case, we send a SIGSEGV. 1222 */ 1223 #ifdef __amd64 1224 if (p->p_model == DATAMODEL_NATIVE) { 1225 ret = dst = fasttrap_fulword((void *)rp->r_rsp); 1226 addr = rp->r_rsp + sizeof (uintptr_t); 1227 } else { 1228 #endif 1229 uint32_t dst32; 1230 ret = dst32 = fasttrap_fuword32((void *)rp->r_rsp); 1231 dst = dst32; 1232 addr = rp->r_rsp + sizeof (uint32_t); 1233 #ifdef __amd64 1234 } 1235 #endif 1236 1237 if (ret == -1) { 1238 fasttrap_sigsegv(p, curthread, rp->r_rsp); 1239 new_pc = pc; 1240 break; 1241 } 1242 1243 if (tp->ftt_type == FASTTRAP_T_RET16) 1244 addr += tp->ftt_dest; 1245 1246 rp->r_rsp = addr; 1247 new_pc = dst; 1248 break; 1249 } 1250 1251 case FASTTRAP_T_JCC: 1252 { 1253 uint_t taken = 0; 1254 1255 switch (tp->ftt_code) { 1256 case FASTTRAP_JO: 1257 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) != 0; 1258 break; 1259 case FASTTRAP_JNO: 1260 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0; 1261 break; 1262 case FASTTRAP_JB: 1263 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0; 1264 break; 1265 case FASTTRAP_JAE: 1266 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0; 1267 break; 1268 case FASTTRAP_JE: 1269 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0; 1270 break; 1271 case FASTTRAP_JNE: 1272 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0; 1273 break; 1274 case FASTTRAP_JBE: 1275 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0 || 1276 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0; 1277 break; 1278 case FASTTRAP_JA: 1279 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0 && 1280 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0; 1281 break; 1282 case FASTTRAP_JS: 1283 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) != 0; 1284 break; 1285 case FASTTRAP_JNS: 1286 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0; 1287 break; 1288 case FASTTRAP_JP: 1289 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) != 0; 1290 break; 1291 case FASTTRAP_JNP: 1292 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) == 0; 1293 break; 1294 case FASTTRAP_JL: 1295 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) != 1296 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1297 break; 1298 case FASTTRAP_JGE: 1299 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) == 1300 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1301 break; 1302 case FASTTRAP_JLE: 1303 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 || 1304 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) != 1305 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1306 break; 1307 case FASTTRAP_JG: 1308 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 && 1309 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) == 1310 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1311 break; 1312 1313 } 1314 1315 if (taken) 1316 new_pc = tp->ftt_dest; 1317 else 1318 new_pc = pc + tp->ftt_size; 1319 break; 1320 } 1321 1322 case FASTTRAP_T_LOOP: 1323 { 1324 uint_t taken = 0; 1325 #ifdef __amd64 1326 greg_t cx = rp->r_rcx--; 1327 #else 1328 greg_t cx = rp->r_ecx--; 1329 #endif 1330 1331 switch (tp->ftt_code) { 1332 case FASTTRAP_LOOPNZ: 1333 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 && 1334 cx != 0; 1335 break; 1336 case FASTTRAP_LOOPZ: 1337 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 && 1338 cx != 0; 1339 break; 1340 case FASTTRAP_LOOP: 1341 taken = (cx != 0); 1342 break; 1343 } 1344 1345 if (taken) 1346 new_pc = tp->ftt_dest; 1347 else 1348 new_pc = pc + tp->ftt_size; 1349 break; 1350 } 1351 1352 case FASTTRAP_T_JCXZ: 1353 { 1354 #ifdef __amd64 1355 greg_t cx = rp->r_rcx; 1356 #else 1357 greg_t cx = rp->r_ecx; 1358 #endif 1359 1360 if (cx == 0) 1361 new_pc = tp->ftt_dest; 1362 else 1363 new_pc = pc + tp->ftt_size; 1364 break; 1365 } 1366 1367 case FASTTRAP_T_PUSHL_EBP: 1368 { 1369 int ret = 0; 1370 1371 #ifdef __amd64 1372 if (p->p_model == DATAMODEL_NATIVE) { 1373 rp->r_rsp -= sizeof (uintptr_t); 1374 ret = fasttrap_sulword((void *)rp->r_rsp, rp->r_rbp); 1375 } else { 1376 #endif 1377 rp->r_rsp -= sizeof (uint32_t); 1378 ret = fasttrap_suword32((void *)rp->r_rsp, rp->r_rbp); 1379 #ifdef __amd64 1380 } 1381 #endif 1382 1383 if (ret == -1) { 1384 fasttrap_sigsegv(p, curthread, rp->r_rsp); 1385 new_pc = pc; 1386 break; 1387 } 1388 1389 new_pc = pc + tp->ftt_size; 1390 break; 1391 } 1392 1393 case FASTTRAP_T_NOP: 1394 new_pc = pc + tp->ftt_size; 1395 break; 1396 1397 case FASTTRAP_T_JMP: 1398 case FASTTRAP_T_CALL: 1399 if (tp->ftt_code == 0) { 1400 new_pc = tp->ftt_dest; 1401 } else { 1402 uintptr_t value, addr = tp->ftt_dest; 1403 1404 if (tp->ftt_base != FASTTRAP_NOREG) 1405 addr += fasttrap_getreg(rp, tp->ftt_base); 1406 if (tp->ftt_index != FASTTRAP_NOREG) 1407 addr += fasttrap_getreg(rp, tp->ftt_index) << 1408 tp->ftt_scale; 1409 1410 if (tp->ftt_code == 1) { 1411 /* 1412 * If there's a segment prefix for this 1413 * instruction, we'll need to check permissions 1414 * and bounds on the given selector, and adjust 1415 * the address accordingly. 1416 */ 1417 if (tp->ftt_segment != FASTTRAP_SEG_NONE && 1418 fasttrap_do_seg(tp, rp, &addr) != 0) { 1419 fasttrap_sigsegv(p, curthread, addr); 1420 new_pc = pc; 1421 break; 1422 } 1423 1424 #ifdef __amd64 1425 if (p->p_model == DATAMODEL_NATIVE) { 1426 #endif 1427 if ((value = fasttrap_fulword((void *)addr)) 1428 == -1) { 1429 fasttrap_sigsegv(p, curthread, 1430 addr); 1431 new_pc = pc; 1432 break; 1433 } 1434 new_pc = value; 1435 #ifdef __amd64 1436 } else { 1437 uint32_t value32; 1438 addr = (uintptr_t)(uint32_t)addr; 1439 if ((value32 = fasttrap_fuword32((void *)addr)) 1440 == -1) { 1441 fasttrap_sigsegv(p, curthread, 1442 addr); 1443 new_pc = pc; 1444 break; 1445 } 1446 new_pc = value32; 1447 } 1448 #endif 1449 } else { 1450 new_pc = addr; 1451 } 1452 } 1453 1454 /* 1455 * If this is a call instruction, we need to push the return 1456 * address onto the stack. If this fails, we send the process 1457 * a SIGSEGV and reset the pc to emulate what would happen if 1458 * this instruction weren't traced. 1459 */ 1460 if (tp->ftt_type == FASTTRAP_T_CALL) { 1461 int ret = 0; 1462 uintptr_t addr = 0, pcps; 1463 #ifdef __amd64 1464 if (p->p_model == DATAMODEL_NATIVE) { 1465 addr = rp->r_rsp - sizeof (uintptr_t); 1466 pcps = pc + tp->ftt_size; 1467 ret = fasttrap_sulword((void *)addr, pcps); 1468 } else { 1469 #endif 1470 addr = rp->r_rsp - sizeof (uint32_t); 1471 pcps = (uint32_t)(pc + tp->ftt_size); 1472 ret = fasttrap_suword32((void *)addr, pcps); 1473 #ifdef __amd64 1474 } 1475 #endif 1476 1477 if (ret == -1) { 1478 fasttrap_sigsegv(p, curthread, addr); 1479 new_pc = pc; 1480 break; 1481 } 1482 1483 rp->r_rsp = addr; 1484 } 1485 1486 break; 1487 1488 case FASTTRAP_T_COMMON: 1489 { 1490 uintptr_t addr; 1491 #if defined(__amd64) 1492 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22]; 1493 #else 1494 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7]; 1495 #endif 1496 uint_t i = 0; 1497 #ifdef illumos 1498 klwp_t *lwp = ttolwp(curthread); 1499 1500 /* 1501 * Compute the address of the ulwp_t and step over the 1502 * ul_self pointer. The method used to store the user-land 1503 * thread pointer is very different on 32- and 64-bit 1504 * kernels. 1505 */ 1506 #if defined(__amd64) 1507 if (p->p_model == DATAMODEL_LP64) { 1508 addr = lwp->lwp_pcb.pcb_fsbase; 1509 addr += sizeof (void *); 1510 } else { 1511 addr = lwp->lwp_pcb.pcb_gsbase; 1512 addr += sizeof (caddr32_t); 1513 } 1514 #else 1515 addr = USD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc); 1516 addr += sizeof (void *); 1517 #endif 1518 #else /* !illumos */ 1519 fasttrap_scrspace_t *scrspace; 1520 scrspace = fasttrap_scraddr(curthread, tp->ftt_proc); 1521 if (scrspace == NULL) { 1522 /* 1523 * We failed to allocate scratch space for this thread. 1524 * Try to write the original instruction back out and 1525 * reset the pc. 1526 */ 1527 if (fasttrap_copyout(tp->ftt_instr, (void *)pc, 1528 tp->ftt_size)) 1529 fasttrap_sigtrap(p, curthread, pc); 1530 new_pc = pc; 1531 break; 1532 } 1533 addr = scrspace->ftss_addr; 1534 #endif /* illumos */ 1535 1536 /* 1537 * Generic Instruction Tracing 1538 * --------------------------- 1539 * 1540 * This is the layout of the scratch space in the user-land 1541 * thread structure for our generated instructions. 1542 * 1543 * 32-bit mode bytes 1544 * ------------------------ ----- 1545 * a: <original instruction> <= 15 1546 * jmp <pc + tp->ftt_size> 5 1547 * b: <original instruction> <= 15 1548 * int T_DTRACE_RET 2 1549 * ----- 1550 * <= 37 1551 * 1552 * 64-bit mode bytes 1553 * ------------------------ ----- 1554 * a: <original instruction> <= 15 1555 * jmp 0(%rip) 6 1556 * <pc + tp->ftt_size> 8 1557 * b: <original instruction> <= 15 1558 * int T_DTRACE_RET 2 1559 * ----- 1560 * <= 46 1561 * 1562 * The %pc is set to a, and curthread->t_dtrace_astpc is set 1563 * to b. If we encounter a signal on the way out of the 1564 * kernel, trap() will set %pc to curthread->t_dtrace_astpc 1565 * so that we execute the original instruction and re-enter 1566 * the kernel rather than redirecting to the next instruction. 1567 * 1568 * If there are return probes (so we know that we're going to 1569 * need to reenter the kernel after executing the original 1570 * instruction), the scratch space will just contain the 1571 * original instruction followed by an interrupt -- the same 1572 * data as at b. 1573 * 1574 * %rip-relative Addressing 1575 * ------------------------ 1576 * 1577 * There's a further complication in 64-bit mode due to %rip- 1578 * relative addressing. While this is clearly a beneficial 1579 * architectural decision for position independent code, it's 1580 * hard not to see it as a personal attack against the pid 1581 * provider since before there was a relatively small set of 1582 * instructions to emulate; with %rip-relative addressing, 1583 * almost every instruction can potentially depend on the 1584 * address at which it's executed. Rather than emulating 1585 * the broad spectrum of instructions that can now be 1586 * position dependent, we emulate jumps and others as in 1587 * 32-bit mode, and take a different tack for instructions 1588 * using %rip-relative addressing. 1589 * 1590 * For every instruction that uses the ModRM byte, the 1591 * in-kernel disassembler reports its location. We use the 1592 * ModRM byte to identify that an instruction uses 1593 * %rip-relative addressing and to see what other registers 1594 * the instruction uses. To emulate those instructions, 1595 * we modify the instruction to be %rax-relative rather than 1596 * %rip-relative (or %rcx-relative if the instruction uses 1597 * %rax; or %r8- or %r9-relative if the REX.B is present so 1598 * we don't have to rewrite the REX prefix). We then load 1599 * the value that %rip would have been into the scratch 1600 * register and generate an instruction to reset the scratch 1601 * register back to its original value. The instruction 1602 * sequence looks like this: 1603 * 1604 * 64-mode %rip-relative bytes 1605 * ------------------------ ----- 1606 * a: <modified instruction> <= 15 1607 * movq $<value>, %<scratch> 6 1608 * jmp 0(%rip) 6 1609 * <pc + tp->ftt_size> 8 1610 * b: <modified instruction> <= 15 1611 * int T_DTRACE_RET 2 1612 * ----- 1613 * 52 1614 * 1615 * We set curthread->t_dtrace_regv so that upon receiving 1616 * a signal we can reset the value of the scratch register. 1617 */ 1618 1619 ASSERT(tp->ftt_size <= FASTTRAP_MAX_INSTR_SIZE); 1620 1621 curthread->t_dtrace_scrpc = addr; 1622 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1623 i += tp->ftt_size; 1624 1625 #ifdef __amd64 1626 if (tp->ftt_ripmode != 0) { 1627 greg_t *reg = NULL; 1628 1629 ASSERT(p->p_model == DATAMODEL_LP64); 1630 ASSERT(tp->ftt_ripmode & 1631 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2)); 1632 1633 /* 1634 * If this was a %rip-relative instruction, we change 1635 * it to be either a %rax- or %rcx-relative 1636 * instruction (depending on whether those registers 1637 * are used as another operand; or %r8- or %r9- 1638 * relative depending on the value of REX.B). We then 1639 * set that register and generate a movq instruction 1640 * to reset the value. 1641 */ 1642 if (tp->ftt_ripmode & FASTTRAP_RIP_X) 1643 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1); 1644 else 1645 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0); 1646 1647 if (tp->ftt_ripmode & FASTTRAP_RIP_1) 1648 scratch[i++] = FASTTRAP_MOV_EAX; 1649 else 1650 scratch[i++] = FASTTRAP_MOV_ECX; 1651 1652 switch (tp->ftt_ripmode) { 1653 case FASTTRAP_RIP_1: 1654 reg = &rp->r_rax; 1655 curthread->t_dtrace_reg = REG_RAX; 1656 break; 1657 case FASTTRAP_RIP_2: 1658 reg = &rp->r_rcx; 1659 curthread->t_dtrace_reg = REG_RCX; 1660 break; 1661 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X: 1662 reg = &rp->r_r8; 1663 curthread->t_dtrace_reg = REG_R8; 1664 break; 1665 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X: 1666 reg = &rp->r_r9; 1667 curthread->t_dtrace_reg = REG_R9; 1668 break; 1669 } 1670 1671 /* LINTED - alignment */ 1672 *(uint64_t *)&scratch[i] = *reg; 1673 curthread->t_dtrace_regv = *reg; 1674 *reg = pc + tp->ftt_size; 1675 i += sizeof (uint64_t); 1676 } 1677 #endif 1678 1679 /* 1680 * Generate the branch instruction to what would have 1681 * normally been the subsequent instruction. In 32-bit mode, 1682 * this is just a relative branch; in 64-bit mode this is a 1683 * %rip-relative branch that loads the 64-bit pc value 1684 * immediately after the jmp instruction. 1685 */ 1686 #ifdef __amd64 1687 if (p->p_model == DATAMODEL_LP64) { 1688 scratch[i++] = FASTTRAP_GROUP5_OP; 1689 scratch[i++] = FASTTRAP_MODRM(0, 4, 5); 1690 /* LINTED - alignment */ 1691 *(uint32_t *)&scratch[i] = 0; 1692 i += sizeof (uint32_t); 1693 /* LINTED - alignment */ 1694 *(uint64_t *)&scratch[i] = pc + tp->ftt_size; 1695 i += sizeof (uint64_t); 1696 } else { 1697 #endif 1698 /* 1699 * Set up the jmp to the next instruction; note that 1700 * the size of the traced instruction cancels out. 1701 */ 1702 scratch[i++] = FASTTRAP_JMP32; 1703 /* LINTED - alignment */ 1704 *(uint32_t *)&scratch[i] = pc - addr - 5; 1705 i += sizeof (uint32_t); 1706 #ifdef __amd64 1707 } 1708 #endif 1709 1710 curthread->t_dtrace_astpc = addr + i; 1711 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1712 i += tp->ftt_size; 1713 scratch[i++] = FASTTRAP_INT; 1714 scratch[i++] = T_DTRACE_RET; 1715 1716 ASSERT(i <= sizeof (scratch)); 1717 1718 #ifdef illumos 1719 if (fasttrap_copyout(scratch, (char *)addr, i)) { 1720 #else 1721 if (uwrite(p, scratch, i, addr)) { 1722 #endif 1723 fasttrap_sigtrap(p, curthread, pc); 1724 new_pc = pc; 1725 break; 1726 } 1727 if (tp->ftt_retids != NULL) { 1728 curthread->t_dtrace_step = 1; 1729 curthread->t_dtrace_ret = 1; 1730 new_pc = curthread->t_dtrace_astpc; 1731 } else { 1732 new_pc = curthread->t_dtrace_scrpc; 1733 } 1734 1735 curthread->t_dtrace_pc = pc; 1736 curthread->t_dtrace_npc = pc + tp->ftt_size; 1737 curthread->t_dtrace_on = 1; 1738 break; 1739 } 1740 1741 default: 1742 panic("fasttrap: mishandled an instruction"); 1743 } 1744 1745 done: 1746 /* 1747 * If there were no return probes when we first found the tracepoint, 1748 * we should feel no obligation to honor any return probes that were 1749 * subsequently enabled -- they'll just have to wait until the next 1750 * time around. 1751 */ 1752 if (tp->ftt_retids != NULL) { 1753 /* 1754 * We need to wait until the results of the instruction are 1755 * apparent before invoking any return probes. If this 1756 * instruction was emulated we can just call 1757 * fasttrap_return_common(); if it needs to be executed, we 1758 * need to wait until the user thread returns to the kernel. 1759 */ 1760 if (tp->ftt_type != FASTTRAP_T_COMMON) { 1761 /* 1762 * Set the program counter to the address of the traced 1763 * instruction so that it looks right in ustack() 1764 * output. We had previously set it to the end of the 1765 * instruction to simplify %rip-relative addressing. 1766 */ 1767 rp->r_rip = pc; 1768 1769 fasttrap_return_common(rp, pc, pid, new_pc); 1770 } else { 1771 ASSERT(curthread->t_dtrace_ret != 0); 1772 ASSERT(curthread->t_dtrace_pc == pc); 1773 ASSERT(curthread->t_dtrace_scrpc != 0); 1774 ASSERT(new_pc == curthread->t_dtrace_astpc); 1775 } 1776 } 1777 1778 rp->r_rip = new_pc; 1779 1780 #ifndef illumos 1781 PROC_LOCK(p); 1782 proc_write_regs(curthread, rp); 1783 PROC_UNLOCK(p); 1784 #endif 1785 1786 return (0); 1787 } 1788 1789 int 1790 fasttrap_return_probe(struct reg *rp) 1791 { 1792 proc_t *p = curproc; 1793 uintptr_t pc = curthread->t_dtrace_pc; 1794 uintptr_t npc = curthread->t_dtrace_npc; 1795 1796 curthread->t_dtrace_pc = 0; 1797 curthread->t_dtrace_npc = 0; 1798 curthread->t_dtrace_scrpc = 0; 1799 curthread->t_dtrace_astpc = 0; 1800 1801 #ifdef illumos 1802 /* 1803 * Treat a child created by a call to vfork(2) as if it were its 1804 * parent. We know that there's only one thread of control in such a 1805 * process: this one. 1806 */ 1807 while (p->p_flag & SVFORK) { 1808 p = p->p_parent; 1809 } 1810 #endif 1811 1812 /* 1813 * We set rp->r_rip to the address of the traced instruction so 1814 * that it appears to dtrace_probe() that we're on the original 1815 * instruction, and so that the user can't easily detect our 1816 * complex web of lies. dtrace_return_probe() (our caller) 1817 * will correctly set %pc after we return. 1818 */ 1819 rp->r_rip = pc; 1820 1821 fasttrap_return_common(rp, pc, p->p_pid, npc); 1822 1823 return (0); 1824 } 1825 1826 /*ARGSUSED*/ 1827 uint64_t 1828 fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 1829 int aframes) 1830 { 1831 struct reg r; 1832 1833 fill_regs(curthread, &r); 1834 1835 return (fasttrap_anarg(&r, 1, argno)); 1836 } 1837 1838 /*ARGSUSED*/ 1839 uint64_t 1840 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 1841 int aframes) 1842 { 1843 struct reg r; 1844 1845 fill_regs(curthread, &r); 1846 1847 return (fasttrap_anarg(&r, 0, argno)); 1848 } 1849 1850 static ulong_t 1851 fasttrap_getreg(struct reg *rp, uint_t reg) 1852 { 1853 #ifdef __amd64 1854 switch (reg) { 1855 case REG_R15: return (rp->r_r15); 1856 case REG_R14: return (rp->r_r14); 1857 case REG_R13: return (rp->r_r13); 1858 case REG_R12: return (rp->r_r12); 1859 case REG_R11: return (rp->r_r11); 1860 case REG_R10: return (rp->r_r10); 1861 case REG_R9: return (rp->r_r9); 1862 case REG_R8: return (rp->r_r8); 1863 case REG_RDI: return (rp->r_rdi); 1864 case REG_RSI: return (rp->r_rsi); 1865 case REG_RBP: return (rp->r_rbp); 1866 case REG_RBX: return (rp->r_rbx); 1867 case REG_RDX: return (rp->r_rdx); 1868 case REG_RCX: return (rp->r_rcx); 1869 case REG_RAX: return (rp->r_rax); 1870 case REG_TRAPNO: return (rp->r_trapno); 1871 case REG_ERR: return (rp->r_err); 1872 case REG_RIP: return (rp->r_rip); 1873 case REG_CS: return (rp->r_cs); 1874 case REG_RFL: return (rp->r_rflags); 1875 case REG_RSP: return (rp->r_rsp); 1876 case REG_SS: return (rp->r_ss); 1877 case REG_FS: return (rp->r_fs); 1878 case REG_GS: return (rp->r_gs); 1879 case REG_DS: return (rp->r_ds); 1880 case REG_ES: return (rp->r_es); 1881 case REG_FSBASE: return (rdmsr(MSR_FSBASE)); 1882 case REG_GSBASE: return (rdmsr(MSR_GSBASE)); 1883 } 1884 1885 panic("dtrace: illegal register constant"); 1886 /*NOTREACHED*/ 1887 #else 1888 #define _NGREG 19 1889 if (reg >= _NGREG) 1890 panic("dtrace: illegal register constant"); 1891 1892 return (((greg_t *)&rp->r_gs)[reg]); 1893 #endif 1894 } 1895