1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 * 21 * Portions Copyright 2010 The FreeBSD Foundation 22 * 23 * $FreeBSD$ 24 */ 25 26 /* 27 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 28 * Use is subject to license terms. 29 */ 30 31 #ifdef illumos 32 #pragma ident "%Z%%M% %I% %E% SMI" 33 #endif 34 35 #include <sys/fasttrap_isa.h> 36 #include <sys/fasttrap_impl.h> 37 #include <sys/dtrace.h> 38 #include <sys/dtrace_impl.h> 39 #include <sys/cmn_err.h> 40 #ifdef illumos 41 #include <sys/regset.h> 42 #include <sys/privregs.h> 43 #include <sys/segments.h> 44 #include <sys/x86_archext.h> 45 #else 46 #include <sys/types.h> 47 #include <sys/dtrace_bsd.h> 48 #include <sys/proc.h> 49 #include <sys/rmlock.h> 50 #include <cddl/dev/dtrace/dtrace_cddl.h> 51 #include <cddl/dev/dtrace/x86/regset.h> 52 #include <machine/segments.h> 53 #include <machine/reg.h> 54 #include <machine/pcb.h> 55 #include <machine/trap.h> 56 #endif 57 #include <sys/sysmacros.h> 58 #ifdef illumos 59 #include <sys/trap.h> 60 #include <sys/archsystm.h> 61 #else 62 #include <sys/ptrace.h> 63 #endif /* illumos */ 64 65 #ifdef __i386__ 66 #define r_rax r_eax 67 #define r_rbx r_ebx 68 #define r_rip r_eip 69 #define r_rflags r_eflags 70 #define r_rsp r_esp 71 #define r_rbp r_ebp 72 #endif 73 74 /* 75 * Lossless User-Land Tracing on x86 76 * --------------------------------- 77 * 78 * The execution of most instructions is not dependent on the address; for 79 * these instructions it is sufficient to copy them into the user process's 80 * address space and execute them. To effectively single-step an instruction 81 * in user-land, we copy out the following sequence of instructions to scratch 82 * space in the user thread's ulwp_t structure. 83 * 84 * We then set the program counter (%eip or %rip) to point to this scratch 85 * space. Once execution resumes, the original instruction is executed and 86 * then control flow is redirected to what was originally the subsequent 87 * instruction. If the kernel attemps to deliver a signal while single- 88 * stepping, the signal is deferred and the program counter is moved into the 89 * second sequence of instructions. The second sequence ends in a trap into 90 * the kernel where the deferred signal is then properly handled and delivered. 91 * 92 * For instructions whose execute is position dependent, we perform simple 93 * emulation. These instructions are limited to control transfer 94 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle 95 * of %rip-relative addressing that means that almost any instruction can be 96 * position dependent. For all the details on how we emulate generic 97 * instructions included %rip-relative instructions, see the code in 98 * fasttrap_pid_probe() below where we handle instructions of type 99 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing). 100 */ 101 102 #define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3) 103 #define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7) 104 #define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7) 105 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm)) 106 107 #define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3) 108 #define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7) 109 #define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7) 110 111 #define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1) 112 #define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1) 113 #define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1) 114 #define FASTTRAP_REX_B(rex) ((rex) & 1) 115 #define FASTTRAP_REX(w, r, x, b) \ 116 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b)) 117 118 /* 119 * Single-byte op-codes. 120 */ 121 #define FASTTRAP_PUSHL_EBP 0x55 122 123 #define FASTTRAP_JO 0x70 124 #define FASTTRAP_JNO 0x71 125 #define FASTTRAP_JB 0x72 126 #define FASTTRAP_JAE 0x73 127 #define FASTTRAP_JE 0x74 128 #define FASTTRAP_JNE 0x75 129 #define FASTTRAP_JBE 0x76 130 #define FASTTRAP_JA 0x77 131 #define FASTTRAP_JS 0x78 132 #define FASTTRAP_JNS 0x79 133 #define FASTTRAP_JP 0x7a 134 #define FASTTRAP_JNP 0x7b 135 #define FASTTRAP_JL 0x7c 136 #define FASTTRAP_JGE 0x7d 137 #define FASTTRAP_JLE 0x7e 138 #define FASTTRAP_JG 0x7f 139 140 #define FASTTRAP_NOP 0x90 141 142 #define FASTTRAP_MOV_EAX 0xb8 143 #define FASTTRAP_MOV_ECX 0xb9 144 145 #define FASTTRAP_RET16 0xc2 146 #define FASTTRAP_RET 0xc3 147 148 #define FASTTRAP_LOOPNZ 0xe0 149 #define FASTTRAP_LOOPZ 0xe1 150 #define FASTTRAP_LOOP 0xe2 151 #define FASTTRAP_JCXZ 0xe3 152 153 #define FASTTRAP_CALL 0xe8 154 #define FASTTRAP_JMP32 0xe9 155 #define FASTTRAP_JMP8 0xeb 156 157 #define FASTTRAP_INT3 0xcc 158 #define FASTTRAP_INT 0xcd 159 160 #define FASTTRAP_2_BYTE_OP 0x0f 161 #define FASTTRAP_GROUP5_OP 0xff 162 163 /* 164 * Two-byte op-codes (second byte only). 165 */ 166 #define FASTTRAP_0F_JO 0x80 167 #define FASTTRAP_0F_JNO 0x81 168 #define FASTTRAP_0F_JB 0x82 169 #define FASTTRAP_0F_JAE 0x83 170 #define FASTTRAP_0F_JE 0x84 171 #define FASTTRAP_0F_JNE 0x85 172 #define FASTTRAP_0F_JBE 0x86 173 #define FASTTRAP_0F_JA 0x87 174 #define FASTTRAP_0F_JS 0x88 175 #define FASTTRAP_0F_JNS 0x89 176 #define FASTTRAP_0F_JP 0x8a 177 #define FASTTRAP_0F_JNP 0x8b 178 #define FASTTRAP_0F_JL 0x8c 179 #define FASTTRAP_0F_JGE 0x8d 180 #define FASTTRAP_0F_JLE 0x8e 181 #define FASTTRAP_0F_JG 0x8f 182 183 #define FASTTRAP_EFLAGS_OF 0x800 184 #define FASTTRAP_EFLAGS_DF 0x400 185 #define FASTTRAP_EFLAGS_SF 0x080 186 #define FASTTRAP_EFLAGS_ZF 0x040 187 #define FASTTRAP_EFLAGS_AF 0x010 188 #define FASTTRAP_EFLAGS_PF 0x004 189 #define FASTTRAP_EFLAGS_CF 0x001 190 191 /* 192 * Instruction prefixes. 193 */ 194 #define FASTTRAP_PREFIX_OPERAND 0x66 195 #define FASTTRAP_PREFIX_ADDRESS 0x67 196 #define FASTTRAP_PREFIX_CS 0x2E 197 #define FASTTRAP_PREFIX_DS 0x3E 198 #define FASTTRAP_PREFIX_ES 0x26 199 #define FASTTRAP_PREFIX_FS 0x64 200 #define FASTTRAP_PREFIX_GS 0x65 201 #define FASTTRAP_PREFIX_SS 0x36 202 #define FASTTRAP_PREFIX_LOCK 0xF0 203 #define FASTTRAP_PREFIX_REP 0xF3 204 #define FASTTRAP_PREFIX_REPNE 0xF2 205 206 #define FASTTRAP_NOREG 0xff 207 208 /* 209 * Map between instruction register encodings and the kernel constants which 210 * correspond to indicies into struct regs. 211 */ 212 #ifdef __amd64 213 static const uint8_t regmap[16] = { 214 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI, 215 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15, 216 }; 217 #else 218 static const uint8_t regmap[8] = { 219 EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI 220 }; 221 #endif 222 223 static ulong_t fasttrap_getreg(struct reg *, uint_t); 224 225 static uint64_t 226 fasttrap_anarg(struct reg *rp, int function_entry, int argno) 227 { 228 uint64_t value = 0; 229 int shift = function_entry ? 1 : 0; 230 231 #ifdef __amd64 232 if (curproc->p_model == DATAMODEL_LP64) { 233 uintptr_t *stack; 234 235 /* 236 * In 64-bit mode, the first six arguments are stored in 237 * registers. 238 */ 239 if (argno < 6) 240 switch (argno) { 241 case 0: 242 return (rp->r_rdi); 243 case 1: 244 return (rp->r_rsi); 245 case 2: 246 return (rp->r_rdx); 247 case 3: 248 return (rp->r_rcx); 249 case 4: 250 return (rp->r_r8); 251 case 5: 252 return (rp->r_r9); 253 } 254 255 stack = (uintptr_t *)rp->r_rsp; 256 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 257 value = dtrace_fulword(&stack[argno - 6 + shift]); 258 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 259 } else { 260 #endif 261 uint32_t *stack = (uint32_t *)rp->r_rsp; 262 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 263 value = dtrace_fuword32(&stack[argno + shift]); 264 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 265 #ifdef __amd64 266 } 267 #endif 268 269 return (value); 270 } 271 272 /*ARGSUSED*/ 273 int 274 fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, 275 fasttrap_probe_type_t type) 276 { 277 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10]; 278 size_t len = FASTTRAP_MAX_INSTR_SIZE; 279 size_t first = MIN(len, PAGESIZE - (pc & PAGEOFFSET)); 280 uint_t start = 0; 281 int rmindex, size; 282 uint8_t seg, rex = 0; 283 284 /* 285 * Read the instruction at the given address out of the process's 286 * address space. We don't have to worry about a debugger 287 * changing this instruction before we overwrite it with our trap 288 * instruction since P_PR_LOCK is set. Since instructions can span 289 * pages, we potentially read the instruction in two parts. If the 290 * second part fails, we just zero out that part of the instruction. 291 */ 292 if (uread(p, &instr[0], first, pc) != 0) 293 return (-1); 294 if (len > first && 295 uread(p, &instr[first], len - first, pc + first) != 0) { 296 bzero(&instr[first], len - first); 297 len = first; 298 } 299 300 /* 301 * If the disassembly fails, then we have a malformed instruction. 302 */ 303 if ((size = dtrace_instr_size_isa(instr, p->p_model, &rmindex)) <= 0) 304 return (-1); 305 306 /* 307 * Make sure the disassembler isn't completely broken. 308 */ 309 ASSERT(-1 <= rmindex && rmindex < size); 310 311 /* 312 * If the computed size is greater than the number of bytes read, 313 * then it was a malformed instruction possibly because it fell on a 314 * page boundary and the subsequent page was missing or because of 315 * some malicious user. 316 */ 317 if (size > len) 318 return (-1); 319 320 tp->ftt_size = (uint8_t)size; 321 tp->ftt_segment = FASTTRAP_SEG_NONE; 322 323 /* 324 * Find the start of the instruction's opcode by processing any 325 * legacy prefixes. 326 */ 327 for (;;) { 328 seg = 0; 329 switch (instr[start]) { 330 case FASTTRAP_PREFIX_SS: 331 seg++; 332 /*FALLTHRU*/ 333 case FASTTRAP_PREFIX_GS: 334 seg++; 335 /*FALLTHRU*/ 336 case FASTTRAP_PREFIX_FS: 337 seg++; 338 /*FALLTHRU*/ 339 case FASTTRAP_PREFIX_ES: 340 seg++; 341 /*FALLTHRU*/ 342 case FASTTRAP_PREFIX_DS: 343 seg++; 344 /*FALLTHRU*/ 345 case FASTTRAP_PREFIX_CS: 346 seg++; 347 /*FALLTHRU*/ 348 case FASTTRAP_PREFIX_OPERAND: 349 case FASTTRAP_PREFIX_ADDRESS: 350 case FASTTRAP_PREFIX_LOCK: 351 case FASTTRAP_PREFIX_REP: 352 case FASTTRAP_PREFIX_REPNE: 353 if (seg != 0) { 354 /* 355 * It's illegal for an instruction to specify 356 * two segment prefixes -- give up on this 357 * illegal instruction. 358 */ 359 if (tp->ftt_segment != FASTTRAP_SEG_NONE) 360 return (-1); 361 362 tp->ftt_segment = seg; 363 } 364 start++; 365 continue; 366 } 367 break; 368 } 369 370 #ifdef __amd64 371 /* 372 * Identify the REX prefix on 64-bit processes. 373 */ 374 if (p->p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40) 375 rex = instr[start++]; 376 #endif 377 378 /* 379 * Now that we're pretty sure that the instruction is okay, copy the 380 * valid part to the tracepoint. 381 */ 382 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE); 383 384 tp->ftt_type = FASTTRAP_T_COMMON; 385 if (instr[start] == FASTTRAP_2_BYTE_OP) { 386 switch (instr[start + 1]) { 387 case FASTTRAP_0F_JO: 388 case FASTTRAP_0F_JNO: 389 case FASTTRAP_0F_JB: 390 case FASTTRAP_0F_JAE: 391 case FASTTRAP_0F_JE: 392 case FASTTRAP_0F_JNE: 393 case FASTTRAP_0F_JBE: 394 case FASTTRAP_0F_JA: 395 case FASTTRAP_0F_JS: 396 case FASTTRAP_0F_JNS: 397 case FASTTRAP_0F_JP: 398 case FASTTRAP_0F_JNP: 399 case FASTTRAP_0F_JL: 400 case FASTTRAP_0F_JGE: 401 case FASTTRAP_0F_JLE: 402 case FASTTRAP_0F_JG: 403 tp->ftt_type = FASTTRAP_T_JCC; 404 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO; 405 tp->ftt_dest = pc + tp->ftt_size + 406 /* LINTED - alignment */ 407 *(int32_t *)&instr[start + 2]; 408 break; 409 } 410 } else if (instr[start] == FASTTRAP_GROUP5_OP) { 411 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]); 412 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]); 413 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]); 414 415 if (reg == 2 || reg == 4) { 416 uint_t i, sz; 417 418 if (reg == 2) 419 tp->ftt_type = FASTTRAP_T_CALL; 420 else 421 tp->ftt_type = FASTTRAP_T_JMP; 422 423 if (mod == 3) 424 tp->ftt_code = 2; 425 else 426 tp->ftt_code = 1; 427 428 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0); 429 430 /* 431 * See AMD x86-64 Architecture Programmer's Manual 432 * Volume 3, Section 1.2.7, Table 1-12, and 433 * Appendix A.3.1, Table A-15. 434 */ 435 if (mod != 3 && rm == 4) { 436 uint8_t sib = instr[start + 2]; 437 uint_t index = FASTTRAP_SIB_INDEX(sib); 438 uint_t base = FASTTRAP_SIB_BASE(sib); 439 440 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib); 441 442 tp->ftt_index = (index == 4) ? 443 FASTTRAP_NOREG : 444 regmap[index | (FASTTRAP_REX_X(rex) << 3)]; 445 tp->ftt_base = (mod == 0 && base == 5) ? 446 FASTTRAP_NOREG : 447 regmap[base | (FASTTRAP_REX_B(rex) << 3)]; 448 449 i = 3; 450 sz = mod == 1 ? 1 : 4; 451 } else { 452 /* 453 * In 64-bit mode, mod == 0 and r/m == 5 454 * denotes %rip-relative addressing; in 32-bit 455 * mode, the base register isn't used. In both 456 * modes, there is a 32-bit operand. 457 */ 458 if (mod == 0 && rm == 5) { 459 #ifdef __amd64 460 if (p->p_model == DATAMODEL_LP64) 461 tp->ftt_base = REG_RIP; 462 else 463 #endif 464 tp->ftt_base = FASTTRAP_NOREG; 465 sz = 4; 466 } else { 467 uint8_t base = rm | 468 (FASTTRAP_REX_B(rex) << 3); 469 470 tp->ftt_base = regmap[base]; 471 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0; 472 } 473 tp->ftt_index = FASTTRAP_NOREG; 474 i = 2; 475 } 476 477 if (sz == 1) { 478 tp->ftt_dest = *(int8_t *)&instr[start + i]; 479 } else if (sz == 4) { 480 /* LINTED - alignment */ 481 tp->ftt_dest = *(int32_t *)&instr[start + i]; 482 } else { 483 tp->ftt_dest = 0; 484 } 485 } 486 } else { 487 switch (instr[start]) { 488 case FASTTRAP_RET: 489 tp->ftt_type = FASTTRAP_T_RET; 490 break; 491 492 case FASTTRAP_RET16: 493 tp->ftt_type = FASTTRAP_T_RET16; 494 /* LINTED - alignment */ 495 tp->ftt_dest = *(uint16_t *)&instr[start + 1]; 496 break; 497 498 case FASTTRAP_JO: 499 case FASTTRAP_JNO: 500 case FASTTRAP_JB: 501 case FASTTRAP_JAE: 502 case FASTTRAP_JE: 503 case FASTTRAP_JNE: 504 case FASTTRAP_JBE: 505 case FASTTRAP_JA: 506 case FASTTRAP_JS: 507 case FASTTRAP_JNS: 508 case FASTTRAP_JP: 509 case FASTTRAP_JNP: 510 case FASTTRAP_JL: 511 case FASTTRAP_JGE: 512 case FASTTRAP_JLE: 513 case FASTTRAP_JG: 514 tp->ftt_type = FASTTRAP_T_JCC; 515 tp->ftt_code = instr[start]; 516 tp->ftt_dest = pc + tp->ftt_size + 517 (int8_t)instr[start + 1]; 518 break; 519 520 case FASTTRAP_LOOPNZ: 521 case FASTTRAP_LOOPZ: 522 case FASTTRAP_LOOP: 523 tp->ftt_type = FASTTRAP_T_LOOP; 524 tp->ftt_code = instr[start]; 525 tp->ftt_dest = pc + tp->ftt_size + 526 (int8_t)instr[start + 1]; 527 break; 528 529 case FASTTRAP_JCXZ: 530 tp->ftt_type = FASTTRAP_T_JCXZ; 531 tp->ftt_dest = pc + tp->ftt_size + 532 (int8_t)instr[start + 1]; 533 break; 534 535 case FASTTRAP_CALL: 536 tp->ftt_type = FASTTRAP_T_CALL; 537 tp->ftt_dest = pc + tp->ftt_size + 538 /* LINTED - alignment */ 539 *(int32_t *)&instr[start + 1]; 540 tp->ftt_code = 0; 541 break; 542 543 case FASTTRAP_JMP32: 544 tp->ftt_type = FASTTRAP_T_JMP; 545 tp->ftt_dest = pc + tp->ftt_size + 546 /* LINTED - alignment */ 547 *(int32_t *)&instr[start + 1]; 548 break; 549 case FASTTRAP_JMP8: 550 tp->ftt_type = FASTTRAP_T_JMP; 551 tp->ftt_dest = pc + tp->ftt_size + 552 (int8_t)instr[start + 1]; 553 break; 554 555 case FASTTRAP_PUSHL_EBP: 556 if (start == 0) 557 tp->ftt_type = FASTTRAP_T_PUSHL_EBP; 558 break; 559 560 case FASTTRAP_NOP: 561 #ifdef __amd64 562 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0); 563 564 /* 565 * On amd64 we have to be careful not to confuse a nop 566 * (actually xchgl %eax, %eax) with an instruction using 567 * the same opcode, but that does something different 568 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax). 569 */ 570 if (FASTTRAP_REX_B(rex) == 0) 571 #endif 572 tp->ftt_type = FASTTRAP_T_NOP; 573 break; 574 575 case FASTTRAP_INT3: 576 /* 577 * The pid provider shares the int3 trap with debugger 578 * breakpoints so we can't instrument them. 579 */ 580 ASSERT(instr[start] == FASTTRAP_INSTR); 581 return (-1); 582 583 case FASTTRAP_INT: 584 /* 585 * Interrupts seem like they could be traced with 586 * no negative implications, but it's possible that 587 * a thread could be redirected by the trap handling 588 * code which would eventually return to the 589 * instruction after the interrupt. If the interrupt 590 * were in our scratch space, the subsequent 591 * instruction might be overwritten before we return. 592 * Accordingly we refuse to instrument any interrupt. 593 */ 594 return (-1); 595 } 596 } 597 598 #ifdef __amd64 599 if (p->p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) { 600 /* 601 * If the process is 64-bit and the instruction type is still 602 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an 603 * execute it -- we need to watch for %rip-relative 604 * addressing mode. See the portion of fasttrap_pid_probe() 605 * below where we handle tracepoints with type 606 * FASTTRAP_T_COMMON for how we emulate instructions that 607 * employ %rip-relative addressing. 608 */ 609 if (rmindex != -1) { 610 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]); 611 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]); 612 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]); 613 614 ASSERT(rmindex > start); 615 616 if (mod == 0 && rm == 5) { 617 /* 618 * We need to be sure to avoid other 619 * registers used by this instruction. While 620 * the reg field may determine the op code 621 * rather than denoting a register, assuming 622 * that it denotes a register is always safe. 623 * We leave the REX field intact and use 624 * whatever value's there for simplicity. 625 */ 626 if (reg != 0) { 627 tp->ftt_ripmode = FASTTRAP_RIP_1 | 628 (FASTTRAP_RIP_X * 629 FASTTRAP_REX_B(rex)); 630 rm = 0; 631 } else { 632 tp->ftt_ripmode = FASTTRAP_RIP_2 | 633 (FASTTRAP_RIP_X * 634 FASTTRAP_REX_B(rex)); 635 rm = 1; 636 } 637 638 tp->ftt_modrm = tp->ftt_instr[rmindex]; 639 tp->ftt_instr[rmindex] = 640 FASTTRAP_MODRM(2, reg, rm); 641 } 642 } 643 } 644 #endif 645 646 return (0); 647 } 648 649 int 650 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp) 651 { 652 fasttrap_instr_t instr = FASTTRAP_INSTR; 653 654 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0) 655 return (-1); 656 657 return (0); 658 } 659 660 int 661 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp) 662 { 663 uint8_t instr; 664 665 /* 666 * Distinguish between read or write failures and a changed 667 * instruction. 668 */ 669 if (uread(p, &instr, 1, tp->ftt_pc) != 0) 670 return (0); 671 if (instr != FASTTRAP_INSTR) 672 return (0); 673 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0) 674 return (-1); 675 676 return (0); 677 } 678 679 #ifdef __amd64 680 static uintptr_t 681 fasttrap_fulword_noerr(const void *uaddr) 682 { 683 uintptr_t ret; 684 685 if ((ret = fasttrap_fulword(uaddr)) != -1) 686 return (ret); 687 688 return (0); 689 } 690 #endif 691 692 static uint32_t 693 fasttrap_fuword32_noerr(const void *uaddr) 694 { 695 uint32_t ret; 696 697 if ((ret = fasttrap_fuword32(uaddr)) != -1) 698 return (ret); 699 700 return (0); 701 } 702 703 static void 704 fasttrap_return_common(struct reg *rp, uintptr_t pc, pid_t pid, 705 uintptr_t new_pc) 706 { 707 fasttrap_tracepoint_t *tp; 708 fasttrap_bucket_t *bucket; 709 fasttrap_id_t *id; 710 #ifdef illumos 711 kmutex_t *pid_mtx; 712 713 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 714 mutex_enter(pid_mtx); 715 #else 716 struct rm_priotracker tracker; 717 718 rm_rlock(&fasttrap_tp_lock, &tracker); 719 #endif 720 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 721 722 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 723 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 724 tp->ftt_proc->ftpc_acount != 0) 725 break; 726 } 727 728 /* 729 * Don't sweat it if we can't find the tracepoint again; unlike 730 * when we're in fasttrap_pid_probe(), finding the tracepoint here 731 * is not essential to the correct execution of the process. 732 */ 733 if (tp == NULL) { 734 #ifdef illumos 735 mutex_exit(pid_mtx); 736 #else 737 rm_runlock(&fasttrap_tp_lock, &tracker); 738 #endif 739 return; 740 } 741 742 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) { 743 /* 744 * If there's a branch that could act as a return site, we 745 * need to trace it, and check here if the program counter is 746 * external to the function. 747 */ 748 if (tp->ftt_type != FASTTRAP_T_RET && 749 tp->ftt_type != FASTTRAP_T_RET16 && 750 new_pc - id->fti_probe->ftp_faddr < 751 id->fti_probe->ftp_fsize) 752 continue; 753 754 dtrace_probe(id->fti_probe->ftp_id, 755 pc - id->fti_probe->ftp_faddr, 756 rp->r_rax, rp->r_rbx, 0, 0); 757 } 758 759 #ifdef illumos 760 mutex_exit(pid_mtx); 761 #else 762 rm_runlock(&fasttrap_tp_lock, &tracker); 763 #endif 764 } 765 766 static void 767 fasttrap_sigsegv(proc_t *p, kthread_t *t, uintptr_t addr) 768 { 769 #ifdef illumos 770 sigqueue_t *sqp = kmem_zalloc(sizeof (sigqueue_t), KM_SLEEP); 771 772 sqp->sq_info.si_signo = SIGSEGV; 773 sqp->sq_info.si_code = SEGV_MAPERR; 774 sqp->sq_info.si_addr = (caddr_t)addr; 775 776 mutex_enter(&p->p_lock); 777 sigaddqa(p, t, sqp); 778 mutex_exit(&p->p_lock); 779 780 if (t != NULL) 781 aston(t); 782 #else 783 ksiginfo_t *ksi = kmem_zalloc(sizeof (ksiginfo_t), KM_SLEEP); 784 785 ksiginfo_init(ksi); 786 ksi->ksi_signo = SIGSEGV; 787 ksi->ksi_code = SEGV_MAPERR; 788 ksi->ksi_addr = (caddr_t)addr; 789 (void) tdksignal(t, SIGSEGV, ksi); 790 #endif 791 } 792 793 #ifdef __amd64 794 static void 795 fasttrap_usdt_args64(fasttrap_probe_t *probe, struct reg *rp, int argc, 796 uintptr_t *argv) 797 { 798 int i, x, cap = MIN(argc, probe->ftp_nargs); 799 uintptr_t *stack = (uintptr_t *)rp->r_rsp; 800 801 for (i = 0; i < cap; i++) { 802 x = probe->ftp_argmap[i]; 803 804 if (x < 6) 805 argv[i] = (&rp->r_rdi)[x]; 806 else 807 argv[i] = fasttrap_fulword_noerr(&stack[x]); 808 } 809 810 for (; i < argc; i++) { 811 argv[i] = 0; 812 } 813 } 814 #endif 815 816 static void 817 fasttrap_usdt_args32(fasttrap_probe_t *probe, struct reg *rp, int argc, 818 uint32_t *argv) 819 { 820 int i, x, cap = MIN(argc, probe->ftp_nargs); 821 uint32_t *stack = (uint32_t *)rp->r_rsp; 822 823 for (i = 0; i < cap; i++) { 824 x = probe->ftp_argmap[i]; 825 826 argv[i] = fasttrap_fuword32_noerr(&stack[x]); 827 } 828 829 for (; i < argc; i++) { 830 argv[i] = 0; 831 } 832 } 833 834 static int 835 fasttrap_do_seg(fasttrap_tracepoint_t *tp, struct reg *rp, uintptr_t *addr) 836 { 837 proc_t *p = curproc; 838 #ifdef __i386__ 839 struct segment_descriptor *desc; 840 #else 841 struct user_segment_descriptor *desc; 842 #endif 843 uint16_t sel = 0, ndx, type; 844 uintptr_t limit; 845 846 switch (tp->ftt_segment) { 847 case FASTTRAP_SEG_CS: 848 sel = rp->r_cs; 849 break; 850 case FASTTRAP_SEG_DS: 851 sel = rp->r_ds; 852 break; 853 case FASTTRAP_SEG_ES: 854 sel = rp->r_es; 855 break; 856 case FASTTRAP_SEG_FS: 857 sel = rp->r_fs; 858 break; 859 case FASTTRAP_SEG_GS: 860 sel = rp->r_gs; 861 break; 862 case FASTTRAP_SEG_SS: 863 sel = rp->r_ss; 864 break; 865 } 866 867 /* 868 * Make sure the given segment register specifies a user priority 869 * selector rather than a kernel selector. 870 */ 871 if (ISPL(sel) != SEL_UPL) 872 return (-1); 873 874 ndx = IDXSEL(sel); 875 876 /* 877 * Check the bounds and grab the descriptor out of the specified 878 * descriptor table. 879 */ 880 if (ISLDT(sel)) { 881 #ifdef __i386__ 882 if (ndx > p->p_md.md_ldt->ldt_len) 883 return (-1); 884 885 desc = (struct segment_descriptor *) 886 p->p_md.md_ldt[ndx].ldt_base; 887 #else 888 if (ndx > max_ldt_segment) 889 return (-1); 890 891 desc = (struct user_segment_descriptor *) 892 p->p_md.md_ldt[ndx].ldt_base; 893 #endif 894 895 } else { 896 if (ndx >= NGDT) 897 return (-1); 898 899 #ifdef __i386__ 900 desc = &gdt[ndx].sd; 901 #else 902 desc = &gdt[ndx]; 903 #endif 904 } 905 906 /* 907 * The descriptor must have user privilege level and it must be 908 * present in memory. 909 */ 910 if (desc->sd_dpl != SEL_UPL || desc->sd_p != 1) 911 return (-1); 912 913 type = desc->sd_type; 914 915 /* 916 * If the S bit in the type field is not set, this descriptor can 917 * only be used in system context. 918 */ 919 if ((type & 0x10) != 0x10) 920 return (-1); 921 922 limit = USD_GETLIMIT(desc) * (desc->sd_gran ? PAGESIZE : 1); 923 924 if (tp->ftt_segment == FASTTRAP_SEG_CS) { 925 /* 926 * The code/data bit and readable bit must both be set. 927 */ 928 if ((type & 0xa) != 0xa) 929 return (-1); 930 931 if (*addr > limit) 932 return (-1); 933 } else { 934 /* 935 * The code/data bit must be clear. 936 */ 937 if ((type & 0x8) != 0) 938 return (-1); 939 940 /* 941 * If the expand-down bit is clear, we just check the limit as 942 * it would naturally be applied. Otherwise, we need to check 943 * that the address is the range [limit + 1 .. 0xffff] or 944 * [limit + 1 ... 0xffffffff] depending on if the default 945 * operand size bit is set. 946 */ 947 if ((type & 0x4) == 0) { 948 if (*addr > limit) 949 return (-1); 950 } else if (desc->sd_def32) { 951 if (*addr < limit + 1 || 0xffff < *addr) 952 return (-1); 953 } else { 954 if (*addr < limit + 1 || 0xffffffff < *addr) 955 return (-1); 956 } 957 } 958 959 *addr += USD_GETBASE(desc); 960 961 return (0); 962 } 963 964 int 965 fasttrap_pid_probe(struct trapframe *tf) 966 { 967 struct reg reg, *rp; 968 proc_t *p = curproc, *pp; 969 struct rm_priotracker tracker; 970 uint64_t gen; 971 uintptr_t pc; 972 uintptr_t new_pc = 0; 973 fasttrap_bucket_t *bucket; 974 #ifdef illumos 975 kmutex_t *pid_mtx; 976 #endif 977 fasttrap_tracepoint_t *tp, tp_local; 978 pid_t pid; 979 dtrace_icookie_t cookie; 980 uint_t is_enabled = 0; 981 982 fill_frame_regs(tf, ®); 983 rp = ® 984 985 pc = rp->r_rip - 1; 986 987 /* 988 * It's possible that a user (in a veritable orgy of bad planning) 989 * could redirect this thread's flow of control before it reached the 990 * return probe fasttrap. In this case we need to kill the process 991 * since it's in a unrecoverable state. 992 */ 993 if (curthread->t_dtrace_step) { 994 ASSERT(curthread->t_dtrace_on); 995 fasttrap_sigtrap(p, curthread, pc); 996 return (0); 997 } 998 999 /* 1000 * Clear all user tracing flags. 1001 */ 1002 curthread->t_dtrace_ft = 0; 1003 curthread->t_dtrace_pc = 0; 1004 curthread->t_dtrace_npc = 0; 1005 curthread->t_dtrace_scrpc = 0; 1006 curthread->t_dtrace_astpc = 0; 1007 #ifdef __amd64 1008 curthread->t_dtrace_regv = 0; 1009 #endif 1010 1011 /* 1012 * Treat a child created by a call to vfork(2) as if it were its 1013 * parent. We know that there's only one thread of control in such a 1014 * process: this one. 1015 */ 1016 #ifdef illumos 1017 while (p->p_flag & SVFORK) { 1018 p = p->p_parent; 1019 } 1020 1021 pid = p->p_pid; 1022 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 1023 mutex_enter(pid_mtx); 1024 #else 1025 pp = p; 1026 sx_slock(&proctree_lock); 1027 while (pp->p_vmspace == pp->p_pptr->p_vmspace) 1028 pp = pp->p_pptr; 1029 pid = pp->p_pid; 1030 if (pp != p) { 1031 PROC_LOCK(pp); 1032 if ((pp->p_flag & P_WEXIT) != 0) { 1033 /* 1034 * This can happen if the child was created with 1035 * rfork(2). Userspace tracing cannot work reliably in 1036 * such a scenario, but we can at least try. 1037 */ 1038 PROC_UNLOCK(pp); 1039 sx_sunlock(&proctree_lock); 1040 return (-1); 1041 } 1042 _PHOLD_LITE(pp); 1043 PROC_UNLOCK(pp); 1044 } 1045 sx_sunlock(&proctree_lock); 1046 1047 rm_rlock(&fasttrap_tp_lock, &tracker); 1048 #endif 1049 1050 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 1051 1052 /* 1053 * Lookup the tracepoint that the process just hit. 1054 */ 1055 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 1056 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 1057 tp->ftt_proc->ftpc_acount != 0) 1058 break; 1059 } 1060 1061 /* 1062 * If we couldn't find a matching tracepoint, either a tracepoint has 1063 * been inserted without using the pid<pid> ioctl interface (see 1064 * fasttrap_ioctl), or somehow we have mislaid this tracepoint. 1065 */ 1066 if (tp == NULL) { 1067 #ifdef illumos 1068 mutex_exit(pid_mtx); 1069 return (-1); 1070 #else 1071 rm_runlock(&fasttrap_tp_lock, &tracker); 1072 gen = atomic_load_acq_64(&pp->p_fasttrap_tp_gen); 1073 if (pp != p) 1074 PRELE(pp); 1075 if (curthread->t_fasttrap_tp_gen != gen) { 1076 /* 1077 * At least one tracepoint associated with this PID has 1078 * been removed from the table since #BP was raised. 1079 * Speculate that we hit a tracepoint that has since 1080 * been removed, and retry the instruction. 1081 */ 1082 curthread->t_fasttrap_tp_gen = gen; 1083 #ifdef __amd64 1084 tf->tf_rip = pc; 1085 #else 1086 tf->tf_eip = pc; 1087 #endif 1088 return (0); 1089 } 1090 return (-1); 1091 #endif 1092 } 1093 if (pp != p) 1094 PRELE(pp); 1095 1096 /* 1097 * Set the program counter to the address of the traced instruction 1098 * so that it looks right in ustack() output. 1099 */ 1100 rp->r_rip = pc; 1101 1102 if (tp->ftt_ids != NULL) { 1103 fasttrap_id_t *id; 1104 1105 #ifdef __amd64 1106 if (p->p_model == DATAMODEL_LP64) { 1107 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 1108 fasttrap_probe_t *probe = id->fti_probe; 1109 1110 if (id->fti_ptype == DTFTP_ENTRY) { 1111 /* 1112 * We note that this was an entry 1113 * probe to help ustack() find the 1114 * first caller. 1115 */ 1116 cookie = dtrace_interrupt_disable(); 1117 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 1118 dtrace_probe(probe->ftp_id, rp->r_rdi, 1119 rp->r_rsi, rp->r_rdx, rp->r_rcx, 1120 rp->r_r8); 1121 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 1122 dtrace_interrupt_enable(cookie); 1123 } else if (id->fti_ptype == DTFTP_IS_ENABLED) { 1124 /* 1125 * Note that in this case, we don't 1126 * call dtrace_probe() since it's only 1127 * an artificial probe meant to change 1128 * the flow of control so that it 1129 * encounters the true probe. 1130 */ 1131 is_enabled = 1; 1132 } else if (probe->ftp_argmap == NULL) { 1133 dtrace_probe(probe->ftp_id, rp->r_rdi, 1134 rp->r_rsi, rp->r_rdx, rp->r_rcx, 1135 rp->r_r8); 1136 } else { 1137 uintptr_t t[5]; 1138 1139 fasttrap_usdt_args64(probe, rp, 1140 sizeof (t) / sizeof (t[0]), t); 1141 1142 dtrace_probe(probe->ftp_id, t[0], t[1], 1143 t[2], t[3], t[4]); 1144 } 1145 } 1146 } else { 1147 #endif 1148 uintptr_t s0, s1, s2, s3, s4, s5; 1149 uint32_t *stack = (uint32_t *)rp->r_rsp; 1150 1151 /* 1152 * In 32-bit mode, all arguments are passed on the 1153 * stack. If this is a function entry probe, we need 1154 * to skip the first entry on the stack as it 1155 * represents the return address rather than a 1156 * parameter to the function. 1157 */ 1158 s0 = fasttrap_fuword32_noerr(&stack[0]); 1159 s1 = fasttrap_fuword32_noerr(&stack[1]); 1160 s2 = fasttrap_fuword32_noerr(&stack[2]); 1161 s3 = fasttrap_fuword32_noerr(&stack[3]); 1162 s4 = fasttrap_fuword32_noerr(&stack[4]); 1163 s5 = fasttrap_fuword32_noerr(&stack[5]); 1164 1165 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 1166 fasttrap_probe_t *probe = id->fti_probe; 1167 1168 if (id->fti_ptype == DTFTP_ENTRY) { 1169 /* 1170 * We note that this was an entry 1171 * probe to help ustack() find the 1172 * first caller. 1173 */ 1174 cookie = dtrace_interrupt_disable(); 1175 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 1176 dtrace_probe(probe->ftp_id, s1, s2, 1177 s3, s4, s5); 1178 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 1179 dtrace_interrupt_enable(cookie); 1180 } else if (id->fti_ptype == DTFTP_IS_ENABLED) { 1181 /* 1182 * Note that in this case, we don't 1183 * call dtrace_probe() since it's only 1184 * an artificial probe meant to change 1185 * the flow of control so that it 1186 * encounters the true probe. 1187 */ 1188 is_enabled = 1; 1189 } else if (probe->ftp_argmap == NULL) { 1190 dtrace_probe(probe->ftp_id, s0, s1, 1191 s2, s3, s4); 1192 } else { 1193 uint32_t t[5]; 1194 1195 fasttrap_usdt_args32(probe, rp, 1196 sizeof (t) / sizeof (t[0]), t); 1197 1198 dtrace_probe(probe->ftp_id, t[0], t[1], 1199 t[2], t[3], t[4]); 1200 } 1201 } 1202 #ifdef __amd64 1203 } 1204 #endif 1205 } 1206 1207 /* 1208 * We're about to do a bunch of work so we cache a local copy of 1209 * the tracepoint to emulate the instruction, and then find the 1210 * tracepoint again later if we need to light up any return probes. 1211 */ 1212 tp_local = *tp; 1213 #ifdef illumos 1214 mutex_exit(pid_mtx); 1215 #else 1216 rm_runlock(&fasttrap_tp_lock, &tracker); 1217 #endif 1218 tp = &tp_local; 1219 1220 /* 1221 * Set the program counter to appear as though the traced instruction 1222 * had completely executed. This ensures that fasttrap_getreg() will 1223 * report the expected value for REG_RIP. 1224 */ 1225 rp->r_rip = pc + tp->ftt_size; 1226 1227 /* 1228 * If there's an is-enabled probe connected to this tracepoint it 1229 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax' 1230 * instruction that was placed there by DTrace when the binary was 1231 * linked. As this probe is, in fact, enabled, we need to stuff 1 1232 * into %eax or %rax. Accordingly, we can bypass all the instruction 1233 * emulation logic since we know the inevitable result. It's possible 1234 * that a user could construct a scenario where the 'is-enabled' 1235 * probe was on some other instruction, but that would be a rather 1236 * exotic way to shoot oneself in the foot. 1237 */ 1238 if (is_enabled) { 1239 rp->r_rax = 1; 1240 new_pc = rp->r_rip; 1241 goto done; 1242 } 1243 1244 /* 1245 * We emulate certain types of instructions to ensure correctness 1246 * (in the case of position dependent instructions) or optimize 1247 * common cases. The rest we have the thread execute back in user- 1248 * land. 1249 */ 1250 switch (tp->ftt_type) { 1251 case FASTTRAP_T_RET: 1252 case FASTTRAP_T_RET16: 1253 { 1254 uintptr_t dst = 0; 1255 uintptr_t addr = 0; 1256 int ret = 0; 1257 1258 /* 1259 * We have to emulate _every_ facet of the behavior of a ret 1260 * instruction including what happens if the load from %esp 1261 * fails; in that case, we send a SIGSEGV. 1262 */ 1263 #ifdef __amd64 1264 if (p->p_model == DATAMODEL_NATIVE) { 1265 ret = dst = fasttrap_fulword((void *)rp->r_rsp); 1266 addr = rp->r_rsp + sizeof (uintptr_t); 1267 } else { 1268 #endif 1269 uint32_t dst32; 1270 ret = dst32 = fasttrap_fuword32((void *)rp->r_rsp); 1271 dst = dst32; 1272 addr = rp->r_rsp + sizeof (uint32_t); 1273 #ifdef __amd64 1274 } 1275 #endif 1276 1277 if (ret == -1) { 1278 fasttrap_sigsegv(p, curthread, rp->r_rsp); 1279 new_pc = pc; 1280 break; 1281 } 1282 1283 if (tp->ftt_type == FASTTRAP_T_RET16) 1284 addr += tp->ftt_dest; 1285 1286 rp->r_rsp = addr; 1287 new_pc = dst; 1288 break; 1289 } 1290 1291 case FASTTRAP_T_JCC: 1292 { 1293 uint_t taken = 0; 1294 1295 switch (tp->ftt_code) { 1296 case FASTTRAP_JO: 1297 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) != 0; 1298 break; 1299 case FASTTRAP_JNO: 1300 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0; 1301 break; 1302 case FASTTRAP_JB: 1303 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0; 1304 break; 1305 case FASTTRAP_JAE: 1306 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0; 1307 break; 1308 case FASTTRAP_JE: 1309 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0; 1310 break; 1311 case FASTTRAP_JNE: 1312 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0; 1313 break; 1314 case FASTTRAP_JBE: 1315 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0 || 1316 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0; 1317 break; 1318 case FASTTRAP_JA: 1319 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0 && 1320 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0; 1321 break; 1322 case FASTTRAP_JS: 1323 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) != 0; 1324 break; 1325 case FASTTRAP_JNS: 1326 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0; 1327 break; 1328 case FASTTRAP_JP: 1329 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) != 0; 1330 break; 1331 case FASTTRAP_JNP: 1332 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) == 0; 1333 break; 1334 case FASTTRAP_JL: 1335 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) != 1336 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1337 break; 1338 case FASTTRAP_JGE: 1339 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) == 1340 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1341 break; 1342 case FASTTRAP_JLE: 1343 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 || 1344 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) != 1345 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1346 break; 1347 case FASTTRAP_JG: 1348 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 && 1349 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) == 1350 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1351 break; 1352 1353 } 1354 1355 if (taken) 1356 new_pc = tp->ftt_dest; 1357 else 1358 new_pc = pc + tp->ftt_size; 1359 break; 1360 } 1361 1362 case FASTTRAP_T_LOOP: 1363 { 1364 uint_t taken = 0; 1365 #ifdef __amd64 1366 greg_t cx = rp->r_rcx--; 1367 #else 1368 greg_t cx = rp->r_ecx--; 1369 #endif 1370 1371 switch (tp->ftt_code) { 1372 case FASTTRAP_LOOPNZ: 1373 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 && 1374 cx != 0; 1375 break; 1376 case FASTTRAP_LOOPZ: 1377 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 && 1378 cx != 0; 1379 break; 1380 case FASTTRAP_LOOP: 1381 taken = (cx != 0); 1382 break; 1383 } 1384 1385 if (taken) 1386 new_pc = tp->ftt_dest; 1387 else 1388 new_pc = pc + tp->ftt_size; 1389 break; 1390 } 1391 1392 case FASTTRAP_T_JCXZ: 1393 { 1394 #ifdef __amd64 1395 greg_t cx = rp->r_rcx; 1396 #else 1397 greg_t cx = rp->r_ecx; 1398 #endif 1399 1400 if (cx == 0) 1401 new_pc = tp->ftt_dest; 1402 else 1403 new_pc = pc + tp->ftt_size; 1404 break; 1405 } 1406 1407 case FASTTRAP_T_PUSHL_EBP: 1408 { 1409 int ret = 0; 1410 1411 #ifdef __amd64 1412 if (p->p_model == DATAMODEL_NATIVE) { 1413 rp->r_rsp -= sizeof (uintptr_t); 1414 ret = fasttrap_sulword((void *)rp->r_rsp, rp->r_rbp); 1415 } else { 1416 #endif 1417 rp->r_rsp -= sizeof (uint32_t); 1418 ret = fasttrap_suword32((void *)rp->r_rsp, rp->r_rbp); 1419 #ifdef __amd64 1420 } 1421 #endif 1422 1423 if (ret == -1) { 1424 fasttrap_sigsegv(p, curthread, rp->r_rsp); 1425 new_pc = pc; 1426 break; 1427 } 1428 1429 new_pc = pc + tp->ftt_size; 1430 break; 1431 } 1432 1433 case FASTTRAP_T_NOP: 1434 new_pc = pc + tp->ftt_size; 1435 break; 1436 1437 case FASTTRAP_T_JMP: 1438 case FASTTRAP_T_CALL: 1439 if (tp->ftt_code == 0) { 1440 new_pc = tp->ftt_dest; 1441 } else { 1442 uintptr_t value, addr = tp->ftt_dest; 1443 1444 if (tp->ftt_base != FASTTRAP_NOREG) 1445 addr += fasttrap_getreg(rp, tp->ftt_base); 1446 if (tp->ftt_index != FASTTRAP_NOREG) 1447 addr += fasttrap_getreg(rp, tp->ftt_index) << 1448 tp->ftt_scale; 1449 1450 if (tp->ftt_code == 1) { 1451 /* 1452 * If there's a segment prefix for this 1453 * instruction, we'll need to check permissions 1454 * and bounds on the given selector, and adjust 1455 * the address accordingly. 1456 */ 1457 if (tp->ftt_segment != FASTTRAP_SEG_NONE && 1458 fasttrap_do_seg(tp, rp, &addr) != 0) { 1459 fasttrap_sigsegv(p, curthread, addr); 1460 new_pc = pc; 1461 break; 1462 } 1463 1464 #ifdef __amd64 1465 if (p->p_model == DATAMODEL_NATIVE) { 1466 #endif 1467 if ((value = fasttrap_fulword((void *)addr)) 1468 == -1) { 1469 fasttrap_sigsegv(p, curthread, 1470 addr); 1471 new_pc = pc; 1472 break; 1473 } 1474 new_pc = value; 1475 #ifdef __amd64 1476 } else { 1477 uint32_t value32; 1478 addr = (uintptr_t)(uint32_t)addr; 1479 if ((value32 = fasttrap_fuword32((void *)addr)) 1480 == -1) { 1481 fasttrap_sigsegv(p, curthread, 1482 addr); 1483 new_pc = pc; 1484 break; 1485 } 1486 new_pc = value32; 1487 } 1488 #endif 1489 } else { 1490 new_pc = addr; 1491 } 1492 } 1493 1494 /* 1495 * If this is a call instruction, we need to push the return 1496 * address onto the stack. If this fails, we send the process 1497 * a SIGSEGV and reset the pc to emulate what would happen if 1498 * this instruction weren't traced. 1499 */ 1500 if (tp->ftt_type == FASTTRAP_T_CALL) { 1501 int ret = 0; 1502 uintptr_t addr = 0, pcps; 1503 #ifdef __amd64 1504 if (p->p_model == DATAMODEL_NATIVE) { 1505 addr = rp->r_rsp - sizeof (uintptr_t); 1506 pcps = pc + tp->ftt_size; 1507 ret = fasttrap_sulword((void *)addr, pcps); 1508 } else { 1509 #endif 1510 addr = rp->r_rsp - sizeof (uint32_t); 1511 pcps = (uint32_t)(pc + tp->ftt_size); 1512 ret = fasttrap_suword32((void *)addr, pcps); 1513 #ifdef __amd64 1514 } 1515 #endif 1516 1517 if (ret == -1) { 1518 fasttrap_sigsegv(p, curthread, addr); 1519 new_pc = pc; 1520 break; 1521 } 1522 1523 rp->r_rsp = addr; 1524 } 1525 1526 break; 1527 1528 case FASTTRAP_T_COMMON: 1529 { 1530 uintptr_t addr; 1531 #if defined(__amd64) 1532 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22]; 1533 #else 1534 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7]; 1535 #endif 1536 uint_t i = 0; 1537 #ifdef illumos 1538 klwp_t *lwp = ttolwp(curthread); 1539 1540 /* 1541 * Compute the address of the ulwp_t and step over the 1542 * ul_self pointer. The method used to store the user-land 1543 * thread pointer is very different on 32- and 64-bit 1544 * kernels. 1545 */ 1546 #if defined(__amd64) 1547 if (p->p_model == DATAMODEL_LP64) { 1548 addr = lwp->lwp_pcb.pcb_fsbase; 1549 addr += sizeof (void *); 1550 } else { 1551 addr = lwp->lwp_pcb.pcb_gsbase; 1552 addr += sizeof (caddr32_t); 1553 } 1554 #else 1555 addr = USD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc); 1556 addr += sizeof (void *); 1557 #endif 1558 #else /* !illumos */ 1559 fasttrap_scrspace_t *scrspace; 1560 scrspace = fasttrap_scraddr(curthread, tp->ftt_proc); 1561 if (scrspace == NULL) { 1562 /* 1563 * We failed to allocate scratch space for this thread. 1564 * Try to write the original instruction back out and 1565 * reset the pc. 1566 */ 1567 if (fasttrap_copyout(tp->ftt_instr, (void *)pc, 1568 tp->ftt_size)) 1569 fasttrap_sigtrap(p, curthread, pc); 1570 new_pc = pc; 1571 break; 1572 } 1573 addr = scrspace->ftss_addr; 1574 #endif /* illumos */ 1575 1576 /* 1577 * Generic Instruction Tracing 1578 * --------------------------- 1579 * 1580 * This is the layout of the scratch space in the user-land 1581 * thread structure for our generated instructions. 1582 * 1583 * 32-bit mode bytes 1584 * ------------------------ ----- 1585 * a: <original instruction> <= 15 1586 * jmp <pc + tp->ftt_size> 5 1587 * b: <original instruction> <= 15 1588 * int T_DTRACE_RET 2 1589 * ----- 1590 * <= 37 1591 * 1592 * 64-bit mode bytes 1593 * ------------------------ ----- 1594 * a: <original instruction> <= 15 1595 * jmp 0(%rip) 6 1596 * <pc + tp->ftt_size> 8 1597 * b: <original instruction> <= 15 1598 * int T_DTRACE_RET 2 1599 * ----- 1600 * <= 46 1601 * 1602 * The %pc is set to a, and curthread->t_dtrace_astpc is set 1603 * to b. If we encounter a signal on the way out of the 1604 * kernel, trap() will set %pc to curthread->t_dtrace_astpc 1605 * so that we execute the original instruction and re-enter 1606 * the kernel rather than redirecting to the next instruction. 1607 * 1608 * If there are return probes (so we know that we're going to 1609 * need to reenter the kernel after executing the original 1610 * instruction), the scratch space will just contain the 1611 * original instruction followed by an interrupt -- the same 1612 * data as at b. 1613 * 1614 * %rip-relative Addressing 1615 * ------------------------ 1616 * 1617 * There's a further complication in 64-bit mode due to %rip- 1618 * relative addressing. While this is clearly a beneficial 1619 * architectural decision for position independent code, it's 1620 * hard not to see it as a personal attack against the pid 1621 * provider since before there was a relatively small set of 1622 * instructions to emulate; with %rip-relative addressing, 1623 * almost every instruction can potentially depend on the 1624 * address at which it's executed. Rather than emulating 1625 * the broad spectrum of instructions that can now be 1626 * position dependent, we emulate jumps and others as in 1627 * 32-bit mode, and take a different tack for instructions 1628 * using %rip-relative addressing. 1629 * 1630 * For every instruction that uses the ModRM byte, the 1631 * in-kernel disassembler reports its location. We use the 1632 * ModRM byte to identify that an instruction uses 1633 * %rip-relative addressing and to see what other registers 1634 * the instruction uses. To emulate those instructions, 1635 * we modify the instruction to be %rax-relative rather than 1636 * %rip-relative (or %rcx-relative if the instruction uses 1637 * %rax; or %r8- or %r9-relative if the REX.B is present so 1638 * we don't have to rewrite the REX prefix). We then load 1639 * the value that %rip would have been into the scratch 1640 * register and generate an instruction to reset the scratch 1641 * register back to its original value. The instruction 1642 * sequence looks like this: 1643 * 1644 * 64-mode %rip-relative bytes 1645 * ------------------------ ----- 1646 * a: <modified instruction> <= 15 1647 * movq $<value>, %<scratch> 6 1648 * jmp 0(%rip) 6 1649 * <pc + tp->ftt_size> 8 1650 * b: <modified instruction> <= 15 1651 * int T_DTRACE_RET 2 1652 * ----- 1653 * 52 1654 * 1655 * We set curthread->t_dtrace_regv so that upon receiving 1656 * a signal we can reset the value of the scratch register. 1657 */ 1658 1659 ASSERT(tp->ftt_size <= FASTTRAP_MAX_INSTR_SIZE); 1660 1661 curthread->t_dtrace_scrpc = addr; 1662 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1663 i += tp->ftt_size; 1664 1665 #ifdef __amd64 1666 if (tp->ftt_ripmode != 0) { 1667 greg_t *reg = NULL; 1668 1669 ASSERT(p->p_model == DATAMODEL_LP64); 1670 ASSERT(tp->ftt_ripmode & 1671 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2)); 1672 1673 /* 1674 * If this was a %rip-relative instruction, we change 1675 * it to be either a %rax- or %rcx-relative 1676 * instruction (depending on whether those registers 1677 * are used as another operand; or %r8- or %r9- 1678 * relative depending on the value of REX.B). We then 1679 * set that register and generate a movq instruction 1680 * to reset the value. 1681 */ 1682 if (tp->ftt_ripmode & FASTTRAP_RIP_X) 1683 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1); 1684 else 1685 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0); 1686 1687 if (tp->ftt_ripmode & FASTTRAP_RIP_1) 1688 scratch[i++] = FASTTRAP_MOV_EAX; 1689 else 1690 scratch[i++] = FASTTRAP_MOV_ECX; 1691 1692 switch (tp->ftt_ripmode) { 1693 case FASTTRAP_RIP_1: 1694 reg = &rp->r_rax; 1695 curthread->t_dtrace_reg = REG_RAX; 1696 break; 1697 case FASTTRAP_RIP_2: 1698 reg = &rp->r_rcx; 1699 curthread->t_dtrace_reg = REG_RCX; 1700 break; 1701 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X: 1702 reg = &rp->r_r8; 1703 curthread->t_dtrace_reg = REG_R8; 1704 break; 1705 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X: 1706 reg = &rp->r_r9; 1707 curthread->t_dtrace_reg = REG_R9; 1708 break; 1709 } 1710 1711 /* LINTED - alignment */ 1712 *(uint64_t *)&scratch[i] = *reg; 1713 curthread->t_dtrace_regv = *reg; 1714 *reg = pc + tp->ftt_size; 1715 i += sizeof (uint64_t); 1716 } 1717 #endif 1718 1719 /* 1720 * Generate the branch instruction to what would have 1721 * normally been the subsequent instruction. In 32-bit mode, 1722 * this is just a relative branch; in 64-bit mode this is a 1723 * %rip-relative branch that loads the 64-bit pc value 1724 * immediately after the jmp instruction. 1725 */ 1726 #ifdef __amd64 1727 if (p->p_model == DATAMODEL_LP64) { 1728 scratch[i++] = FASTTRAP_GROUP5_OP; 1729 scratch[i++] = FASTTRAP_MODRM(0, 4, 5); 1730 /* LINTED - alignment */ 1731 *(uint32_t *)&scratch[i] = 0; 1732 i += sizeof (uint32_t); 1733 /* LINTED - alignment */ 1734 *(uint64_t *)&scratch[i] = pc + tp->ftt_size; 1735 i += sizeof (uint64_t); 1736 } else { 1737 #endif 1738 /* 1739 * Set up the jmp to the next instruction; note that 1740 * the size of the traced instruction cancels out. 1741 */ 1742 scratch[i++] = FASTTRAP_JMP32; 1743 /* LINTED - alignment */ 1744 *(uint32_t *)&scratch[i] = pc - addr - 5; 1745 i += sizeof (uint32_t); 1746 #ifdef __amd64 1747 } 1748 #endif 1749 1750 curthread->t_dtrace_astpc = addr + i; 1751 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1752 i += tp->ftt_size; 1753 scratch[i++] = FASTTRAP_INT; 1754 scratch[i++] = T_DTRACE_RET; 1755 1756 ASSERT(i <= sizeof (scratch)); 1757 1758 if (fasttrap_copyout(scratch, (char *)addr, i)) { 1759 fasttrap_sigtrap(p, curthread, pc); 1760 new_pc = pc; 1761 break; 1762 } 1763 if (tp->ftt_retids != NULL) { 1764 curthread->t_dtrace_step = 1; 1765 curthread->t_dtrace_ret = 1; 1766 new_pc = curthread->t_dtrace_astpc; 1767 } else { 1768 new_pc = curthread->t_dtrace_scrpc; 1769 } 1770 1771 curthread->t_dtrace_pc = pc; 1772 curthread->t_dtrace_npc = pc + tp->ftt_size; 1773 curthread->t_dtrace_on = 1; 1774 break; 1775 } 1776 1777 default: 1778 panic("fasttrap: mishandled an instruction"); 1779 } 1780 1781 done: 1782 /* 1783 * If there were no return probes when we first found the tracepoint, 1784 * we should feel no obligation to honor any return probes that were 1785 * subsequently enabled -- they'll just have to wait until the next 1786 * time around. 1787 */ 1788 if (tp->ftt_retids != NULL) { 1789 /* 1790 * We need to wait until the results of the instruction are 1791 * apparent before invoking any return probes. If this 1792 * instruction was emulated we can just call 1793 * fasttrap_return_common(); if it needs to be executed, we 1794 * need to wait until the user thread returns to the kernel. 1795 */ 1796 if (tp->ftt_type != FASTTRAP_T_COMMON) { 1797 /* 1798 * Set the program counter to the address of the traced 1799 * instruction so that it looks right in ustack() 1800 * output. We had previously set it to the end of the 1801 * instruction to simplify %rip-relative addressing. 1802 */ 1803 rp->r_rip = pc; 1804 1805 fasttrap_return_common(rp, pc, pid, new_pc); 1806 } else { 1807 ASSERT(curthread->t_dtrace_ret != 0); 1808 ASSERT(curthread->t_dtrace_pc == pc); 1809 ASSERT(curthread->t_dtrace_scrpc != 0); 1810 ASSERT(new_pc == curthread->t_dtrace_astpc); 1811 } 1812 } 1813 1814 rp->r_rip = new_pc; 1815 1816 #ifndef illumos 1817 PROC_LOCK(p); 1818 proc_write_regs(curthread, rp); 1819 PROC_UNLOCK(p); 1820 #endif 1821 1822 return (0); 1823 } 1824 1825 int 1826 fasttrap_return_probe(struct trapframe *tf) 1827 { 1828 struct reg reg, *rp; 1829 proc_t *p = curproc; 1830 uintptr_t pc = curthread->t_dtrace_pc; 1831 uintptr_t npc = curthread->t_dtrace_npc; 1832 1833 fill_frame_regs(tf, ®); 1834 rp = ® 1835 1836 curthread->t_dtrace_pc = 0; 1837 curthread->t_dtrace_npc = 0; 1838 curthread->t_dtrace_scrpc = 0; 1839 curthread->t_dtrace_astpc = 0; 1840 1841 #ifdef illumos 1842 /* 1843 * Treat a child created by a call to vfork(2) as if it were its 1844 * parent. We know that there's only one thread of control in such a 1845 * process: this one. 1846 */ 1847 while (p->p_flag & SVFORK) { 1848 p = p->p_parent; 1849 } 1850 #endif 1851 1852 /* 1853 * We set rp->r_rip to the address of the traced instruction so 1854 * that it appears to dtrace_probe() that we're on the original 1855 * instruction. 1856 */ 1857 rp->r_rip = pc; 1858 1859 fasttrap_return_common(rp, pc, p->p_pid, npc); 1860 1861 return (0); 1862 } 1863 1864 /*ARGSUSED*/ 1865 uint64_t 1866 fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 1867 int aframes) 1868 { 1869 struct reg r; 1870 1871 fill_regs(curthread, &r); 1872 1873 return (fasttrap_anarg(&r, 1, argno)); 1874 } 1875 1876 /*ARGSUSED*/ 1877 uint64_t 1878 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 1879 int aframes) 1880 { 1881 struct reg r; 1882 1883 fill_regs(curthread, &r); 1884 1885 return (fasttrap_anarg(&r, 0, argno)); 1886 } 1887 1888 static ulong_t 1889 fasttrap_getreg(struct reg *rp, uint_t reg) 1890 { 1891 #ifdef __amd64 1892 switch (reg) { 1893 case REG_R15: return (rp->r_r15); 1894 case REG_R14: return (rp->r_r14); 1895 case REG_R13: return (rp->r_r13); 1896 case REG_R12: return (rp->r_r12); 1897 case REG_R11: return (rp->r_r11); 1898 case REG_R10: return (rp->r_r10); 1899 case REG_R9: return (rp->r_r9); 1900 case REG_R8: return (rp->r_r8); 1901 case REG_RDI: return (rp->r_rdi); 1902 case REG_RSI: return (rp->r_rsi); 1903 case REG_RBP: return (rp->r_rbp); 1904 case REG_RBX: return (rp->r_rbx); 1905 case REG_RDX: return (rp->r_rdx); 1906 case REG_RCX: return (rp->r_rcx); 1907 case REG_RAX: return (rp->r_rax); 1908 case REG_TRAPNO: return (rp->r_trapno); 1909 case REG_ERR: return (rp->r_err); 1910 case REG_RIP: return (rp->r_rip); 1911 case REG_CS: return (rp->r_cs); 1912 case REG_RFL: return (rp->r_rflags); 1913 case REG_RSP: return (rp->r_rsp); 1914 case REG_SS: return (rp->r_ss); 1915 case REG_FS: return (rp->r_fs); 1916 case REG_GS: return (rp->r_gs); 1917 case REG_DS: return (rp->r_ds); 1918 case REG_ES: return (rp->r_es); 1919 case REG_FSBASE: return (rdmsr(MSR_FSBASE)); 1920 case REG_GSBASE: return (rdmsr(MSR_GSBASE)); 1921 } 1922 1923 panic("dtrace: illegal register constant"); 1924 /*NOTREACHED*/ 1925 #else 1926 #define _NGREG 19 1927 if (reg >= _NGREG) 1928 panic("dtrace: illegal register constant"); 1929 1930 return (((greg_t *)&rp->r_gs)[reg]); 1931 #endif 1932 } 1933