1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 * 21 * Portions Copyright 2010 The FreeBSD Foundation 22 * 23 * $FreeBSD$ 24 */ 25 26 /* 27 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 28 * Use is subject to license terms. 29 */ 30 31 #ifdef illumos 32 #pragma ident "%Z%%M% %I% %E% SMI" 33 #endif 34 35 #include <sys/fasttrap_isa.h> 36 #include <sys/fasttrap_impl.h> 37 #include <sys/dtrace.h> 38 #include <sys/dtrace_impl.h> 39 #include <sys/cmn_err.h> 40 #ifdef illumos 41 #include <sys/regset.h> 42 #include <sys/privregs.h> 43 #include <sys/segments.h> 44 #include <sys/x86_archext.h> 45 #else 46 #include <cddl/dev/dtrace/dtrace_cddl.h> 47 #include <sys/types.h> 48 #include <sys/proc.h> 49 #include <sys/rmlock.h> 50 #include <sys/dtrace_bsd.h> 51 #include <cddl/dev/dtrace/x86/regset.h> 52 #include <machine/segments.h> 53 #include <machine/reg.h> 54 #include <machine/pcb.h> 55 #endif 56 #include <sys/sysmacros.h> 57 #ifdef illumos 58 #include <sys/trap.h> 59 #include <sys/archsystm.h> 60 #else 61 #include <sys/ptrace.h> 62 63 static int 64 uread(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr) 65 { 66 ssize_t n; 67 68 PHOLD(p); 69 n = proc_readmem(curthread, p, uaddr, kaddr, len); 70 PRELE(p); 71 if (n != len) 72 return (ENOMEM); 73 return (0); 74 } 75 76 static int 77 uwrite(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr) 78 { 79 ssize_t n; 80 81 PHOLD(p); 82 n = proc_writemem(curthread, p, uaddr, kaddr, len); 83 PRELE(p); 84 if (n != len) 85 return (ENOMEM); 86 return (0); 87 } 88 89 #endif /* illumos */ 90 #ifdef __i386__ 91 #define r_rax r_eax 92 #define r_rbx r_ebx 93 #define r_rip r_eip 94 #define r_rflags r_eflags 95 #define r_rsp r_esp 96 #define r_rbp r_ebp 97 #endif 98 99 /* 100 * Lossless User-Land Tracing on x86 101 * --------------------------------- 102 * 103 * The execution of most instructions is not dependent on the address; for 104 * these instructions it is sufficient to copy them into the user process's 105 * address space and execute them. To effectively single-step an instruction 106 * in user-land, we copy out the following sequence of instructions to scratch 107 * space in the user thread's ulwp_t structure. 108 * 109 * We then set the program counter (%eip or %rip) to point to this scratch 110 * space. Once execution resumes, the original instruction is executed and 111 * then control flow is redirected to what was originally the subsequent 112 * instruction. If the kernel attemps to deliver a signal while single- 113 * stepping, the signal is deferred and the program counter is moved into the 114 * second sequence of instructions. The second sequence ends in a trap into 115 * the kernel where the deferred signal is then properly handled and delivered. 116 * 117 * For instructions whose execute is position dependent, we perform simple 118 * emulation. These instructions are limited to control transfer 119 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle 120 * of %rip-relative addressing that means that almost any instruction can be 121 * position dependent. For all the details on how we emulate generic 122 * instructions included %rip-relative instructions, see the code in 123 * fasttrap_pid_probe() below where we handle instructions of type 124 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing). 125 */ 126 127 #define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3) 128 #define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7) 129 #define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7) 130 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm)) 131 132 #define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3) 133 #define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7) 134 #define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7) 135 136 #define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1) 137 #define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1) 138 #define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1) 139 #define FASTTRAP_REX_B(rex) ((rex) & 1) 140 #define FASTTRAP_REX(w, r, x, b) \ 141 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b)) 142 143 /* 144 * Single-byte op-codes. 145 */ 146 #define FASTTRAP_PUSHL_EBP 0x55 147 148 #define FASTTRAP_JO 0x70 149 #define FASTTRAP_JNO 0x71 150 #define FASTTRAP_JB 0x72 151 #define FASTTRAP_JAE 0x73 152 #define FASTTRAP_JE 0x74 153 #define FASTTRAP_JNE 0x75 154 #define FASTTRAP_JBE 0x76 155 #define FASTTRAP_JA 0x77 156 #define FASTTRAP_JS 0x78 157 #define FASTTRAP_JNS 0x79 158 #define FASTTRAP_JP 0x7a 159 #define FASTTRAP_JNP 0x7b 160 #define FASTTRAP_JL 0x7c 161 #define FASTTRAP_JGE 0x7d 162 #define FASTTRAP_JLE 0x7e 163 #define FASTTRAP_JG 0x7f 164 165 #define FASTTRAP_NOP 0x90 166 167 #define FASTTRAP_MOV_EAX 0xb8 168 #define FASTTRAP_MOV_ECX 0xb9 169 170 #define FASTTRAP_RET16 0xc2 171 #define FASTTRAP_RET 0xc3 172 173 #define FASTTRAP_LOOPNZ 0xe0 174 #define FASTTRAP_LOOPZ 0xe1 175 #define FASTTRAP_LOOP 0xe2 176 #define FASTTRAP_JCXZ 0xe3 177 178 #define FASTTRAP_CALL 0xe8 179 #define FASTTRAP_JMP32 0xe9 180 #define FASTTRAP_JMP8 0xeb 181 182 #define FASTTRAP_INT3 0xcc 183 #define FASTTRAP_INT 0xcd 184 185 #define FASTTRAP_2_BYTE_OP 0x0f 186 #define FASTTRAP_GROUP5_OP 0xff 187 188 /* 189 * Two-byte op-codes (second byte only). 190 */ 191 #define FASTTRAP_0F_JO 0x80 192 #define FASTTRAP_0F_JNO 0x81 193 #define FASTTRAP_0F_JB 0x82 194 #define FASTTRAP_0F_JAE 0x83 195 #define FASTTRAP_0F_JE 0x84 196 #define FASTTRAP_0F_JNE 0x85 197 #define FASTTRAP_0F_JBE 0x86 198 #define FASTTRAP_0F_JA 0x87 199 #define FASTTRAP_0F_JS 0x88 200 #define FASTTRAP_0F_JNS 0x89 201 #define FASTTRAP_0F_JP 0x8a 202 #define FASTTRAP_0F_JNP 0x8b 203 #define FASTTRAP_0F_JL 0x8c 204 #define FASTTRAP_0F_JGE 0x8d 205 #define FASTTRAP_0F_JLE 0x8e 206 #define FASTTRAP_0F_JG 0x8f 207 208 #define FASTTRAP_EFLAGS_OF 0x800 209 #define FASTTRAP_EFLAGS_DF 0x400 210 #define FASTTRAP_EFLAGS_SF 0x080 211 #define FASTTRAP_EFLAGS_ZF 0x040 212 #define FASTTRAP_EFLAGS_AF 0x010 213 #define FASTTRAP_EFLAGS_PF 0x004 214 #define FASTTRAP_EFLAGS_CF 0x001 215 216 /* 217 * Instruction prefixes. 218 */ 219 #define FASTTRAP_PREFIX_OPERAND 0x66 220 #define FASTTRAP_PREFIX_ADDRESS 0x67 221 #define FASTTRAP_PREFIX_CS 0x2E 222 #define FASTTRAP_PREFIX_DS 0x3E 223 #define FASTTRAP_PREFIX_ES 0x26 224 #define FASTTRAP_PREFIX_FS 0x64 225 #define FASTTRAP_PREFIX_GS 0x65 226 #define FASTTRAP_PREFIX_SS 0x36 227 #define FASTTRAP_PREFIX_LOCK 0xF0 228 #define FASTTRAP_PREFIX_REP 0xF3 229 #define FASTTRAP_PREFIX_REPNE 0xF2 230 231 #define FASTTRAP_NOREG 0xff 232 233 /* 234 * Map between instruction register encodings and the kernel constants which 235 * correspond to indicies into struct regs. 236 */ 237 #ifdef __amd64 238 static const uint8_t regmap[16] = { 239 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI, 240 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15, 241 }; 242 #else 243 static const uint8_t regmap[8] = { 244 EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI 245 }; 246 #endif 247 248 static ulong_t fasttrap_getreg(struct reg *, uint_t); 249 250 static uint64_t 251 fasttrap_anarg(struct reg *rp, int function_entry, int argno) 252 { 253 uint64_t value = 0; 254 int shift = function_entry ? 1 : 0; 255 256 #ifdef __amd64 257 if (curproc->p_model == DATAMODEL_LP64) { 258 uintptr_t *stack; 259 260 /* 261 * In 64-bit mode, the first six arguments are stored in 262 * registers. 263 */ 264 if (argno < 6) 265 switch (argno) { 266 case 0: 267 return (rp->r_rdi); 268 case 1: 269 return (rp->r_rsi); 270 case 2: 271 return (rp->r_rdx); 272 case 3: 273 return (rp->r_rcx); 274 case 4: 275 return (rp->r_r8); 276 case 5: 277 return (rp->r_r9); 278 } 279 280 stack = (uintptr_t *)rp->r_rsp; 281 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 282 value = dtrace_fulword(&stack[argno - 6 + shift]); 283 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 284 } else { 285 #endif 286 #ifdef __i386 287 uint32_t *stack = (uint32_t *)rp->r_esp; 288 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 289 value = dtrace_fuword32(&stack[argno + shift]); 290 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 291 #endif 292 #ifdef __amd64 293 } 294 #endif 295 296 return (value); 297 } 298 299 /*ARGSUSED*/ 300 int 301 fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, 302 fasttrap_probe_type_t type) 303 { 304 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10]; 305 size_t len = FASTTRAP_MAX_INSTR_SIZE; 306 size_t first = MIN(len, PAGESIZE - (pc & PAGEOFFSET)); 307 uint_t start = 0; 308 int rmindex, size; 309 uint8_t seg, rex = 0; 310 311 /* 312 * Read the instruction at the given address out of the process's 313 * address space. We don't have to worry about a debugger 314 * changing this instruction before we overwrite it with our trap 315 * instruction since P_PR_LOCK is set. Since instructions can span 316 * pages, we potentially read the instruction in two parts. If the 317 * second part fails, we just zero out that part of the instruction. 318 */ 319 if (uread(p, &instr[0], first, pc) != 0) 320 return (-1); 321 if (len > first && 322 uread(p, &instr[first], len - first, pc + first) != 0) { 323 bzero(&instr[first], len - first); 324 len = first; 325 } 326 327 /* 328 * If the disassembly fails, then we have a malformed instruction. 329 */ 330 if ((size = dtrace_instr_size_isa(instr, p->p_model, &rmindex)) <= 0) 331 return (-1); 332 333 /* 334 * Make sure the disassembler isn't completely broken. 335 */ 336 ASSERT(-1 <= rmindex && rmindex < size); 337 338 /* 339 * If the computed size is greater than the number of bytes read, 340 * then it was a malformed instruction possibly because it fell on a 341 * page boundary and the subsequent page was missing or because of 342 * some malicious user. 343 */ 344 if (size > len) 345 return (-1); 346 347 tp->ftt_size = (uint8_t)size; 348 tp->ftt_segment = FASTTRAP_SEG_NONE; 349 350 /* 351 * Find the start of the instruction's opcode by processing any 352 * legacy prefixes. 353 */ 354 for (;;) { 355 seg = 0; 356 switch (instr[start]) { 357 case FASTTRAP_PREFIX_SS: 358 seg++; 359 /*FALLTHRU*/ 360 case FASTTRAP_PREFIX_GS: 361 seg++; 362 /*FALLTHRU*/ 363 case FASTTRAP_PREFIX_FS: 364 seg++; 365 /*FALLTHRU*/ 366 case FASTTRAP_PREFIX_ES: 367 seg++; 368 /*FALLTHRU*/ 369 case FASTTRAP_PREFIX_DS: 370 seg++; 371 /*FALLTHRU*/ 372 case FASTTRAP_PREFIX_CS: 373 seg++; 374 /*FALLTHRU*/ 375 case FASTTRAP_PREFIX_OPERAND: 376 case FASTTRAP_PREFIX_ADDRESS: 377 case FASTTRAP_PREFIX_LOCK: 378 case FASTTRAP_PREFIX_REP: 379 case FASTTRAP_PREFIX_REPNE: 380 if (seg != 0) { 381 /* 382 * It's illegal for an instruction to specify 383 * two segment prefixes -- give up on this 384 * illegal instruction. 385 */ 386 if (tp->ftt_segment != FASTTRAP_SEG_NONE) 387 return (-1); 388 389 tp->ftt_segment = seg; 390 } 391 start++; 392 continue; 393 } 394 break; 395 } 396 397 #ifdef __amd64 398 /* 399 * Identify the REX prefix on 64-bit processes. 400 */ 401 if (p->p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40) 402 rex = instr[start++]; 403 #endif 404 405 /* 406 * Now that we're pretty sure that the instruction is okay, copy the 407 * valid part to the tracepoint. 408 */ 409 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE); 410 411 tp->ftt_type = FASTTRAP_T_COMMON; 412 if (instr[start] == FASTTRAP_2_BYTE_OP) { 413 switch (instr[start + 1]) { 414 case FASTTRAP_0F_JO: 415 case FASTTRAP_0F_JNO: 416 case FASTTRAP_0F_JB: 417 case FASTTRAP_0F_JAE: 418 case FASTTRAP_0F_JE: 419 case FASTTRAP_0F_JNE: 420 case FASTTRAP_0F_JBE: 421 case FASTTRAP_0F_JA: 422 case FASTTRAP_0F_JS: 423 case FASTTRAP_0F_JNS: 424 case FASTTRAP_0F_JP: 425 case FASTTRAP_0F_JNP: 426 case FASTTRAP_0F_JL: 427 case FASTTRAP_0F_JGE: 428 case FASTTRAP_0F_JLE: 429 case FASTTRAP_0F_JG: 430 tp->ftt_type = FASTTRAP_T_JCC; 431 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO; 432 tp->ftt_dest = pc + tp->ftt_size + 433 /* LINTED - alignment */ 434 *(int32_t *)&instr[start + 2]; 435 break; 436 } 437 } else if (instr[start] == FASTTRAP_GROUP5_OP) { 438 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]); 439 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]); 440 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]); 441 442 if (reg == 2 || reg == 4) { 443 uint_t i, sz; 444 445 if (reg == 2) 446 tp->ftt_type = FASTTRAP_T_CALL; 447 else 448 tp->ftt_type = FASTTRAP_T_JMP; 449 450 if (mod == 3) 451 tp->ftt_code = 2; 452 else 453 tp->ftt_code = 1; 454 455 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0); 456 457 /* 458 * See AMD x86-64 Architecture Programmer's Manual 459 * Volume 3, Section 1.2.7, Table 1-12, and 460 * Appendix A.3.1, Table A-15. 461 */ 462 if (mod != 3 && rm == 4) { 463 uint8_t sib = instr[start + 2]; 464 uint_t index = FASTTRAP_SIB_INDEX(sib); 465 uint_t base = FASTTRAP_SIB_BASE(sib); 466 467 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib); 468 469 tp->ftt_index = (index == 4) ? 470 FASTTRAP_NOREG : 471 regmap[index | (FASTTRAP_REX_X(rex) << 3)]; 472 tp->ftt_base = (mod == 0 && base == 5) ? 473 FASTTRAP_NOREG : 474 regmap[base | (FASTTRAP_REX_B(rex) << 3)]; 475 476 i = 3; 477 sz = mod == 1 ? 1 : 4; 478 } else { 479 /* 480 * In 64-bit mode, mod == 0 and r/m == 5 481 * denotes %rip-relative addressing; in 32-bit 482 * mode, the base register isn't used. In both 483 * modes, there is a 32-bit operand. 484 */ 485 if (mod == 0 && rm == 5) { 486 #ifdef __amd64 487 if (p->p_model == DATAMODEL_LP64) 488 tp->ftt_base = REG_RIP; 489 else 490 #endif 491 tp->ftt_base = FASTTRAP_NOREG; 492 sz = 4; 493 } else { 494 uint8_t base = rm | 495 (FASTTRAP_REX_B(rex) << 3); 496 497 tp->ftt_base = regmap[base]; 498 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0; 499 } 500 tp->ftt_index = FASTTRAP_NOREG; 501 i = 2; 502 } 503 504 if (sz == 1) { 505 tp->ftt_dest = *(int8_t *)&instr[start + i]; 506 } else if (sz == 4) { 507 /* LINTED - alignment */ 508 tp->ftt_dest = *(int32_t *)&instr[start + i]; 509 } else { 510 tp->ftt_dest = 0; 511 } 512 } 513 } else { 514 switch (instr[start]) { 515 case FASTTRAP_RET: 516 tp->ftt_type = FASTTRAP_T_RET; 517 break; 518 519 case FASTTRAP_RET16: 520 tp->ftt_type = FASTTRAP_T_RET16; 521 /* LINTED - alignment */ 522 tp->ftt_dest = *(uint16_t *)&instr[start + 1]; 523 break; 524 525 case FASTTRAP_JO: 526 case FASTTRAP_JNO: 527 case FASTTRAP_JB: 528 case FASTTRAP_JAE: 529 case FASTTRAP_JE: 530 case FASTTRAP_JNE: 531 case FASTTRAP_JBE: 532 case FASTTRAP_JA: 533 case FASTTRAP_JS: 534 case FASTTRAP_JNS: 535 case FASTTRAP_JP: 536 case FASTTRAP_JNP: 537 case FASTTRAP_JL: 538 case FASTTRAP_JGE: 539 case FASTTRAP_JLE: 540 case FASTTRAP_JG: 541 tp->ftt_type = FASTTRAP_T_JCC; 542 tp->ftt_code = instr[start]; 543 tp->ftt_dest = pc + tp->ftt_size + 544 (int8_t)instr[start + 1]; 545 break; 546 547 case FASTTRAP_LOOPNZ: 548 case FASTTRAP_LOOPZ: 549 case FASTTRAP_LOOP: 550 tp->ftt_type = FASTTRAP_T_LOOP; 551 tp->ftt_code = instr[start]; 552 tp->ftt_dest = pc + tp->ftt_size + 553 (int8_t)instr[start + 1]; 554 break; 555 556 case FASTTRAP_JCXZ: 557 tp->ftt_type = FASTTRAP_T_JCXZ; 558 tp->ftt_dest = pc + tp->ftt_size + 559 (int8_t)instr[start + 1]; 560 break; 561 562 case FASTTRAP_CALL: 563 tp->ftt_type = FASTTRAP_T_CALL; 564 tp->ftt_dest = pc + tp->ftt_size + 565 /* LINTED - alignment */ 566 *(int32_t *)&instr[start + 1]; 567 tp->ftt_code = 0; 568 break; 569 570 case FASTTRAP_JMP32: 571 tp->ftt_type = FASTTRAP_T_JMP; 572 tp->ftt_dest = pc + tp->ftt_size + 573 /* LINTED - alignment */ 574 *(int32_t *)&instr[start + 1]; 575 break; 576 case FASTTRAP_JMP8: 577 tp->ftt_type = FASTTRAP_T_JMP; 578 tp->ftt_dest = pc + tp->ftt_size + 579 (int8_t)instr[start + 1]; 580 break; 581 582 case FASTTRAP_PUSHL_EBP: 583 if (start == 0) 584 tp->ftt_type = FASTTRAP_T_PUSHL_EBP; 585 break; 586 587 case FASTTRAP_NOP: 588 #ifdef __amd64 589 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0); 590 591 /* 592 * On amd64 we have to be careful not to confuse a nop 593 * (actually xchgl %eax, %eax) with an instruction using 594 * the same opcode, but that does something different 595 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax). 596 */ 597 if (FASTTRAP_REX_B(rex) == 0) 598 #endif 599 tp->ftt_type = FASTTRAP_T_NOP; 600 break; 601 602 case FASTTRAP_INT3: 603 /* 604 * The pid provider shares the int3 trap with debugger 605 * breakpoints so we can't instrument them. 606 */ 607 ASSERT(instr[start] == FASTTRAP_INSTR); 608 return (-1); 609 610 case FASTTRAP_INT: 611 /* 612 * Interrupts seem like they could be traced with 613 * no negative implications, but it's possible that 614 * a thread could be redirected by the trap handling 615 * code which would eventually return to the 616 * instruction after the interrupt. If the interrupt 617 * were in our scratch space, the subsequent 618 * instruction might be overwritten before we return. 619 * Accordingly we refuse to instrument any interrupt. 620 */ 621 return (-1); 622 } 623 } 624 625 #ifdef __amd64 626 if (p->p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) { 627 /* 628 * If the process is 64-bit and the instruction type is still 629 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an 630 * execute it -- we need to watch for %rip-relative 631 * addressing mode. See the portion of fasttrap_pid_probe() 632 * below where we handle tracepoints with type 633 * FASTTRAP_T_COMMON for how we emulate instructions that 634 * employ %rip-relative addressing. 635 */ 636 if (rmindex != -1) { 637 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]); 638 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]); 639 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]); 640 641 ASSERT(rmindex > start); 642 643 if (mod == 0 && rm == 5) { 644 /* 645 * We need to be sure to avoid other 646 * registers used by this instruction. While 647 * the reg field may determine the op code 648 * rather than denoting a register, assuming 649 * that it denotes a register is always safe. 650 * We leave the REX field intact and use 651 * whatever value's there for simplicity. 652 */ 653 if (reg != 0) { 654 tp->ftt_ripmode = FASTTRAP_RIP_1 | 655 (FASTTRAP_RIP_X * 656 FASTTRAP_REX_B(rex)); 657 rm = 0; 658 } else { 659 tp->ftt_ripmode = FASTTRAP_RIP_2 | 660 (FASTTRAP_RIP_X * 661 FASTTRAP_REX_B(rex)); 662 rm = 1; 663 } 664 665 tp->ftt_modrm = tp->ftt_instr[rmindex]; 666 tp->ftt_instr[rmindex] = 667 FASTTRAP_MODRM(2, reg, rm); 668 } 669 } 670 } 671 #endif 672 673 return (0); 674 } 675 676 int 677 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp) 678 { 679 fasttrap_instr_t instr = FASTTRAP_INSTR; 680 681 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0) 682 return (-1); 683 684 return (0); 685 } 686 687 int 688 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp) 689 { 690 uint8_t instr; 691 692 /* 693 * Distinguish between read or write failures and a changed 694 * instruction. 695 */ 696 if (uread(p, &instr, 1, tp->ftt_pc) != 0) 697 return (0); 698 if (instr != FASTTRAP_INSTR) 699 return (0); 700 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0) 701 return (-1); 702 703 return (0); 704 } 705 706 #ifdef __amd64 707 static uintptr_t 708 fasttrap_fulword_noerr(const void *uaddr) 709 { 710 uintptr_t ret; 711 712 if ((ret = fasttrap_fulword(uaddr)) != -1) 713 return (ret); 714 715 return (0); 716 } 717 #endif 718 719 #ifdef __i386__ 720 static uint32_t 721 fasttrap_fuword32_noerr(const void *uaddr) 722 { 723 uint32_t ret; 724 725 if ((ret = fasttrap_fuword32(uaddr)) != -1) 726 return (ret); 727 728 return (0); 729 } 730 #endif 731 732 static void 733 fasttrap_return_common(struct reg *rp, uintptr_t pc, pid_t pid, 734 uintptr_t new_pc) 735 { 736 fasttrap_tracepoint_t *tp; 737 fasttrap_bucket_t *bucket; 738 fasttrap_id_t *id; 739 #ifdef illumos 740 kmutex_t *pid_mtx; 741 742 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 743 mutex_enter(pid_mtx); 744 #else 745 struct rm_priotracker tracker; 746 747 rm_rlock(&fasttrap_tp_lock, &tracker); 748 #endif 749 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 750 751 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 752 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 753 tp->ftt_proc->ftpc_acount != 0) 754 break; 755 } 756 757 /* 758 * Don't sweat it if we can't find the tracepoint again; unlike 759 * when we're in fasttrap_pid_probe(), finding the tracepoint here 760 * is not essential to the correct execution of the process. 761 */ 762 if (tp == NULL) { 763 #ifdef illumos 764 mutex_exit(pid_mtx); 765 #else 766 rm_runlock(&fasttrap_tp_lock, &tracker); 767 #endif 768 return; 769 } 770 771 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) { 772 /* 773 * If there's a branch that could act as a return site, we 774 * need to trace it, and check here if the program counter is 775 * external to the function. 776 */ 777 if (tp->ftt_type != FASTTRAP_T_RET && 778 tp->ftt_type != FASTTRAP_T_RET16 && 779 new_pc - id->fti_probe->ftp_faddr < 780 id->fti_probe->ftp_fsize) 781 continue; 782 783 dtrace_probe(id->fti_probe->ftp_id, 784 pc - id->fti_probe->ftp_faddr, 785 rp->r_rax, rp->r_rbx, 0, 0); 786 } 787 788 #ifdef illumos 789 mutex_exit(pid_mtx); 790 #else 791 rm_runlock(&fasttrap_tp_lock, &tracker); 792 #endif 793 } 794 795 static void 796 fasttrap_sigsegv(proc_t *p, kthread_t *t, uintptr_t addr) 797 { 798 #ifdef illumos 799 sigqueue_t *sqp = kmem_zalloc(sizeof (sigqueue_t), KM_SLEEP); 800 801 sqp->sq_info.si_signo = SIGSEGV; 802 sqp->sq_info.si_code = SEGV_MAPERR; 803 sqp->sq_info.si_addr = (caddr_t)addr; 804 805 mutex_enter(&p->p_lock); 806 sigaddqa(p, t, sqp); 807 mutex_exit(&p->p_lock); 808 809 if (t != NULL) 810 aston(t); 811 #else 812 ksiginfo_t *ksi = kmem_zalloc(sizeof (ksiginfo_t), KM_SLEEP); 813 814 ksiginfo_init(ksi); 815 ksi->ksi_signo = SIGSEGV; 816 ksi->ksi_code = SEGV_MAPERR; 817 ksi->ksi_addr = (caddr_t)addr; 818 (void) tdksignal(t, SIGSEGV, ksi); 819 #endif 820 } 821 822 #ifdef __amd64 823 static void 824 fasttrap_usdt_args64(fasttrap_probe_t *probe, struct reg *rp, int argc, 825 uintptr_t *argv) 826 { 827 int i, x, cap = MIN(argc, probe->ftp_nargs); 828 uintptr_t *stack = (uintptr_t *)rp->r_rsp; 829 830 for (i = 0; i < cap; i++) { 831 x = probe->ftp_argmap[i]; 832 833 if (x < 6) 834 argv[i] = (&rp->r_rdi)[x]; 835 else 836 argv[i] = fasttrap_fulword_noerr(&stack[x]); 837 } 838 839 for (; i < argc; i++) { 840 argv[i] = 0; 841 } 842 } 843 #endif 844 845 #ifdef __i386__ 846 static void 847 fasttrap_usdt_args32(fasttrap_probe_t *probe, struct reg *rp, int argc, 848 uint32_t *argv) 849 { 850 int i, x, cap = MIN(argc, probe->ftp_nargs); 851 uint32_t *stack = (uint32_t *)rp->r_rsp; 852 853 for (i = 0; i < cap; i++) { 854 x = probe->ftp_argmap[i]; 855 856 argv[i] = fasttrap_fuword32_noerr(&stack[x]); 857 } 858 859 for (; i < argc; i++) { 860 argv[i] = 0; 861 } 862 } 863 #endif 864 865 static int 866 fasttrap_do_seg(fasttrap_tracepoint_t *tp, struct reg *rp, uintptr_t *addr) 867 { 868 proc_t *p = curproc; 869 #ifdef __i386__ 870 struct segment_descriptor *desc; 871 #else 872 struct user_segment_descriptor *desc; 873 #endif 874 uint16_t sel = 0, ndx, type; 875 uintptr_t limit; 876 877 switch (tp->ftt_segment) { 878 case FASTTRAP_SEG_CS: 879 sel = rp->r_cs; 880 break; 881 case FASTTRAP_SEG_DS: 882 sel = rp->r_ds; 883 break; 884 case FASTTRAP_SEG_ES: 885 sel = rp->r_es; 886 break; 887 case FASTTRAP_SEG_FS: 888 sel = rp->r_fs; 889 break; 890 case FASTTRAP_SEG_GS: 891 sel = rp->r_gs; 892 break; 893 case FASTTRAP_SEG_SS: 894 sel = rp->r_ss; 895 break; 896 } 897 898 /* 899 * Make sure the given segment register specifies a user priority 900 * selector rather than a kernel selector. 901 */ 902 if (ISPL(sel) != SEL_UPL) 903 return (-1); 904 905 ndx = IDXSEL(sel); 906 907 /* 908 * Check the bounds and grab the descriptor out of the specified 909 * descriptor table. 910 */ 911 if (ISLDT(sel)) { 912 #ifdef __i386__ 913 if (ndx > p->p_md.md_ldt->ldt_len) 914 return (-1); 915 916 desc = (struct segment_descriptor *) 917 p->p_md.md_ldt[ndx].ldt_base; 918 #else 919 if (ndx > max_ldt_segment) 920 return (-1); 921 922 desc = (struct user_segment_descriptor *) 923 p->p_md.md_ldt[ndx].ldt_base; 924 #endif 925 926 } else { 927 if (ndx >= NGDT) 928 return (-1); 929 930 #ifdef __i386__ 931 desc = &gdt[ndx].sd; 932 #else 933 desc = &gdt[ndx]; 934 #endif 935 } 936 937 /* 938 * The descriptor must have user privilege level and it must be 939 * present in memory. 940 */ 941 if (desc->sd_dpl != SEL_UPL || desc->sd_p != 1) 942 return (-1); 943 944 type = desc->sd_type; 945 946 /* 947 * If the S bit in the type field is not set, this descriptor can 948 * only be used in system context. 949 */ 950 if ((type & 0x10) != 0x10) 951 return (-1); 952 953 limit = USD_GETLIMIT(desc) * (desc->sd_gran ? PAGESIZE : 1); 954 955 if (tp->ftt_segment == FASTTRAP_SEG_CS) { 956 /* 957 * The code/data bit and readable bit must both be set. 958 */ 959 if ((type & 0xa) != 0xa) 960 return (-1); 961 962 if (*addr > limit) 963 return (-1); 964 } else { 965 /* 966 * The code/data bit must be clear. 967 */ 968 if ((type & 0x8) != 0) 969 return (-1); 970 971 /* 972 * If the expand-down bit is clear, we just check the limit as 973 * it would naturally be applied. Otherwise, we need to check 974 * that the address is the range [limit + 1 .. 0xffff] or 975 * [limit + 1 ... 0xffffffff] depending on if the default 976 * operand size bit is set. 977 */ 978 if ((type & 0x4) == 0) { 979 if (*addr > limit) 980 return (-1); 981 } else if (desc->sd_def32) { 982 if (*addr < limit + 1 || 0xffff < *addr) 983 return (-1); 984 } else { 985 if (*addr < limit + 1 || 0xffffffff < *addr) 986 return (-1); 987 } 988 } 989 990 *addr += USD_GETBASE(desc); 991 992 return (0); 993 } 994 995 int 996 fasttrap_pid_probe(struct reg *rp) 997 { 998 proc_t *p = curproc; 999 #ifndef illumos 1000 struct rm_priotracker tracker; 1001 proc_t *pp; 1002 #endif 1003 uintptr_t pc = rp->r_rip - 1; 1004 uintptr_t new_pc = 0; 1005 fasttrap_bucket_t *bucket; 1006 #ifdef illumos 1007 kmutex_t *pid_mtx; 1008 #endif 1009 fasttrap_tracepoint_t *tp, tp_local; 1010 pid_t pid; 1011 dtrace_icookie_t cookie; 1012 uint_t is_enabled = 0; 1013 1014 /* 1015 * It's possible that a user (in a veritable orgy of bad planning) 1016 * could redirect this thread's flow of control before it reached the 1017 * return probe fasttrap. In this case we need to kill the process 1018 * since it's in a unrecoverable state. 1019 */ 1020 if (curthread->t_dtrace_step) { 1021 ASSERT(curthread->t_dtrace_on); 1022 fasttrap_sigtrap(p, curthread, pc); 1023 return (0); 1024 } 1025 1026 /* 1027 * Clear all user tracing flags. 1028 */ 1029 curthread->t_dtrace_ft = 0; 1030 curthread->t_dtrace_pc = 0; 1031 curthread->t_dtrace_npc = 0; 1032 curthread->t_dtrace_scrpc = 0; 1033 curthread->t_dtrace_astpc = 0; 1034 #ifdef __amd64 1035 curthread->t_dtrace_regv = 0; 1036 #endif 1037 1038 /* 1039 * Treat a child created by a call to vfork(2) as if it were its 1040 * parent. We know that there's only one thread of control in such a 1041 * process: this one. 1042 */ 1043 #ifdef illumos 1044 while (p->p_flag & SVFORK) { 1045 p = p->p_parent; 1046 } 1047 1048 pid = p->p_pid; 1049 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 1050 mutex_enter(pid_mtx); 1051 #else 1052 pp = p; 1053 sx_slock(&proctree_lock); 1054 while (pp->p_vmspace == pp->p_pptr->p_vmspace) 1055 pp = pp->p_pptr; 1056 pid = pp->p_pid; 1057 sx_sunlock(&proctree_lock); 1058 pp = NULL; 1059 1060 rm_rlock(&fasttrap_tp_lock, &tracker); 1061 #endif 1062 1063 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 1064 1065 /* 1066 * Lookup the tracepoint that the process just hit. 1067 */ 1068 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 1069 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 1070 tp->ftt_proc->ftpc_acount != 0) 1071 break; 1072 } 1073 1074 /* 1075 * If we couldn't find a matching tracepoint, either a tracepoint has 1076 * been inserted without using the pid<pid> ioctl interface (see 1077 * fasttrap_ioctl), or somehow we have mislaid this tracepoint. 1078 */ 1079 if (tp == NULL) { 1080 #ifdef illumos 1081 mutex_exit(pid_mtx); 1082 #else 1083 rm_runlock(&fasttrap_tp_lock, &tracker); 1084 #endif 1085 return (-1); 1086 } 1087 1088 /* 1089 * Set the program counter to the address of the traced instruction 1090 * so that it looks right in ustack() output. 1091 */ 1092 rp->r_rip = pc; 1093 1094 if (tp->ftt_ids != NULL) { 1095 fasttrap_id_t *id; 1096 1097 #ifdef __amd64 1098 if (p->p_model == DATAMODEL_LP64) { 1099 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 1100 fasttrap_probe_t *probe = id->fti_probe; 1101 1102 if (id->fti_ptype == DTFTP_ENTRY) { 1103 /* 1104 * We note that this was an entry 1105 * probe to help ustack() find the 1106 * first caller. 1107 */ 1108 cookie = dtrace_interrupt_disable(); 1109 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 1110 dtrace_probe(probe->ftp_id, rp->r_rdi, 1111 rp->r_rsi, rp->r_rdx, rp->r_rcx, 1112 rp->r_r8); 1113 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 1114 dtrace_interrupt_enable(cookie); 1115 } else if (id->fti_ptype == DTFTP_IS_ENABLED) { 1116 /* 1117 * Note that in this case, we don't 1118 * call dtrace_probe() since it's only 1119 * an artificial probe meant to change 1120 * the flow of control so that it 1121 * encounters the true probe. 1122 */ 1123 is_enabled = 1; 1124 } else if (probe->ftp_argmap == NULL) { 1125 dtrace_probe(probe->ftp_id, rp->r_rdi, 1126 rp->r_rsi, rp->r_rdx, rp->r_rcx, 1127 rp->r_r8); 1128 } else { 1129 uintptr_t t[5]; 1130 1131 fasttrap_usdt_args64(probe, rp, 1132 sizeof (t) / sizeof (t[0]), t); 1133 1134 dtrace_probe(probe->ftp_id, t[0], t[1], 1135 t[2], t[3], t[4]); 1136 } 1137 } 1138 } else { 1139 #else /* __amd64 */ 1140 uintptr_t s0, s1, s2, s3, s4, s5; 1141 uint32_t *stack = (uint32_t *)rp->r_esp; 1142 1143 /* 1144 * In 32-bit mode, all arguments are passed on the 1145 * stack. If this is a function entry probe, we need 1146 * to skip the first entry on the stack as it 1147 * represents the return address rather than a 1148 * parameter to the function. 1149 */ 1150 s0 = fasttrap_fuword32_noerr(&stack[0]); 1151 s1 = fasttrap_fuword32_noerr(&stack[1]); 1152 s2 = fasttrap_fuword32_noerr(&stack[2]); 1153 s3 = fasttrap_fuword32_noerr(&stack[3]); 1154 s4 = fasttrap_fuword32_noerr(&stack[4]); 1155 s5 = fasttrap_fuword32_noerr(&stack[5]); 1156 1157 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 1158 fasttrap_probe_t *probe = id->fti_probe; 1159 1160 if (id->fti_ptype == DTFTP_ENTRY) { 1161 /* 1162 * We note that this was an entry 1163 * probe to help ustack() find the 1164 * first caller. 1165 */ 1166 cookie = dtrace_interrupt_disable(); 1167 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 1168 dtrace_probe(probe->ftp_id, s1, s2, 1169 s3, s4, s5); 1170 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 1171 dtrace_interrupt_enable(cookie); 1172 } else if (id->fti_ptype == DTFTP_IS_ENABLED) { 1173 /* 1174 * Note that in this case, we don't 1175 * call dtrace_probe() since it's only 1176 * an artificial probe meant to change 1177 * the flow of control so that it 1178 * encounters the true probe. 1179 */ 1180 is_enabled = 1; 1181 } else if (probe->ftp_argmap == NULL) { 1182 dtrace_probe(probe->ftp_id, s0, s1, 1183 s2, s3, s4); 1184 } else { 1185 uint32_t t[5]; 1186 1187 fasttrap_usdt_args32(probe, rp, 1188 sizeof (t) / sizeof (t[0]), t); 1189 1190 dtrace_probe(probe->ftp_id, t[0], t[1], 1191 t[2], t[3], t[4]); 1192 } 1193 } 1194 #endif /* __amd64 */ 1195 #ifdef __amd64 1196 } 1197 #endif 1198 } 1199 1200 /* 1201 * We're about to do a bunch of work so we cache a local copy of 1202 * the tracepoint to emulate the instruction, and then find the 1203 * tracepoint again later if we need to light up any return probes. 1204 */ 1205 tp_local = *tp; 1206 #ifdef illumos 1207 mutex_exit(pid_mtx); 1208 #else 1209 rm_runlock(&fasttrap_tp_lock, &tracker); 1210 #endif 1211 tp = &tp_local; 1212 1213 /* 1214 * Set the program counter to appear as though the traced instruction 1215 * had completely executed. This ensures that fasttrap_getreg() will 1216 * report the expected value for REG_RIP. 1217 */ 1218 rp->r_rip = pc + tp->ftt_size; 1219 1220 /* 1221 * If there's an is-enabled probe connected to this tracepoint it 1222 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax' 1223 * instruction that was placed there by DTrace when the binary was 1224 * linked. As this probe is, in fact, enabled, we need to stuff 1 1225 * into %eax or %rax. Accordingly, we can bypass all the instruction 1226 * emulation logic since we know the inevitable result. It's possible 1227 * that a user could construct a scenario where the 'is-enabled' 1228 * probe was on some other instruction, but that would be a rather 1229 * exotic way to shoot oneself in the foot. 1230 */ 1231 if (is_enabled) { 1232 rp->r_rax = 1; 1233 new_pc = rp->r_rip; 1234 goto done; 1235 } 1236 1237 /* 1238 * We emulate certain types of instructions to ensure correctness 1239 * (in the case of position dependent instructions) or optimize 1240 * common cases. The rest we have the thread execute back in user- 1241 * land. 1242 */ 1243 switch (tp->ftt_type) { 1244 case FASTTRAP_T_RET: 1245 case FASTTRAP_T_RET16: 1246 { 1247 uintptr_t dst = 0; 1248 uintptr_t addr = 0; 1249 int ret = 0; 1250 1251 /* 1252 * We have to emulate _every_ facet of the behavior of a ret 1253 * instruction including what happens if the load from %esp 1254 * fails; in that case, we send a SIGSEGV. 1255 */ 1256 #ifdef __amd64 1257 if (p->p_model == DATAMODEL_NATIVE) { 1258 ret = dst = fasttrap_fulword((void *)rp->r_rsp); 1259 addr = rp->r_rsp + sizeof (uintptr_t); 1260 } else { 1261 #endif 1262 #ifdef __i386__ 1263 uint32_t dst32; 1264 ret = dst32 = fasttrap_fuword32((void *)rp->r_esp); 1265 dst = dst32; 1266 addr = rp->r_esp + sizeof (uint32_t); 1267 #endif 1268 #ifdef __amd64 1269 } 1270 #endif 1271 1272 if (ret == -1) { 1273 fasttrap_sigsegv(p, curthread, rp->r_rsp); 1274 new_pc = pc; 1275 break; 1276 } 1277 1278 if (tp->ftt_type == FASTTRAP_T_RET16) 1279 addr += tp->ftt_dest; 1280 1281 rp->r_rsp = addr; 1282 new_pc = dst; 1283 break; 1284 } 1285 1286 case FASTTRAP_T_JCC: 1287 { 1288 uint_t taken = 0; 1289 1290 switch (tp->ftt_code) { 1291 case FASTTRAP_JO: 1292 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) != 0; 1293 break; 1294 case FASTTRAP_JNO: 1295 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0; 1296 break; 1297 case FASTTRAP_JB: 1298 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0; 1299 break; 1300 case FASTTRAP_JAE: 1301 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0; 1302 break; 1303 case FASTTRAP_JE: 1304 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0; 1305 break; 1306 case FASTTRAP_JNE: 1307 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0; 1308 break; 1309 case FASTTRAP_JBE: 1310 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0 || 1311 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0; 1312 break; 1313 case FASTTRAP_JA: 1314 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0 && 1315 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0; 1316 break; 1317 case FASTTRAP_JS: 1318 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) != 0; 1319 break; 1320 case FASTTRAP_JNS: 1321 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0; 1322 break; 1323 case FASTTRAP_JP: 1324 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) != 0; 1325 break; 1326 case FASTTRAP_JNP: 1327 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) == 0; 1328 break; 1329 case FASTTRAP_JL: 1330 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) != 1331 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1332 break; 1333 case FASTTRAP_JGE: 1334 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) == 1335 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1336 break; 1337 case FASTTRAP_JLE: 1338 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 || 1339 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) != 1340 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1341 break; 1342 case FASTTRAP_JG: 1343 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 && 1344 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) == 1345 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1346 break; 1347 1348 } 1349 1350 if (taken) 1351 new_pc = tp->ftt_dest; 1352 else 1353 new_pc = pc + tp->ftt_size; 1354 break; 1355 } 1356 1357 case FASTTRAP_T_LOOP: 1358 { 1359 uint_t taken = 0; 1360 #ifdef __amd64 1361 greg_t cx = rp->r_rcx--; 1362 #else 1363 greg_t cx = rp->r_ecx--; 1364 #endif 1365 1366 switch (tp->ftt_code) { 1367 case FASTTRAP_LOOPNZ: 1368 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 && 1369 cx != 0; 1370 break; 1371 case FASTTRAP_LOOPZ: 1372 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 && 1373 cx != 0; 1374 break; 1375 case FASTTRAP_LOOP: 1376 taken = (cx != 0); 1377 break; 1378 } 1379 1380 if (taken) 1381 new_pc = tp->ftt_dest; 1382 else 1383 new_pc = pc + tp->ftt_size; 1384 break; 1385 } 1386 1387 case FASTTRAP_T_JCXZ: 1388 { 1389 #ifdef __amd64 1390 greg_t cx = rp->r_rcx; 1391 #else 1392 greg_t cx = rp->r_ecx; 1393 #endif 1394 1395 if (cx == 0) 1396 new_pc = tp->ftt_dest; 1397 else 1398 new_pc = pc + tp->ftt_size; 1399 break; 1400 } 1401 1402 case FASTTRAP_T_PUSHL_EBP: 1403 { 1404 int ret = 0; 1405 1406 #ifdef __amd64 1407 if (p->p_model == DATAMODEL_NATIVE) { 1408 rp->r_rsp -= sizeof (uintptr_t); 1409 ret = fasttrap_sulword((void *)rp->r_rsp, rp->r_rbp); 1410 } else { 1411 #endif 1412 #ifdef __i386__ 1413 rp->r_rsp -= sizeof (uint32_t); 1414 ret = fasttrap_suword32((void *)rp->r_rsp, rp->r_rbp); 1415 #endif 1416 #ifdef __amd64 1417 } 1418 #endif 1419 1420 if (ret == -1) { 1421 fasttrap_sigsegv(p, curthread, rp->r_rsp); 1422 new_pc = pc; 1423 break; 1424 } 1425 1426 new_pc = pc + tp->ftt_size; 1427 break; 1428 } 1429 1430 case FASTTRAP_T_NOP: 1431 new_pc = pc + tp->ftt_size; 1432 break; 1433 1434 case FASTTRAP_T_JMP: 1435 case FASTTRAP_T_CALL: 1436 if (tp->ftt_code == 0) { 1437 new_pc = tp->ftt_dest; 1438 } else { 1439 uintptr_t value, addr = tp->ftt_dest; 1440 1441 if (tp->ftt_base != FASTTRAP_NOREG) 1442 addr += fasttrap_getreg(rp, tp->ftt_base); 1443 if (tp->ftt_index != FASTTRAP_NOREG) 1444 addr += fasttrap_getreg(rp, tp->ftt_index) << 1445 tp->ftt_scale; 1446 1447 if (tp->ftt_code == 1) { 1448 /* 1449 * If there's a segment prefix for this 1450 * instruction, we'll need to check permissions 1451 * and bounds on the given selector, and adjust 1452 * the address accordingly. 1453 */ 1454 if (tp->ftt_segment != FASTTRAP_SEG_NONE && 1455 fasttrap_do_seg(tp, rp, &addr) != 0) { 1456 fasttrap_sigsegv(p, curthread, addr); 1457 new_pc = pc; 1458 break; 1459 } 1460 1461 #ifdef __amd64 1462 if (p->p_model == DATAMODEL_NATIVE) { 1463 #endif 1464 if ((value = fasttrap_fulword((void *)addr)) 1465 == -1) { 1466 fasttrap_sigsegv(p, curthread, 1467 addr); 1468 new_pc = pc; 1469 break; 1470 } 1471 new_pc = value; 1472 #ifdef __amd64 1473 } else { 1474 uint32_t value32; 1475 addr = (uintptr_t)(uint32_t)addr; 1476 if ((value32 = fasttrap_fuword32((void *)addr)) 1477 == -1) { 1478 fasttrap_sigsegv(p, curthread, 1479 addr); 1480 new_pc = pc; 1481 break; 1482 } 1483 new_pc = value32; 1484 } 1485 #endif 1486 } else { 1487 new_pc = addr; 1488 } 1489 } 1490 1491 /* 1492 * If this is a call instruction, we need to push the return 1493 * address onto the stack. If this fails, we send the process 1494 * a SIGSEGV and reset the pc to emulate what would happen if 1495 * this instruction weren't traced. 1496 */ 1497 if (tp->ftt_type == FASTTRAP_T_CALL) { 1498 int ret = 0; 1499 uintptr_t addr = 0, pcps; 1500 #ifdef __amd64 1501 if (p->p_model == DATAMODEL_NATIVE) { 1502 addr = rp->r_rsp - sizeof (uintptr_t); 1503 pcps = pc + tp->ftt_size; 1504 ret = fasttrap_sulword((void *)addr, pcps); 1505 } else { 1506 #endif 1507 addr = rp->r_rsp - sizeof (uint32_t); 1508 pcps = (uint32_t)(pc + tp->ftt_size); 1509 ret = fasttrap_suword32((void *)addr, pcps); 1510 #ifdef __amd64 1511 } 1512 #endif 1513 1514 if (ret == -1) { 1515 fasttrap_sigsegv(p, curthread, addr); 1516 new_pc = pc; 1517 break; 1518 } 1519 1520 rp->r_rsp = addr; 1521 } 1522 1523 break; 1524 1525 case FASTTRAP_T_COMMON: 1526 { 1527 uintptr_t addr; 1528 #if defined(__amd64) 1529 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22]; 1530 #else 1531 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7]; 1532 #endif 1533 uint_t i = 0; 1534 #ifdef illumos 1535 klwp_t *lwp = ttolwp(curthread); 1536 1537 /* 1538 * Compute the address of the ulwp_t and step over the 1539 * ul_self pointer. The method used to store the user-land 1540 * thread pointer is very different on 32- and 64-bit 1541 * kernels. 1542 */ 1543 #if defined(__amd64) 1544 if (p->p_model == DATAMODEL_LP64) { 1545 addr = lwp->lwp_pcb.pcb_fsbase; 1546 addr += sizeof (void *); 1547 } else { 1548 addr = lwp->lwp_pcb.pcb_gsbase; 1549 addr += sizeof (caddr32_t); 1550 } 1551 #else 1552 addr = USD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc); 1553 addr += sizeof (void *); 1554 #endif 1555 #else /* !illumos */ 1556 fasttrap_scrspace_t *scrspace; 1557 scrspace = fasttrap_scraddr(curthread, tp->ftt_proc); 1558 if (scrspace == NULL) { 1559 /* 1560 * We failed to allocate scratch space for this thread. 1561 * Try to write the original instruction back out and 1562 * reset the pc. 1563 */ 1564 if (fasttrap_copyout(tp->ftt_instr, (void *)pc, 1565 tp->ftt_size)) 1566 fasttrap_sigtrap(p, curthread, pc); 1567 new_pc = pc; 1568 break; 1569 } 1570 addr = scrspace->ftss_addr; 1571 #endif /* illumos */ 1572 1573 /* 1574 * Generic Instruction Tracing 1575 * --------------------------- 1576 * 1577 * This is the layout of the scratch space in the user-land 1578 * thread structure for our generated instructions. 1579 * 1580 * 32-bit mode bytes 1581 * ------------------------ ----- 1582 * a: <original instruction> <= 15 1583 * jmp <pc + tp->ftt_size> 5 1584 * b: <original instruction> <= 15 1585 * int T_DTRACE_RET 2 1586 * ----- 1587 * <= 37 1588 * 1589 * 64-bit mode bytes 1590 * ------------------------ ----- 1591 * a: <original instruction> <= 15 1592 * jmp 0(%rip) 6 1593 * <pc + tp->ftt_size> 8 1594 * b: <original instruction> <= 15 1595 * int T_DTRACE_RET 2 1596 * ----- 1597 * <= 46 1598 * 1599 * The %pc is set to a, and curthread->t_dtrace_astpc is set 1600 * to b. If we encounter a signal on the way out of the 1601 * kernel, trap() will set %pc to curthread->t_dtrace_astpc 1602 * so that we execute the original instruction and re-enter 1603 * the kernel rather than redirecting to the next instruction. 1604 * 1605 * If there are return probes (so we know that we're going to 1606 * need to reenter the kernel after executing the original 1607 * instruction), the scratch space will just contain the 1608 * original instruction followed by an interrupt -- the same 1609 * data as at b. 1610 * 1611 * %rip-relative Addressing 1612 * ------------------------ 1613 * 1614 * There's a further complication in 64-bit mode due to %rip- 1615 * relative addressing. While this is clearly a beneficial 1616 * architectural decision for position independent code, it's 1617 * hard not to see it as a personal attack against the pid 1618 * provider since before there was a relatively small set of 1619 * instructions to emulate; with %rip-relative addressing, 1620 * almost every instruction can potentially depend on the 1621 * address at which it's executed. Rather than emulating 1622 * the broad spectrum of instructions that can now be 1623 * position dependent, we emulate jumps and others as in 1624 * 32-bit mode, and take a different tack for instructions 1625 * using %rip-relative addressing. 1626 * 1627 * For every instruction that uses the ModRM byte, the 1628 * in-kernel disassembler reports its location. We use the 1629 * ModRM byte to identify that an instruction uses 1630 * %rip-relative addressing and to see what other registers 1631 * the instruction uses. To emulate those instructions, 1632 * we modify the instruction to be %rax-relative rather than 1633 * %rip-relative (or %rcx-relative if the instruction uses 1634 * %rax; or %r8- or %r9-relative if the REX.B is present so 1635 * we don't have to rewrite the REX prefix). We then load 1636 * the value that %rip would have been into the scratch 1637 * register and generate an instruction to reset the scratch 1638 * register back to its original value. The instruction 1639 * sequence looks like this: 1640 * 1641 * 64-mode %rip-relative bytes 1642 * ------------------------ ----- 1643 * a: <modified instruction> <= 15 1644 * movq $<value>, %<scratch> 6 1645 * jmp 0(%rip) 6 1646 * <pc + tp->ftt_size> 8 1647 * b: <modified instruction> <= 15 1648 * int T_DTRACE_RET 2 1649 * ----- 1650 * 52 1651 * 1652 * We set curthread->t_dtrace_regv so that upon receiving 1653 * a signal we can reset the value of the scratch register. 1654 */ 1655 1656 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE); 1657 1658 curthread->t_dtrace_scrpc = addr; 1659 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1660 i += tp->ftt_size; 1661 1662 #ifdef __amd64 1663 if (tp->ftt_ripmode != 0) { 1664 greg_t *reg = NULL; 1665 1666 ASSERT(p->p_model == DATAMODEL_LP64); 1667 ASSERT(tp->ftt_ripmode & 1668 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2)); 1669 1670 /* 1671 * If this was a %rip-relative instruction, we change 1672 * it to be either a %rax- or %rcx-relative 1673 * instruction (depending on whether those registers 1674 * are used as another operand; or %r8- or %r9- 1675 * relative depending on the value of REX.B). We then 1676 * set that register and generate a movq instruction 1677 * to reset the value. 1678 */ 1679 if (tp->ftt_ripmode & FASTTRAP_RIP_X) 1680 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1); 1681 else 1682 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0); 1683 1684 if (tp->ftt_ripmode & FASTTRAP_RIP_1) 1685 scratch[i++] = FASTTRAP_MOV_EAX; 1686 else 1687 scratch[i++] = FASTTRAP_MOV_ECX; 1688 1689 switch (tp->ftt_ripmode) { 1690 case FASTTRAP_RIP_1: 1691 reg = &rp->r_rax; 1692 curthread->t_dtrace_reg = REG_RAX; 1693 break; 1694 case FASTTRAP_RIP_2: 1695 reg = &rp->r_rcx; 1696 curthread->t_dtrace_reg = REG_RCX; 1697 break; 1698 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X: 1699 reg = &rp->r_r8; 1700 curthread->t_dtrace_reg = REG_R8; 1701 break; 1702 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X: 1703 reg = &rp->r_r9; 1704 curthread->t_dtrace_reg = REG_R9; 1705 break; 1706 } 1707 1708 /* LINTED - alignment */ 1709 *(uint64_t *)&scratch[i] = *reg; 1710 curthread->t_dtrace_regv = *reg; 1711 *reg = pc + tp->ftt_size; 1712 i += sizeof (uint64_t); 1713 } 1714 #endif 1715 1716 /* 1717 * Generate the branch instruction to what would have 1718 * normally been the subsequent instruction. In 32-bit mode, 1719 * this is just a relative branch; in 64-bit mode this is a 1720 * %rip-relative branch that loads the 64-bit pc value 1721 * immediately after the jmp instruction. 1722 */ 1723 #ifdef __amd64 1724 if (p->p_model == DATAMODEL_LP64) { 1725 scratch[i++] = FASTTRAP_GROUP5_OP; 1726 scratch[i++] = FASTTRAP_MODRM(0, 4, 5); 1727 /* LINTED - alignment */ 1728 *(uint32_t *)&scratch[i] = 0; 1729 i += sizeof (uint32_t); 1730 /* LINTED - alignment */ 1731 *(uint64_t *)&scratch[i] = pc + tp->ftt_size; 1732 i += sizeof (uint64_t); 1733 } else { 1734 #endif 1735 #ifdef __i386__ 1736 /* 1737 * Set up the jmp to the next instruction; note that 1738 * the size of the traced instruction cancels out. 1739 */ 1740 scratch[i++] = FASTTRAP_JMP32; 1741 /* LINTED - alignment */ 1742 *(uint32_t *)&scratch[i] = pc - addr - 5; 1743 i += sizeof (uint32_t); 1744 #endif 1745 #ifdef __amd64 1746 } 1747 #endif 1748 1749 curthread->t_dtrace_astpc = addr + i; 1750 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1751 i += tp->ftt_size; 1752 scratch[i++] = FASTTRAP_INT; 1753 scratch[i++] = T_DTRACE_RET; 1754 1755 ASSERT(i <= sizeof (scratch)); 1756 1757 #ifdef illumos 1758 if (fasttrap_copyout(scratch, (char *)addr, i)) { 1759 #else 1760 if (uwrite(p, scratch, i, addr)) { 1761 #endif 1762 fasttrap_sigtrap(p, curthread, pc); 1763 new_pc = pc; 1764 break; 1765 } 1766 if (tp->ftt_retids != NULL) { 1767 curthread->t_dtrace_step = 1; 1768 curthread->t_dtrace_ret = 1; 1769 new_pc = curthread->t_dtrace_astpc; 1770 } else { 1771 new_pc = curthread->t_dtrace_scrpc; 1772 } 1773 1774 curthread->t_dtrace_pc = pc; 1775 curthread->t_dtrace_npc = pc + tp->ftt_size; 1776 curthread->t_dtrace_on = 1; 1777 break; 1778 } 1779 1780 default: 1781 panic("fasttrap: mishandled an instruction"); 1782 } 1783 1784 done: 1785 /* 1786 * If there were no return probes when we first found the tracepoint, 1787 * we should feel no obligation to honor any return probes that were 1788 * subsequently enabled -- they'll just have to wait until the next 1789 * time around. 1790 */ 1791 if (tp->ftt_retids != NULL) { 1792 /* 1793 * We need to wait until the results of the instruction are 1794 * apparent before invoking any return probes. If this 1795 * instruction was emulated we can just call 1796 * fasttrap_return_common(); if it needs to be executed, we 1797 * need to wait until the user thread returns to the kernel. 1798 */ 1799 if (tp->ftt_type != FASTTRAP_T_COMMON) { 1800 /* 1801 * Set the program counter to the address of the traced 1802 * instruction so that it looks right in ustack() 1803 * output. We had previously set it to the end of the 1804 * instruction to simplify %rip-relative addressing. 1805 */ 1806 rp->r_rip = pc; 1807 1808 fasttrap_return_common(rp, pc, pid, new_pc); 1809 } else { 1810 ASSERT(curthread->t_dtrace_ret != 0); 1811 ASSERT(curthread->t_dtrace_pc == pc); 1812 ASSERT(curthread->t_dtrace_scrpc != 0); 1813 ASSERT(new_pc == curthread->t_dtrace_astpc); 1814 } 1815 } 1816 1817 rp->r_rip = new_pc; 1818 1819 #ifndef illumos 1820 PROC_LOCK(p); 1821 proc_write_regs(curthread, rp); 1822 PROC_UNLOCK(p); 1823 #endif 1824 1825 return (0); 1826 } 1827 1828 int 1829 fasttrap_return_probe(struct reg *rp) 1830 { 1831 proc_t *p = curproc; 1832 uintptr_t pc = curthread->t_dtrace_pc; 1833 uintptr_t npc = curthread->t_dtrace_npc; 1834 1835 curthread->t_dtrace_pc = 0; 1836 curthread->t_dtrace_npc = 0; 1837 curthread->t_dtrace_scrpc = 0; 1838 curthread->t_dtrace_astpc = 0; 1839 1840 #ifdef illumos 1841 /* 1842 * Treat a child created by a call to vfork(2) as if it were its 1843 * parent. We know that there's only one thread of control in such a 1844 * process: this one. 1845 */ 1846 while (p->p_flag & SVFORK) { 1847 p = p->p_parent; 1848 } 1849 #endif 1850 1851 /* 1852 * We set rp->r_rip to the address of the traced instruction so 1853 * that it appears to dtrace_probe() that we're on the original 1854 * instruction, and so that the user can't easily detect our 1855 * complex web of lies. dtrace_return_probe() (our caller) 1856 * will correctly set %pc after we return. 1857 */ 1858 rp->r_rip = pc; 1859 1860 fasttrap_return_common(rp, pc, p->p_pid, npc); 1861 1862 return (0); 1863 } 1864 1865 /*ARGSUSED*/ 1866 uint64_t 1867 fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 1868 int aframes) 1869 { 1870 struct reg r; 1871 1872 fill_regs(curthread, &r); 1873 1874 return (fasttrap_anarg(&r, 1, argno)); 1875 } 1876 1877 /*ARGSUSED*/ 1878 uint64_t 1879 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 1880 int aframes) 1881 { 1882 struct reg r; 1883 1884 fill_regs(curthread, &r); 1885 1886 return (fasttrap_anarg(&r, 0, argno)); 1887 } 1888 1889 static ulong_t 1890 fasttrap_getreg(struct reg *rp, uint_t reg) 1891 { 1892 #ifdef __amd64 1893 switch (reg) { 1894 case REG_R15: return (rp->r_r15); 1895 case REG_R14: return (rp->r_r14); 1896 case REG_R13: return (rp->r_r13); 1897 case REG_R12: return (rp->r_r12); 1898 case REG_R11: return (rp->r_r11); 1899 case REG_R10: return (rp->r_r10); 1900 case REG_R9: return (rp->r_r9); 1901 case REG_R8: return (rp->r_r8); 1902 case REG_RDI: return (rp->r_rdi); 1903 case REG_RSI: return (rp->r_rsi); 1904 case REG_RBP: return (rp->r_rbp); 1905 case REG_RBX: return (rp->r_rbx); 1906 case REG_RDX: return (rp->r_rdx); 1907 case REG_RCX: return (rp->r_rcx); 1908 case REG_RAX: return (rp->r_rax); 1909 case REG_TRAPNO: return (rp->r_trapno); 1910 case REG_ERR: return (rp->r_err); 1911 case REG_RIP: return (rp->r_rip); 1912 case REG_CS: return (rp->r_cs); 1913 #ifdef illumos 1914 case REG_RFL: return (rp->r_rfl); 1915 #endif 1916 case REG_RSP: return (rp->r_rsp); 1917 case REG_SS: return (rp->r_ss); 1918 case REG_FS: return (rp->r_fs); 1919 case REG_GS: return (rp->r_gs); 1920 case REG_DS: return (rp->r_ds); 1921 case REG_ES: return (rp->r_es); 1922 case REG_FSBASE: return (rdmsr(MSR_FSBASE)); 1923 case REG_GSBASE: return (rdmsr(MSR_GSBASE)); 1924 } 1925 1926 panic("dtrace: illegal register constant"); 1927 /*NOTREACHED*/ 1928 #else 1929 #define _NGREG 19 1930 if (reg >= _NGREG) 1931 panic("dtrace: illegal register constant"); 1932 1933 return (((greg_t *)&rp->r_gs)[reg]); 1934 #endif 1935 } 1936