xref: /freebsd/sys/cddl/contrib/opensolaris/uts/intel/dtrace/fasttrap_isa.c (revision 7661de35d15f582ab33e3bd6b8d909601557e436)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  *
21  * Portions Copyright 2010 The FreeBSD Foundation
22  *
23  * $FreeBSD$
24  */
25 
26 /*
27  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
28  * Use is subject to license terms.
29  */
30 
31 #if defined(sun)
32 #pragma ident	"%Z%%M%	%I%	%E% SMI"
33 #endif
34 
35 #include <sys/fasttrap_isa.h>
36 #include <sys/fasttrap_impl.h>
37 #include <sys/dtrace.h>
38 #include <sys/dtrace_impl.h>
39 #include <sys/cmn_err.h>
40 #if defined(sun)
41 #include <sys/regset.h>
42 #include <sys/privregs.h>
43 #include <sys/segments.h>
44 #include <sys/x86_archext.h>
45 #else
46 #include <cddl/dev/dtrace/dtrace_cddl.h>
47 #include <sys/types.h>
48 #include <sys/proc.h>
49 #include <sys/dtrace_bsd.h>
50 #include <cddl/dev/dtrace/x86/regset.h>
51 #include <machine/segments.h>
52 #include <machine/reg.h>
53 #include <machine/pcb.h>
54 #endif
55 #include <sys/sysmacros.h>
56 #if defined(sun)
57 #include <sys/trap.h>
58 #include <sys/archsystm.h>
59 #else
60 #include <sys/ptrace.h>
61 
62 static int
63 proc_ops(int op, proc_t *p, void *kaddr, off_t uaddr, size_t len)
64 {
65 	struct iovec iov;
66 	struct uio uio;
67 
68 	iov.iov_base = kaddr;
69 	iov.iov_len = len;
70 	uio.uio_offset = uaddr;
71 	uio.uio_iov = &iov;
72 	uio.uio_resid = len;
73 	uio.uio_iovcnt = 1;
74 	uio.uio_segflg = UIO_SYSSPACE;
75 	uio.uio_td = curthread;
76 	uio.uio_rw = op;
77 	PHOLD(p);
78 	if (proc_rwmem(p, &uio) != 0) {
79 		PRELE(p);
80 		return (-1);
81 	}
82 	PRELE(p);
83 
84 	return (0);
85 }
86 
87 static int
88 uread(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr)
89 {
90 
91 	return (proc_ops(UIO_READ, p, kaddr, uaddr, len));
92 }
93 
94 static int
95 uwrite(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr)
96 {
97 
98 	return (proc_ops(UIO_WRITE, p, kaddr, uaddr, len));
99 }
100 #endif /* sun */
101 #ifdef __i386__
102 #define	r_rax	r_eax
103 #define	r_rbx	r_ebx
104 #define	r_rip	r_eip
105 #define	r_rflags r_eflags
106 #define	r_rsp	r_esp
107 #define	r_rbp	r_ebp
108 #endif
109 
110 /*
111  * Lossless User-Land Tracing on x86
112  * ---------------------------------
113  *
114  * The execution of most instructions is not dependent on the address; for
115  * these instructions it is sufficient to copy them into the user process's
116  * address space and execute them. To effectively single-step an instruction
117  * in user-land, we copy out the following sequence of instructions to scratch
118  * space in the user thread's ulwp_t structure.
119  *
120  * We then set the program counter (%eip or %rip) to point to this scratch
121  * space. Once execution resumes, the original instruction is executed and
122  * then control flow is redirected to what was originally the subsequent
123  * instruction. If the kernel attemps to deliver a signal while single-
124  * stepping, the signal is deferred and the program counter is moved into the
125  * second sequence of instructions. The second sequence ends in a trap into
126  * the kernel where the deferred signal is then properly handled and delivered.
127  *
128  * For instructions whose execute is position dependent, we perform simple
129  * emulation. These instructions are limited to control transfer
130  * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle
131  * of %rip-relative addressing that means that almost any instruction can be
132  * position dependent. For all the details on how we emulate generic
133  * instructions included %rip-relative instructions, see the code in
134  * fasttrap_pid_probe() below where we handle instructions of type
135  * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing).
136  */
137 
138 #define	FASTTRAP_MODRM_MOD(modrm)	(((modrm) >> 6) & 0x3)
139 #define	FASTTRAP_MODRM_REG(modrm)	(((modrm) >> 3) & 0x7)
140 #define	FASTTRAP_MODRM_RM(modrm)	((modrm) & 0x7)
141 #define	FASTTRAP_MODRM(mod, reg, rm)	(((mod) << 6) | ((reg) << 3) | (rm))
142 
143 #define	FASTTRAP_SIB_SCALE(sib)		(((sib) >> 6) & 0x3)
144 #define	FASTTRAP_SIB_INDEX(sib)		(((sib) >> 3) & 0x7)
145 #define	FASTTRAP_SIB_BASE(sib)		((sib) & 0x7)
146 
147 #define	FASTTRAP_REX_W(rex)		(((rex) >> 3) & 1)
148 #define	FASTTRAP_REX_R(rex)		(((rex) >> 2) & 1)
149 #define	FASTTRAP_REX_X(rex)		(((rex) >> 1) & 1)
150 #define	FASTTRAP_REX_B(rex)		((rex) & 1)
151 #define	FASTTRAP_REX(w, r, x, b)	\
152 	(0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b))
153 
154 /*
155  * Single-byte op-codes.
156  */
157 #define	FASTTRAP_PUSHL_EBP	0x55
158 
159 #define	FASTTRAP_JO		0x70
160 #define	FASTTRAP_JNO		0x71
161 #define	FASTTRAP_JB		0x72
162 #define	FASTTRAP_JAE		0x73
163 #define	FASTTRAP_JE		0x74
164 #define	FASTTRAP_JNE		0x75
165 #define	FASTTRAP_JBE		0x76
166 #define	FASTTRAP_JA		0x77
167 #define	FASTTRAP_JS		0x78
168 #define	FASTTRAP_JNS		0x79
169 #define	FASTTRAP_JP		0x7a
170 #define	FASTTRAP_JNP		0x7b
171 #define	FASTTRAP_JL		0x7c
172 #define	FASTTRAP_JGE		0x7d
173 #define	FASTTRAP_JLE		0x7e
174 #define	FASTTRAP_JG		0x7f
175 
176 #define	FASTTRAP_NOP		0x90
177 
178 #define	FASTTRAP_MOV_EAX	0xb8
179 #define	FASTTRAP_MOV_ECX	0xb9
180 
181 #define	FASTTRAP_RET16		0xc2
182 #define	FASTTRAP_RET		0xc3
183 
184 #define	FASTTRAP_LOOPNZ		0xe0
185 #define	FASTTRAP_LOOPZ		0xe1
186 #define	FASTTRAP_LOOP		0xe2
187 #define	FASTTRAP_JCXZ		0xe3
188 
189 #define	FASTTRAP_CALL		0xe8
190 #define	FASTTRAP_JMP32		0xe9
191 #define	FASTTRAP_JMP8		0xeb
192 
193 #define	FASTTRAP_INT3		0xcc
194 #define	FASTTRAP_INT		0xcd
195 
196 #define	FASTTRAP_2_BYTE_OP	0x0f
197 #define	FASTTRAP_GROUP5_OP	0xff
198 
199 /*
200  * Two-byte op-codes (second byte only).
201  */
202 #define	FASTTRAP_0F_JO		0x80
203 #define	FASTTRAP_0F_JNO		0x81
204 #define	FASTTRAP_0F_JB		0x82
205 #define	FASTTRAP_0F_JAE		0x83
206 #define	FASTTRAP_0F_JE		0x84
207 #define	FASTTRAP_0F_JNE		0x85
208 #define	FASTTRAP_0F_JBE		0x86
209 #define	FASTTRAP_0F_JA		0x87
210 #define	FASTTRAP_0F_JS		0x88
211 #define	FASTTRAP_0F_JNS		0x89
212 #define	FASTTRAP_0F_JP		0x8a
213 #define	FASTTRAP_0F_JNP		0x8b
214 #define	FASTTRAP_0F_JL		0x8c
215 #define	FASTTRAP_0F_JGE		0x8d
216 #define	FASTTRAP_0F_JLE		0x8e
217 #define	FASTTRAP_0F_JG		0x8f
218 
219 #define	FASTTRAP_EFLAGS_OF	0x800
220 #define	FASTTRAP_EFLAGS_DF	0x400
221 #define	FASTTRAP_EFLAGS_SF	0x080
222 #define	FASTTRAP_EFLAGS_ZF	0x040
223 #define	FASTTRAP_EFLAGS_AF	0x010
224 #define	FASTTRAP_EFLAGS_PF	0x004
225 #define	FASTTRAP_EFLAGS_CF	0x001
226 
227 /*
228  * Instruction prefixes.
229  */
230 #define	FASTTRAP_PREFIX_OPERAND	0x66
231 #define	FASTTRAP_PREFIX_ADDRESS	0x67
232 #define	FASTTRAP_PREFIX_CS	0x2E
233 #define	FASTTRAP_PREFIX_DS	0x3E
234 #define	FASTTRAP_PREFIX_ES	0x26
235 #define	FASTTRAP_PREFIX_FS	0x64
236 #define	FASTTRAP_PREFIX_GS	0x65
237 #define	FASTTRAP_PREFIX_SS	0x36
238 #define	FASTTRAP_PREFIX_LOCK	0xF0
239 #define	FASTTRAP_PREFIX_REP	0xF3
240 #define	FASTTRAP_PREFIX_REPNE	0xF2
241 
242 #define	FASTTRAP_NOREG	0xff
243 
244 /*
245  * Map between instruction register encodings and the kernel constants which
246  * correspond to indicies into struct regs.
247  */
248 #ifdef __amd64
249 static const uint8_t regmap[16] = {
250 	REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI,
251 	REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15,
252 };
253 #else
254 static const uint8_t regmap[8] = {
255 	EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI
256 };
257 #endif
258 
259 static ulong_t fasttrap_getreg(struct reg *, uint_t);
260 
261 static uint64_t
262 fasttrap_anarg(struct reg *rp, int function_entry, int argno)
263 {
264 	uint64_t value = 0;
265 	int shift = function_entry ? 1 : 0;
266 
267 #ifdef __amd64
268 	if (curproc->p_model == DATAMODEL_LP64) {
269 		uintptr_t *stack;
270 
271 		/*
272 		 * In 64-bit mode, the first six arguments are stored in
273 		 * registers.
274 		 */
275 		if (argno < 6)
276 			switch (argno) {
277 			case 0:
278 				return (rp->r_rdi);
279 			case 1:
280 				return (rp->r_rsi);
281 			case 2:
282 				return (rp->r_rdx);
283 			case 3:
284 				return (rp->r_rcx);
285 			case 4:
286 				return (rp->r_r8);
287 			case 5:
288 				return (rp->r_r9);
289 			}
290 
291 		stack = (uintptr_t *)rp->r_rsp;
292 		DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
293 		value = dtrace_fulword(&stack[argno - 6 + shift]);
294 		DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
295 	} else {
296 #endif
297 #ifdef __i386
298 		uint32_t *stack = (uint32_t *)rp->r_esp;
299 		DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
300 		value = dtrace_fuword32(&stack[argno + shift]);
301 		DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
302 #endif
303 #ifdef __amd64
304 	}
305 #endif
306 
307 	return (value);
308 }
309 
310 /*ARGSUSED*/
311 int
312 fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc,
313     fasttrap_probe_type_t type)
314 {
315 	uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10];
316 	size_t len = FASTTRAP_MAX_INSTR_SIZE;
317 	size_t first = MIN(len, PAGESIZE - (pc & PAGEOFFSET));
318 	uint_t start = 0;
319 	int rmindex, size;
320 	uint8_t seg, rex = 0;
321 
322 	/*
323 	 * Read the instruction at the given address out of the process's
324 	 * address space. We don't have to worry about a debugger
325 	 * changing this instruction before we overwrite it with our trap
326 	 * instruction since P_PR_LOCK is set. Since instructions can span
327 	 * pages, we potentially read the instruction in two parts. If the
328 	 * second part fails, we just zero out that part of the instruction.
329 	 */
330 	if (uread(p, &instr[0], first, pc) != 0)
331 		return (-1);
332 	if (len > first &&
333 	    uread(p, &instr[first], len - first, pc + first) != 0) {
334 		bzero(&instr[first], len - first);
335 		len = first;
336 	}
337 
338 	/*
339 	 * If the disassembly fails, then we have a malformed instruction.
340 	 */
341 	if ((size = dtrace_instr_size_isa(instr, p->p_model, &rmindex)) <= 0)
342 		return (-1);
343 
344 	/*
345 	 * Make sure the disassembler isn't completely broken.
346 	 */
347 	ASSERT(-1 <= rmindex && rmindex < size);
348 
349 	/*
350 	 * If the computed size is greater than the number of bytes read,
351 	 * then it was a malformed instruction possibly because it fell on a
352 	 * page boundary and the subsequent page was missing or because of
353 	 * some malicious user.
354 	 */
355 	if (size > len)
356 		return (-1);
357 
358 	tp->ftt_size = (uint8_t)size;
359 	tp->ftt_segment = FASTTRAP_SEG_NONE;
360 
361 	/*
362 	 * Find the start of the instruction's opcode by processing any
363 	 * legacy prefixes.
364 	 */
365 	for (;;) {
366 		seg = 0;
367 		switch (instr[start]) {
368 		case FASTTRAP_PREFIX_SS:
369 			seg++;
370 			/*FALLTHRU*/
371 		case FASTTRAP_PREFIX_GS:
372 			seg++;
373 			/*FALLTHRU*/
374 		case FASTTRAP_PREFIX_FS:
375 			seg++;
376 			/*FALLTHRU*/
377 		case FASTTRAP_PREFIX_ES:
378 			seg++;
379 			/*FALLTHRU*/
380 		case FASTTRAP_PREFIX_DS:
381 			seg++;
382 			/*FALLTHRU*/
383 		case FASTTRAP_PREFIX_CS:
384 			seg++;
385 			/*FALLTHRU*/
386 		case FASTTRAP_PREFIX_OPERAND:
387 		case FASTTRAP_PREFIX_ADDRESS:
388 		case FASTTRAP_PREFIX_LOCK:
389 		case FASTTRAP_PREFIX_REP:
390 		case FASTTRAP_PREFIX_REPNE:
391 			if (seg != 0) {
392 				/*
393 				 * It's illegal for an instruction to specify
394 				 * two segment prefixes -- give up on this
395 				 * illegal instruction.
396 				 */
397 				if (tp->ftt_segment != FASTTRAP_SEG_NONE)
398 					return (-1);
399 
400 				tp->ftt_segment = seg;
401 			}
402 			start++;
403 			continue;
404 		}
405 		break;
406 	}
407 
408 #ifdef __amd64
409 	/*
410 	 * Identify the REX prefix on 64-bit processes.
411 	 */
412 	if (p->p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40)
413 		rex = instr[start++];
414 #endif
415 
416 	/*
417 	 * Now that we're pretty sure that the instruction is okay, copy the
418 	 * valid part to the tracepoint.
419 	 */
420 	bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE);
421 
422 	tp->ftt_type = FASTTRAP_T_COMMON;
423 	if (instr[start] == FASTTRAP_2_BYTE_OP) {
424 		switch (instr[start + 1]) {
425 		case FASTTRAP_0F_JO:
426 		case FASTTRAP_0F_JNO:
427 		case FASTTRAP_0F_JB:
428 		case FASTTRAP_0F_JAE:
429 		case FASTTRAP_0F_JE:
430 		case FASTTRAP_0F_JNE:
431 		case FASTTRAP_0F_JBE:
432 		case FASTTRAP_0F_JA:
433 		case FASTTRAP_0F_JS:
434 		case FASTTRAP_0F_JNS:
435 		case FASTTRAP_0F_JP:
436 		case FASTTRAP_0F_JNP:
437 		case FASTTRAP_0F_JL:
438 		case FASTTRAP_0F_JGE:
439 		case FASTTRAP_0F_JLE:
440 		case FASTTRAP_0F_JG:
441 			tp->ftt_type = FASTTRAP_T_JCC;
442 			tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO;
443 			tp->ftt_dest = pc + tp->ftt_size +
444 			    /* LINTED - alignment */
445 			    *(int32_t *)&instr[start + 2];
446 			break;
447 		}
448 	} else if (instr[start] == FASTTRAP_GROUP5_OP) {
449 		uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]);
450 		uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]);
451 		uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]);
452 
453 		if (reg == 2 || reg == 4) {
454 			uint_t i, sz;
455 
456 			if (reg == 2)
457 				tp->ftt_type = FASTTRAP_T_CALL;
458 			else
459 				tp->ftt_type = FASTTRAP_T_JMP;
460 
461 			if (mod == 3)
462 				tp->ftt_code = 2;
463 			else
464 				tp->ftt_code = 1;
465 
466 			ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0);
467 
468 			/*
469 			 * See AMD x86-64 Architecture Programmer's Manual
470 			 * Volume 3, Section 1.2.7, Table 1-12, and
471 			 * Appendix A.3.1, Table A-15.
472 			 */
473 			if (mod != 3 && rm == 4) {
474 				uint8_t sib = instr[start + 2];
475 				uint_t index = FASTTRAP_SIB_INDEX(sib);
476 				uint_t base = FASTTRAP_SIB_BASE(sib);
477 
478 				tp->ftt_scale = FASTTRAP_SIB_SCALE(sib);
479 
480 				tp->ftt_index = (index == 4) ?
481 				    FASTTRAP_NOREG :
482 				    regmap[index | (FASTTRAP_REX_X(rex) << 3)];
483 				tp->ftt_base = (mod == 0 && base == 5) ?
484 				    FASTTRAP_NOREG :
485 				    regmap[base | (FASTTRAP_REX_B(rex) << 3)];
486 
487 				i = 3;
488 				sz = mod == 1 ? 1 : 4;
489 			} else {
490 				/*
491 				 * In 64-bit mode, mod == 0 and r/m == 5
492 				 * denotes %rip-relative addressing; in 32-bit
493 				 * mode, the base register isn't used. In both
494 				 * modes, there is a 32-bit operand.
495 				 */
496 				if (mod == 0 && rm == 5) {
497 #ifdef __amd64
498 					if (p->p_model == DATAMODEL_LP64)
499 						tp->ftt_base = REG_RIP;
500 					else
501 #endif
502 						tp->ftt_base = FASTTRAP_NOREG;
503 					sz = 4;
504 				} else  {
505 					uint8_t base = rm |
506 					    (FASTTRAP_REX_B(rex) << 3);
507 
508 					tp->ftt_base = regmap[base];
509 					sz = mod == 1 ? 1 : mod == 2 ? 4 : 0;
510 				}
511 				tp->ftt_index = FASTTRAP_NOREG;
512 				i = 2;
513 			}
514 
515 			if (sz == 1) {
516 				tp->ftt_dest = *(int8_t *)&instr[start + i];
517 			} else if (sz == 4) {
518 				/* LINTED - alignment */
519 				tp->ftt_dest = *(int32_t *)&instr[start + i];
520 			} else {
521 				tp->ftt_dest = 0;
522 			}
523 		}
524 	} else {
525 		switch (instr[start]) {
526 		case FASTTRAP_RET:
527 			tp->ftt_type = FASTTRAP_T_RET;
528 			break;
529 
530 		case FASTTRAP_RET16:
531 			tp->ftt_type = FASTTRAP_T_RET16;
532 			/* LINTED - alignment */
533 			tp->ftt_dest = *(uint16_t *)&instr[start + 1];
534 			break;
535 
536 		case FASTTRAP_JO:
537 		case FASTTRAP_JNO:
538 		case FASTTRAP_JB:
539 		case FASTTRAP_JAE:
540 		case FASTTRAP_JE:
541 		case FASTTRAP_JNE:
542 		case FASTTRAP_JBE:
543 		case FASTTRAP_JA:
544 		case FASTTRAP_JS:
545 		case FASTTRAP_JNS:
546 		case FASTTRAP_JP:
547 		case FASTTRAP_JNP:
548 		case FASTTRAP_JL:
549 		case FASTTRAP_JGE:
550 		case FASTTRAP_JLE:
551 		case FASTTRAP_JG:
552 			tp->ftt_type = FASTTRAP_T_JCC;
553 			tp->ftt_code = instr[start];
554 			tp->ftt_dest = pc + tp->ftt_size +
555 			    (int8_t)instr[start + 1];
556 			break;
557 
558 		case FASTTRAP_LOOPNZ:
559 		case FASTTRAP_LOOPZ:
560 		case FASTTRAP_LOOP:
561 			tp->ftt_type = FASTTRAP_T_LOOP;
562 			tp->ftt_code = instr[start];
563 			tp->ftt_dest = pc + tp->ftt_size +
564 			    (int8_t)instr[start + 1];
565 			break;
566 
567 		case FASTTRAP_JCXZ:
568 			tp->ftt_type = FASTTRAP_T_JCXZ;
569 			tp->ftt_dest = pc + tp->ftt_size +
570 			    (int8_t)instr[start + 1];
571 			break;
572 
573 		case FASTTRAP_CALL:
574 			tp->ftt_type = FASTTRAP_T_CALL;
575 			tp->ftt_dest = pc + tp->ftt_size +
576 			    /* LINTED - alignment */
577 			    *(int32_t *)&instr[start + 1];
578 			tp->ftt_code = 0;
579 			break;
580 
581 		case FASTTRAP_JMP32:
582 			tp->ftt_type = FASTTRAP_T_JMP;
583 			tp->ftt_dest = pc + tp->ftt_size +
584 			    /* LINTED - alignment */
585 			    *(int32_t *)&instr[start + 1];
586 			break;
587 		case FASTTRAP_JMP8:
588 			tp->ftt_type = FASTTRAP_T_JMP;
589 			tp->ftt_dest = pc + tp->ftt_size +
590 			    (int8_t)instr[start + 1];
591 			break;
592 
593 		case FASTTRAP_PUSHL_EBP:
594 			if (start == 0)
595 				tp->ftt_type = FASTTRAP_T_PUSHL_EBP;
596 			break;
597 
598 		case FASTTRAP_NOP:
599 #ifdef __amd64
600 			ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0);
601 
602 			/*
603 			 * On amd64 we have to be careful not to confuse a nop
604 			 * (actually xchgl %eax, %eax) with an instruction using
605 			 * the same opcode, but that does something different
606 			 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax).
607 			 */
608 			if (FASTTRAP_REX_B(rex) == 0)
609 #endif
610 				tp->ftt_type = FASTTRAP_T_NOP;
611 			break;
612 
613 		case FASTTRAP_INT3:
614 			/*
615 			 * The pid provider shares the int3 trap with debugger
616 			 * breakpoints so we can't instrument them.
617 			 */
618 			ASSERT(instr[start] == FASTTRAP_INSTR);
619 			return (-1);
620 
621 		case FASTTRAP_INT:
622 			/*
623 			 * Interrupts seem like they could be traced with
624 			 * no negative implications, but it's possible that
625 			 * a thread could be redirected by the trap handling
626 			 * code which would eventually return to the
627 			 * instruction after the interrupt. If the interrupt
628 			 * were in our scratch space, the subsequent
629 			 * instruction might be overwritten before we return.
630 			 * Accordingly we refuse to instrument any interrupt.
631 			 */
632 			return (-1);
633 		}
634 	}
635 
636 #ifdef __amd64
637 	if (p->p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) {
638 		/*
639 		 * If the process is 64-bit and the instruction type is still
640 		 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an
641 		 * execute it -- we need to watch for %rip-relative
642 		 * addressing mode. See the portion of fasttrap_pid_probe()
643 		 * below where we handle tracepoints with type
644 		 * FASTTRAP_T_COMMON for how we emulate instructions that
645 		 * employ %rip-relative addressing.
646 		 */
647 		if (rmindex != -1) {
648 			uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]);
649 			uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]);
650 			uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]);
651 
652 			ASSERT(rmindex > start);
653 
654 			if (mod == 0 && rm == 5) {
655 				/*
656 				 * We need to be sure to avoid other
657 				 * registers used by this instruction. While
658 				 * the reg field may determine the op code
659 				 * rather than denoting a register, assuming
660 				 * that it denotes a register is always safe.
661 				 * We leave the REX field intact and use
662 				 * whatever value's there for simplicity.
663 				 */
664 				if (reg != 0) {
665 					tp->ftt_ripmode = FASTTRAP_RIP_1 |
666 					    (FASTTRAP_RIP_X *
667 					    FASTTRAP_REX_B(rex));
668 					rm = 0;
669 				} else {
670 					tp->ftt_ripmode = FASTTRAP_RIP_2 |
671 					    (FASTTRAP_RIP_X *
672 					    FASTTRAP_REX_B(rex));
673 					rm = 1;
674 				}
675 
676 				tp->ftt_modrm = tp->ftt_instr[rmindex];
677 				tp->ftt_instr[rmindex] =
678 				    FASTTRAP_MODRM(2, reg, rm);
679 			}
680 		}
681 	}
682 #endif
683 
684 	return (0);
685 }
686 
687 int
688 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp)
689 {
690 	fasttrap_instr_t instr = FASTTRAP_INSTR;
691 
692 	if (uwrite(p, &instr, 1, tp->ftt_pc) != 0)
693 		return (-1);
694 
695 	return (0);
696 }
697 
698 int
699 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp)
700 {
701 	uint8_t instr;
702 
703 	/*
704 	 * Distinguish between read or write failures and a changed
705 	 * instruction.
706 	 */
707 	if (uread(p, &instr, 1, tp->ftt_pc) != 0)
708 		return (0);
709 	if (instr != FASTTRAP_INSTR)
710 		return (0);
711 	if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0)
712 		return (-1);
713 
714 	return (0);
715 }
716 
717 #ifdef __amd64
718 static uintptr_t
719 fasttrap_fulword_noerr(const void *uaddr)
720 {
721 	uintptr_t ret;
722 
723 	if ((ret = fasttrap_fulword(uaddr)) != -1)
724 		return (ret);
725 
726 	return (0);
727 }
728 #endif
729 
730 #ifdef __i386__
731 static uint32_t
732 fasttrap_fuword32_noerr(const void *uaddr)
733 {
734 	uint32_t ret;
735 
736 	if ((ret = fasttrap_fuword32(uaddr)) != -1)
737 		return (ret);
738 
739 	return (0);
740 }
741 #endif
742 
743 static void
744 fasttrap_return_common(struct reg *rp, uintptr_t pc, pid_t pid,
745     uintptr_t new_pc)
746 {
747 	fasttrap_tracepoint_t *tp;
748 	fasttrap_bucket_t *bucket;
749 	fasttrap_id_t *id;
750 #if defined(sun)
751 	kmutex_t *pid_mtx;
752 #endif
753 
754 #if defined(sun)
755 	pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
756 	mutex_enter(pid_mtx);
757 #endif
758 	bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
759 
760 	for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
761 		if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
762 		    tp->ftt_proc->ftpc_acount != 0)
763 			break;
764 	}
765 
766 	/*
767 	 * Don't sweat it if we can't find the tracepoint again; unlike
768 	 * when we're in fasttrap_pid_probe(), finding the tracepoint here
769 	 * is not essential to the correct execution of the process.
770 	 */
771 	if (tp == NULL) {
772 #if defined(sun)
773 		mutex_exit(pid_mtx);
774 #endif
775 		return;
776 	}
777 
778 	for (id = tp->ftt_retids; id != NULL; id = id->fti_next) {
779 		/*
780 		 * If there's a branch that could act as a return site, we
781 		 * need to trace it, and check here if the program counter is
782 		 * external to the function.
783 		 */
784 		if (tp->ftt_type != FASTTRAP_T_RET &&
785 		    tp->ftt_type != FASTTRAP_T_RET16 &&
786 		    new_pc - id->fti_probe->ftp_faddr <
787 		    id->fti_probe->ftp_fsize)
788 			continue;
789 
790 		dtrace_probe(id->fti_probe->ftp_id,
791 		    pc - id->fti_probe->ftp_faddr,
792 		    rp->r_rax, rp->r_rbx, 0, 0);
793 	}
794 
795 #if defined(sun)
796 	mutex_exit(pid_mtx);
797 #endif
798 }
799 
800 static void
801 fasttrap_sigsegv(proc_t *p, kthread_t *t, uintptr_t addr)
802 {
803 #if defined(sun)
804 	sigqueue_t *sqp = kmem_zalloc(sizeof (sigqueue_t), KM_SLEEP);
805 
806 	sqp->sq_info.si_signo = SIGSEGV;
807 	sqp->sq_info.si_code = SEGV_MAPERR;
808 	sqp->sq_info.si_addr = (caddr_t)addr;
809 
810 	mutex_enter(&p->p_lock);
811 	sigaddqa(p, t, sqp);
812 	mutex_exit(&p->p_lock);
813 
814 	if (t != NULL)
815 		aston(t);
816 #else
817 	ksiginfo_t *ksi = kmem_zalloc(sizeof (ksiginfo_t), KM_SLEEP);
818 
819 	ksiginfo_init(ksi);
820 	ksi->ksi_signo = SIGSEGV;
821 	ksi->ksi_code = SEGV_MAPERR;
822 	ksi->ksi_addr = (caddr_t)addr;
823 	(void) tdksignal(t, SIGSEGV, ksi);
824 #endif
825 }
826 
827 #ifdef __amd64
828 static void
829 fasttrap_usdt_args64(fasttrap_probe_t *probe, struct reg *rp, int argc,
830     uintptr_t *argv)
831 {
832 	int i, x, cap = MIN(argc, probe->ftp_nargs);
833 	uintptr_t *stack = (uintptr_t *)rp->r_rsp;
834 
835 	for (i = 0; i < cap; i++) {
836 		x = probe->ftp_argmap[i];
837 
838 		if (x < 6)
839 			argv[i] = (&rp->r_rdi)[x];
840 		else
841 			argv[i] = fasttrap_fulword_noerr(&stack[x]);
842 	}
843 
844 	for (; i < argc; i++) {
845 		argv[i] = 0;
846 	}
847 }
848 #endif
849 
850 #ifdef __i386__
851 static void
852 fasttrap_usdt_args32(fasttrap_probe_t *probe, struct reg *rp, int argc,
853     uint32_t *argv)
854 {
855 	int i, x, cap = MIN(argc, probe->ftp_nargs);
856 	uint32_t *stack = (uint32_t *)rp->r_rsp;
857 
858 	for (i = 0; i < cap; i++) {
859 		x = probe->ftp_argmap[i];
860 
861 		argv[i] = fasttrap_fuword32_noerr(&stack[x]);
862 	}
863 
864 	for (; i < argc; i++) {
865 		argv[i] = 0;
866 	}
867 }
868 #endif
869 
870 static int
871 fasttrap_do_seg(fasttrap_tracepoint_t *tp, struct reg *rp, uintptr_t *addr)
872 {
873 	proc_t *p = curproc;
874 #ifdef __i386__
875 	struct segment_descriptor *desc;
876 #else
877 	struct user_segment_descriptor *desc;
878 #endif
879 	uint16_t sel = 0, ndx, type;
880 	uintptr_t limit;
881 
882 	switch (tp->ftt_segment) {
883 	case FASTTRAP_SEG_CS:
884 		sel = rp->r_cs;
885 		break;
886 	case FASTTRAP_SEG_DS:
887 		sel = rp->r_ds;
888 		break;
889 	case FASTTRAP_SEG_ES:
890 		sel = rp->r_es;
891 		break;
892 	case FASTTRAP_SEG_FS:
893 		sel = rp->r_fs;
894 		break;
895 	case FASTTRAP_SEG_GS:
896 		sel = rp->r_gs;
897 		break;
898 	case FASTTRAP_SEG_SS:
899 		sel = rp->r_ss;
900 		break;
901 	}
902 
903 	/*
904 	 * Make sure the given segment register specifies a user priority
905 	 * selector rather than a kernel selector.
906 	 */
907 	if (ISPL(sel) != SEL_UPL)
908 		return (-1);
909 
910 	ndx = IDXSEL(sel);
911 
912 	/*
913 	 * Check the bounds and grab the descriptor out of the specified
914 	 * descriptor table.
915 	 */
916 	if (ISLDT(sel)) {
917 #ifdef __i386__
918 		if (ndx > p->p_md.md_ldt->ldt_len)
919 			return (-1);
920 
921 		desc = (struct segment_descriptor *)
922 		    p->p_md.md_ldt[ndx].ldt_base;
923 #else
924 		if (ndx > max_ldt_segment)
925 			return (-1);
926 
927 		desc = (struct user_segment_descriptor *)
928 		    p->p_md.md_ldt[ndx].ldt_base;
929 #endif
930 
931 	} else {
932 		if (ndx >= NGDT)
933 			return (-1);
934 
935 #ifdef __i386__
936 		desc = &gdt[ndx].sd;
937 #else
938 		desc = &gdt[ndx];
939 #endif
940 	}
941 
942 	/*
943 	 * The descriptor must have user privilege level and it must be
944 	 * present in memory.
945 	 */
946 	if (desc->sd_dpl != SEL_UPL || desc->sd_p != 1)
947 		return (-1);
948 
949 	type = desc->sd_type;
950 
951 	/*
952 	 * If the S bit in the type field is not set, this descriptor can
953 	 * only be used in system context.
954 	 */
955 	if ((type & 0x10) != 0x10)
956 		return (-1);
957 
958 	limit = USD_GETLIMIT(desc) * (desc->sd_gran ? PAGESIZE : 1);
959 
960 	if (tp->ftt_segment == FASTTRAP_SEG_CS) {
961 		/*
962 		 * The code/data bit and readable bit must both be set.
963 		 */
964 		if ((type & 0xa) != 0xa)
965 			return (-1);
966 
967 		if (*addr > limit)
968 			return (-1);
969 	} else {
970 		/*
971 		 * The code/data bit must be clear.
972 		 */
973 		if ((type & 0x8) != 0)
974 			return (-1);
975 
976 		/*
977 		 * If the expand-down bit is clear, we just check the limit as
978 		 * it would naturally be applied. Otherwise, we need to check
979 		 * that the address is the range [limit + 1 .. 0xffff] or
980 		 * [limit + 1 ... 0xffffffff] depending on if the default
981 		 * operand size bit is set.
982 		 */
983 		if ((type & 0x4) == 0) {
984 			if (*addr > limit)
985 				return (-1);
986 		} else if (desc->sd_def32) {
987 			if (*addr < limit + 1 || 0xffff < *addr)
988 				return (-1);
989 		} else {
990 			if (*addr < limit + 1 || 0xffffffff < *addr)
991 				return (-1);
992 		}
993 	}
994 
995 	*addr += USD_GETBASE(desc);
996 
997 	return (0);
998 }
999 
1000 int
1001 fasttrap_pid_probe(struct reg *rp)
1002 {
1003 	proc_t *p = curproc;
1004 #if !defined(sun)
1005 	proc_t *pp;
1006 #endif
1007 	uintptr_t pc = rp->r_rip - 1;
1008 	uintptr_t new_pc = 0;
1009 	fasttrap_bucket_t *bucket;
1010 #if defined(sun)
1011 	kmutex_t *pid_mtx;
1012 #endif
1013 	fasttrap_tracepoint_t *tp, tp_local;
1014 	pid_t pid;
1015 	dtrace_icookie_t cookie;
1016 	uint_t is_enabled = 0;
1017 
1018 	/*
1019 	 * It's possible that a user (in a veritable orgy of bad planning)
1020 	 * could redirect this thread's flow of control before it reached the
1021 	 * return probe fasttrap. In this case we need to kill the process
1022 	 * since it's in a unrecoverable state.
1023 	 */
1024 	if (curthread->t_dtrace_step) {
1025 		ASSERT(curthread->t_dtrace_on);
1026 		fasttrap_sigtrap(p, curthread, pc);
1027 		return (0);
1028 	}
1029 
1030 	/*
1031 	 * Clear all user tracing flags.
1032 	 */
1033 	curthread->t_dtrace_ft = 0;
1034 	curthread->t_dtrace_pc = 0;
1035 	curthread->t_dtrace_npc = 0;
1036 	curthread->t_dtrace_scrpc = 0;
1037 	curthread->t_dtrace_astpc = 0;
1038 #ifdef __amd64
1039 	curthread->t_dtrace_regv = 0;
1040 #endif
1041 
1042 	/*
1043 	 * Treat a child created by a call to vfork(2) as if it were its
1044 	 * parent. We know that there's only one thread of control in such a
1045 	 * process: this one.
1046 	 */
1047 #if defined(sun)
1048 	while (p->p_flag & SVFORK) {
1049 		p = p->p_parent;
1050 	}
1051 
1052 	pid = p->p_pid;
1053 	pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
1054 	mutex_enter(pid_mtx);
1055 #else
1056 	pp = p;
1057 	sx_slock(&proctree_lock);
1058 	while (pp->p_vmspace == pp->p_pptr->p_vmspace)
1059 		pp = pp->p_pptr;
1060 	pid = pp->p_pid;
1061 	sx_sunlock(&proctree_lock);
1062 	pp = NULL;
1063 
1064 	PROC_LOCK(p);
1065 	_PHOLD(p);
1066 #endif
1067 
1068 	bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
1069 
1070 	/*
1071 	 * Lookup the tracepoint that the process just hit.
1072 	 */
1073 	for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
1074 		if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
1075 		    tp->ftt_proc->ftpc_acount != 0)
1076 			break;
1077 	}
1078 
1079 	/*
1080 	 * If we couldn't find a matching tracepoint, either a tracepoint has
1081 	 * been inserted without using the pid<pid> ioctl interface (see
1082 	 * fasttrap_ioctl), or somehow we have mislaid this tracepoint.
1083 	 */
1084 	if (tp == NULL) {
1085 #if defined(sun)
1086 		mutex_exit(pid_mtx);
1087 #else
1088 		_PRELE(p);
1089 		PROC_UNLOCK(p);
1090 #endif
1091 		return (-1);
1092 	}
1093 
1094 	/*
1095 	 * Set the program counter to the address of the traced instruction
1096 	 * so that it looks right in ustack() output.
1097 	 */
1098 	rp->r_rip = pc;
1099 
1100 	if (tp->ftt_ids != NULL) {
1101 		fasttrap_id_t *id;
1102 
1103 #ifdef __amd64
1104 		if (p->p_model == DATAMODEL_LP64) {
1105 			for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1106 				fasttrap_probe_t *probe = id->fti_probe;
1107 
1108 				if (id->fti_ptype == DTFTP_ENTRY) {
1109 					/*
1110 					 * We note that this was an entry
1111 					 * probe to help ustack() find the
1112 					 * first caller.
1113 					 */
1114 					cookie = dtrace_interrupt_disable();
1115 					DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1116 					dtrace_probe(probe->ftp_id, rp->r_rdi,
1117 					    rp->r_rsi, rp->r_rdx, rp->r_rcx,
1118 					    rp->r_r8);
1119 					DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1120 					dtrace_interrupt_enable(cookie);
1121 				} else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1122 					/*
1123 					 * Note that in this case, we don't
1124 					 * call dtrace_probe() since it's only
1125 					 * an artificial probe meant to change
1126 					 * the flow of control so that it
1127 					 * encounters the true probe.
1128 					 */
1129 					is_enabled = 1;
1130 				} else if (probe->ftp_argmap == NULL) {
1131 					dtrace_probe(probe->ftp_id, rp->r_rdi,
1132 					    rp->r_rsi, rp->r_rdx, rp->r_rcx,
1133 					    rp->r_r8);
1134 				} else {
1135 					uintptr_t t[5];
1136 
1137 					fasttrap_usdt_args64(probe, rp,
1138 					    sizeof (t) / sizeof (t[0]), t);
1139 
1140 					dtrace_probe(probe->ftp_id, t[0], t[1],
1141 					    t[2], t[3], t[4]);
1142 				}
1143 			}
1144 		} else {
1145 #else /* __amd64 */
1146 			uintptr_t s0, s1, s2, s3, s4, s5;
1147 			uint32_t *stack = (uint32_t *)rp->r_esp;
1148 
1149 			/*
1150 			 * In 32-bit mode, all arguments are passed on the
1151 			 * stack. If this is a function entry probe, we need
1152 			 * to skip the first entry on the stack as it
1153 			 * represents the return address rather than a
1154 			 * parameter to the function.
1155 			 */
1156 			s0 = fasttrap_fuword32_noerr(&stack[0]);
1157 			s1 = fasttrap_fuword32_noerr(&stack[1]);
1158 			s2 = fasttrap_fuword32_noerr(&stack[2]);
1159 			s3 = fasttrap_fuword32_noerr(&stack[3]);
1160 			s4 = fasttrap_fuword32_noerr(&stack[4]);
1161 			s5 = fasttrap_fuword32_noerr(&stack[5]);
1162 
1163 			for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1164 				fasttrap_probe_t *probe = id->fti_probe;
1165 
1166 				if (id->fti_ptype == DTFTP_ENTRY) {
1167 					/*
1168 					 * We note that this was an entry
1169 					 * probe to help ustack() find the
1170 					 * first caller.
1171 					 */
1172 					cookie = dtrace_interrupt_disable();
1173 					DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1174 					dtrace_probe(probe->ftp_id, s1, s2,
1175 					    s3, s4, s5);
1176 					DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1177 					dtrace_interrupt_enable(cookie);
1178 				} else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1179 					/*
1180 					 * Note that in this case, we don't
1181 					 * call dtrace_probe() since it's only
1182 					 * an artificial probe meant to change
1183 					 * the flow of control so that it
1184 					 * encounters the true probe.
1185 					 */
1186 					is_enabled = 1;
1187 				} else if (probe->ftp_argmap == NULL) {
1188 					dtrace_probe(probe->ftp_id, s0, s1,
1189 					    s2, s3, s4);
1190 				} else {
1191 					uint32_t t[5];
1192 
1193 					fasttrap_usdt_args32(probe, rp,
1194 					    sizeof (t) / sizeof (t[0]), t);
1195 
1196 					dtrace_probe(probe->ftp_id, t[0], t[1],
1197 					    t[2], t[3], t[4]);
1198 				}
1199 			}
1200 #endif /* __amd64 */
1201 #ifdef __amd64
1202 		}
1203 #endif
1204 	}
1205 
1206 	/*
1207 	 * We're about to do a bunch of work so we cache a local copy of
1208 	 * the tracepoint to emulate the instruction, and then find the
1209 	 * tracepoint again later if we need to light up any return probes.
1210 	 */
1211 	tp_local = *tp;
1212 #if defined(sun)
1213 	mutex_exit(pid_mtx);
1214 #else
1215 	PROC_UNLOCK(p);
1216 #endif
1217 	tp = &tp_local;
1218 
1219 	/*
1220 	 * Set the program counter to appear as though the traced instruction
1221 	 * had completely executed. This ensures that fasttrap_getreg() will
1222 	 * report the expected value for REG_RIP.
1223 	 */
1224 	rp->r_rip = pc + tp->ftt_size;
1225 
1226 	/*
1227 	 * If there's an is-enabled probe connected to this tracepoint it
1228 	 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax'
1229 	 * instruction that was placed there by DTrace when the binary was
1230 	 * linked. As this probe is, in fact, enabled, we need to stuff 1
1231 	 * into %eax or %rax. Accordingly, we can bypass all the instruction
1232 	 * emulation logic since we know the inevitable result. It's possible
1233 	 * that a user could construct a scenario where the 'is-enabled'
1234 	 * probe was on some other instruction, but that would be a rather
1235 	 * exotic way to shoot oneself in the foot.
1236 	 */
1237 	if (is_enabled) {
1238 		rp->r_rax = 1;
1239 		new_pc = rp->r_rip;
1240 		goto done;
1241 	}
1242 
1243 	/*
1244 	 * We emulate certain types of instructions to ensure correctness
1245 	 * (in the case of position dependent instructions) or optimize
1246 	 * common cases. The rest we have the thread execute back in user-
1247 	 * land.
1248 	 */
1249 	switch (tp->ftt_type) {
1250 	case FASTTRAP_T_RET:
1251 	case FASTTRAP_T_RET16:
1252 	{
1253 		uintptr_t dst = 0;
1254 		uintptr_t addr = 0;
1255 		int ret = 0;
1256 
1257 		/*
1258 		 * We have to emulate _every_ facet of the behavior of a ret
1259 		 * instruction including what happens if the load from %esp
1260 		 * fails; in that case, we send a SIGSEGV.
1261 		 */
1262 #ifdef __amd64
1263 		if (p->p_model == DATAMODEL_NATIVE) {
1264 			ret = dst = fasttrap_fulword((void *)rp->r_rsp);
1265 			addr = rp->r_rsp + sizeof (uintptr_t);
1266 		} else {
1267 #endif
1268 #ifdef __i386__
1269 			uint32_t dst32;
1270 			ret = dst32 = fasttrap_fuword32((void *)rp->r_esp);
1271 			dst = dst32;
1272 			addr = rp->r_esp + sizeof (uint32_t);
1273 #endif
1274 #ifdef __amd64
1275 		}
1276 #endif
1277 
1278 		if (ret == -1) {
1279 			fasttrap_sigsegv(p, curthread, rp->r_rsp);
1280 			new_pc = pc;
1281 			break;
1282 		}
1283 
1284 		if (tp->ftt_type == FASTTRAP_T_RET16)
1285 			addr += tp->ftt_dest;
1286 
1287 		rp->r_rsp = addr;
1288 		new_pc = dst;
1289 		break;
1290 	}
1291 
1292 	case FASTTRAP_T_JCC:
1293 	{
1294 		uint_t taken = 0;
1295 
1296 		switch (tp->ftt_code) {
1297 		case FASTTRAP_JO:
1298 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) != 0;
1299 			break;
1300 		case FASTTRAP_JNO:
1301 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0;
1302 			break;
1303 		case FASTTRAP_JB:
1304 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0;
1305 			break;
1306 		case FASTTRAP_JAE:
1307 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0;
1308 			break;
1309 		case FASTTRAP_JE:
1310 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0;
1311 			break;
1312 		case FASTTRAP_JNE:
1313 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0;
1314 			break;
1315 		case FASTTRAP_JBE:
1316 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0 ||
1317 			    (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0;
1318 			break;
1319 		case FASTTRAP_JA:
1320 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0 &&
1321 			    (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0;
1322 			break;
1323 		case FASTTRAP_JS:
1324 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) != 0;
1325 			break;
1326 		case FASTTRAP_JNS:
1327 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0;
1328 			break;
1329 		case FASTTRAP_JP:
1330 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) != 0;
1331 			break;
1332 		case FASTTRAP_JNP:
1333 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) == 0;
1334 			break;
1335 		case FASTTRAP_JL:
1336 			taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1337 			    ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1338 			break;
1339 		case FASTTRAP_JGE:
1340 			taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1341 			    ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1342 			break;
1343 		case FASTTRAP_JLE:
1344 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 ||
1345 			    ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1346 			    ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1347 			break;
1348 		case FASTTRAP_JG:
1349 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1350 			    ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1351 			    ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1352 			break;
1353 
1354 		}
1355 
1356 		if (taken)
1357 			new_pc = tp->ftt_dest;
1358 		else
1359 			new_pc = pc + tp->ftt_size;
1360 		break;
1361 	}
1362 
1363 	case FASTTRAP_T_LOOP:
1364 	{
1365 		uint_t taken = 0;
1366 #ifdef __amd64
1367 		greg_t cx = rp->r_rcx--;
1368 #else
1369 		greg_t cx = rp->r_ecx--;
1370 #endif
1371 
1372 		switch (tp->ftt_code) {
1373 		case FASTTRAP_LOOPNZ:
1374 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1375 			    cx != 0;
1376 			break;
1377 		case FASTTRAP_LOOPZ:
1378 			taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 &&
1379 			    cx != 0;
1380 			break;
1381 		case FASTTRAP_LOOP:
1382 			taken = (cx != 0);
1383 			break;
1384 		}
1385 
1386 		if (taken)
1387 			new_pc = tp->ftt_dest;
1388 		else
1389 			new_pc = pc + tp->ftt_size;
1390 		break;
1391 	}
1392 
1393 	case FASTTRAP_T_JCXZ:
1394 	{
1395 #ifdef __amd64
1396 		greg_t cx = rp->r_rcx;
1397 #else
1398 		greg_t cx = rp->r_ecx;
1399 #endif
1400 
1401 		if (cx == 0)
1402 			new_pc = tp->ftt_dest;
1403 		else
1404 			new_pc = pc + tp->ftt_size;
1405 		break;
1406 	}
1407 
1408 	case FASTTRAP_T_PUSHL_EBP:
1409 	{
1410 		int ret = 0;
1411 
1412 #ifdef __amd64
1413 		if (p->p_model == DATAMODEL_NATIVE) {
1414 			rp->r_rsp -= sizeof (uintptr_t);
1415 			ret = fasttrap_sulword((void *)rp->r_rsp, rp->r_rbp);
1416 		} else {
1417 #endif
1418 #ifdef __i386__
1419 			rp->r_rsp -= sizeof (uint32_t);
1420 			ret = fasttrap_suword32((void *)rp->r_rsp, rp->r_rbp);
1421 #endif
1422 #ifdef __amd64
1423 		}
1424 #endif
1425 
1426 		if (ret == -1) {
1427 			fasttrap_sigsegv(p, curthread, rp->r_rsp);
1428 			new_pc = pc;
1429 			break;
1430 		}
1431 
1432 		new_pc = pc + tp->ftt_size;
1433 		break;
1434 	}
1435 
1436 	case FASTTRAP_T_NOP:
1437 		new_pc = pc + tp->ftt_size;
1438 		break;
1439 
1440 	case FASTTRAP_T_JMP:
1441 	case FASTTRAP_T_CALL:
1442 		if (tp->ftt_code == 0) {
1443 			new_pc = tp->ftt_dest;
1444 		} else {
1445 #ifdef __amd64
1446 			uintptr_t value;
1447 #endif
1448 			uintptr_t addr = tp->ftt_dest;
1449 
1450 			if (tp->ftt_base != FASTTRAP_NOREG)
1451 				addr += fasttrap_getreg(rp, tp->ftt_base);
1452 			if (tp->ftt_index != FASTTRAP_NOREG)
1453 				addr += fasttrap_getreg(rp, tp->ftt_index) <<
1454 				    tp->ftt_scale;
1455 
1456 			if (tp->ftt_code == 1) {
1457 				/*
1458 				 * If there's a segment prefix for this
1459 				 * instruction, we'll need to check permissions
1460 				 * and bounds on the given selector, and adjust
1461 				 * the address accordingly.
1462 				 */
1463 				if (tp->ftt_segment != FASTTRAP_SEG_NONE &&
1464 				    fasttrap_do_seg(tp, rp, &addr) != 0) {
1465 					fasttrap_sigsegv(p, curthread, addr);
1466 					new_pc = pc;
1467 					break;
1468 				}
1469 
1470 #ifdef __amd64
1471 				if (p->p_model == DATAMODEL_NATIVE) {
1472 					if ((value = fasttrap_fulword((void *)addr))
1473 					     == -1) {
1474 						fasttrap_sigsegv(p, curthread,
1475 						    addr);
1476 						new_pc = pc;
1477 						break;
1478 					}
1479 					new_pc = value;
1480 				} else {
1481 #endif
1482 #ifdef __i386__
1483 					uint32_t value32;
1484 					addr = (uintptr_t)(uint32_t)addr;
1485 					if ((value32 = fasttrap_fuword32((void *)addr))
1486 					    == -1) {
1487 						fasttrap_sigsegv(p, curthread,
1488 						    addr);
1489 						new_pc = pc;
1490 						break;
1491 					}
1492 					new_pc = value32;
1493 #endif
1494 				}
1495 #ifdef __amd64
1496 			} else {
1497 				new_pc = addr;
1498 			}
1499 #endif
1500 		}
1501 
1502 		/*
1503 		 * If this is a call instruction, we need to push the return
1504 		 * address onto the stack. If this fails, we send the process
1505 		 * a SIGSEGV and reset the pc to emulate what would happen if
1506 		 * this instruction weren't traced.
1507 		 */
1508 		if (tp->ftt_type == FASTTRAP_T_CALL) {
1509 			int ret = 0;
1510 			uintptr_t addr = 0, pcps;
1511 #ifdef __amd64
1512 			if (p->p_model == DATAMODEL_NATIVE) {
1513 				addr = rp->r_rsp - sizeof (uintptr_t);
1514 				pcps = pc + tp->ftt_size;
1515 				ret = fasttrap_sulword((void *)addr, pcps);
1516 			} else {
1517 #endif
1518 #ifdef __i386__
1519 				addr = rp->r_rsp - sizeof (uint32_t);
1520 				pcps = (uint32_t)(pc + tp->ftt_size);
1521 				ret = fasttrap_suword32((void *)addr, pcps);
1522 #endif
1523 #ifdef __amd64
1524 			}
1525 #endif
1526 
1527 			if (ret == -1) {
1528 				fasttrap_sigsegv(p, curthread, addr);
1529 				new_pc = pc;
1530 				break;
1531 			}
1532 
1533 			rp->r_rsp = addr;
1534 		}
1535 
1536 		break;
1537 
1538 	case FASTTRAP_T_COMMON:
1539 	{
1540 		uintptr_t addr;
1541 #if defined(__amd64)
1542 		uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22];
1543 #else
1544 		uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7];
1545 #endif
1546 		uint_t i = 0;
1547 #if defined(sun)
1548 		klwp_t *lwp = ttolwp(curthread);
1549 #endif
1550 
1551 		/*
1552 		 * Compute the address of the ulwp_t and step over the
1553 		 * ul_self pointer. The method used to store the user-land
1554 		 * thread pointer is very different on 32- and 64-bit
1555 		 * kernels.
1556 		 */
1557 #if defined(sun)
1558 #if defined(__amd64)
1559 		if (p->p_model == DATAMODEL_LP64) {
1560 			addr = lwp->lwp_pcb.pcb_fsbase;
1561 			addr += sizeof (void *);
1562 		} else {
1563 			addr = lwp->lwp_pcb.pcb_gsbase;
1564 			addr += sizeof (caddr32_t);
1565 		}
1566 #else
1567 		addr = USD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc);
1568 		addr += sizeof (void *);
1569 #endif
1570 #endif /* sun */
1571 #ifdef __i386__
1572 		addr = USD_GETBASE(&curthread->td_pcb->pcb_gsd);
1573 #else
1574 		addr = curthread->td_pcb->pcb_gsbase;
1575 #endif
1576 		addr += sizeof (void *);
1577 
1578 		/*
1579 		 * Generic Instruction Tracing
1580 		 * ---------------------------
1581 		 *
1582 		 * This is the layout of the scratch space in the user-land
1583 		 * thread structure for our generated instructions.
1584 		 *
1585 		 *	32-bit mode			bytes
1586 		 *	------------------------	-----
1587 		 * a:	<original instruction>		<= 15
1588 		 *	jmp	<pc + tp->ftt_size>	    5
1589 		 * b:	<original instruction>		<= 15
1590 		 *	int	T_DTRACE_RET		    2
1591 		 *					-----
1592 		 *					<= 37
1593 		 *
1594 		 *	64-bit mode			bytes
1595 		 *	------------------------	-----
1596 		 * a:	<original instruction>		<= 15
1597 		 *	jmp	0(%rip)			    6
1598 		 *	<pc + tp->ftt_size>		    8
1599 		 * b:	<original instruction>		<= 15
1600 		 * 	int	T_DTRACE_RET		    2
1601 		 * 					-----
1602 		 * 					<= 46
1603 		 *
1604 		 * The %pc is set to a, and curthread->t_dtrace_astpc is set
1605 		 * to b. If we encounter a signal on the way out of the
1606 		 * kernel, trap() will set %pc to curthread->t_dtrace_astpc
1607 		 * so that we execute the original instruction and re-enter
1608 		 * the kernel rather than redirecting to the next instruction.
1609 		 *
1610 		 * If there are return probes (so we know that we're going to
1611 		 * need to reenter the kernel after executing the original
1612 		 * instruction), the scratch space will just contain the
1613 		 * original instruction followed by an interrupt -- the same
1614 		 * data as at b.
1615 		 *
1616 		 * %rip-relative Addressing
1617 		 * ------------------------
1618 		 *
1619 		 * There's a further complication in 64-bit mode due to %rip-
1620 		 * relative addressing. While this is clearly a beneficial
1621 		 * architectural decision for position independent code, it's
1622 		 * hard not to see it as a personal attack against the pid
1623 		 * provider since before there was a relatively small set of
1624 		 * instructions to emulate; with %rip-relative addressing,
1625 		 * almost every instruction can potentially depend on the
1626 		 * address at which it's executed. Rather than emulating
1627 		 * the broad spectrum of instructions that can now be
1628 		 * position dependent, we emulate jumps and others as in
1629 		 * 32-bit mode, and take a different tack for instructions
1630 		 * using %rip-relative addressing.
1631 		 *
1632 		 * For every instruction that uses the ModRM byte, the
1633 		 * in-kernel disassembler reports its location. We use the
1634 		 * ModRM byte to identify that an instruction uses
1635 		 * %rip-relative addressing and to see what other registers
1636 		 * the instruction uses. To emulate those instructions,
1637 		 * we modify the instruction to be %rax-relative rather than
1638 		 * %rip-relative (or %rcx-relative if the instruction uses
1639 		 * %rax; or %r8- or %r9-relative if the REX.B is present so
1640 		 * we don't have to rewrite the REX prefix). We then load
1641 		 * the value that %rip would have been into the scratch
1642 		 * register and generate an instruction to reset the scratch
1643 		 * register back to its original value. The instruction
1644 		 * sequence looks like this:
1645 		 *
1646 		 *	64-mode %rip-relative		bytes
1647 		 *	------------------------	-----
1648 		 * a:	<modified instruction>		<= 15
1649 		 *	movq	$<value>, %<scratch>	    6
1650 		 *	jmp	0(%rip)			    6
1651 		 *	<pc + tp->ftt_size>		    8
1652 		 * b:	<modified instruction>  	<= 15
1653 		 * 	int	T_DTRACE_RET		    2
1654 		 * 					-----
1655 		 *					   52
1656 		 *
1657 		 * We set curthread->t_dtrace_regv so that upon receiving
1658 		 * a signal we can reset the value of the scratch register.
1659 		 */
1660 
1661 		ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE);
1662 
1663 		curthread->t_dtrace_scrpc = addr;
1664 		bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1665 		i += tp->ftt_size;
1666 
1667 #ifdef __amd64
1668 		if (tp->ftt_ripmode != 0) {
1669 			greg_t *reg = NULL;
1670 
1671 			ASSERT(p->p_model == DATAMODEL_LP64);
1672 			ASSERT(tp->ftt_ripmode &
1673 			    (FASTTRAP_RIP_1 | FASTTRAP_RIP_2));
1674 
1675 			/*
1676 			 * If this was a %rip-relative instruction, we change
1677 			 * it to be either a %rax- or %rcx-relative
1678 			 * instruction (depending on whether those registers
1679 			 * are used as another operand; or %r8- or %r9-
1680 			 * relative depending on the value of REX.B). We then
1681 			 * set that register and generate a movq instruction
1682 			 * to reset the value.
1683 			 */
1684 			if (tp->ftt_ripmode & FASTTRAP_RIP_X)
1685 				scratch[i++] = FASTTRAP_REX(1, 0, 0, 1);
1686 			else
1687 				scratch[i++] = FASTTRAP_REX(1, 0, 0, 0);
1688 
1689 			if (tp->ftt_ripmode & FASTTRAP_RIP_1)
1690 				scratch[i++] = FASTTRAP_MOV_EAX;
1691 			else
1692 				scratch[i++] = FASTTRAP_MOV_ECX;
1693 
1694 			switch (tp->ftt_ripmode) {
1695 			case FASTTRAP_RIP_1:
1696 				reg = &rp->r_rax;
1697 				curthread->t_dtrace_reg = REG_RAX;
1698 				break;
1699 			case FASTTRAP_RIP_2:
1700 				reg = &rp->r_rcx;
1701 				curthread->t_dtrace_reg = REG_RCX;
1702 				break;
1703 			case FASTTRAP_RIP_1 | FASTTRAP_RIP_X:
1704 				reg = &rp->r_r8;
1705 				curthread->t_dtrace_reg = REG_R8;
1706 				break;
1707 			case FASTTRAP_RIP_2 | FASTTRAP_RIP_X:
1708 				reg = &rp->r_r9;
1709 				curthread->t_dtrace_reg = REG_R9;
1710 				break;
1711 			}
1712 
1713 			/* LINTED - alignment */
1714 			*(uint64_t *)&scratch[i] = *reg;
1715 			curthread->t_dtrace_regv = *reg;
1716 			*reg = pc + tp->ftt_size;
1717 			i += sizeof (uint64_t);
1718 		}
1719 #endif
1720 
1721 		/*
1722 		 * Generate the branch instruction to what would have
1723 		 * normally been the subsequent instruction. In 32-bit mode,
1724 		 * this is just a relative branch; in 64-bit mode this is a
1725 		 * %rip-relative branch that loads the 64-bit pc value
1726 		 * immediately after the jmp instruction.
1727 		 */
1728 #ifdef __amd64
1729 		if (p->p_model == DATAMODEL_LP64) {
1730 			scratch[i++] = FASTTRAP_GROUP5_OP;
1731 			scratch[i++] = FASTTRAP_MODRM(0, 4, 5);
1732 			/* LINTED - alignment */
1733 			*(uint32_t *)&scratch[i] = 0;
1734 			i += sizeof (uint32_t);
1735 			/* LINTED - alignment */
1736 			*(uint64_t *)&scratch[i] = pc + tp->ftt_size;
1737 			i += sizeof (uint64_t);
1738 		} else {
1739 #endif
1740 #ifdef __i386__
1741 			/*
1742 			 * Set up the jmp to the next instruction; note that
1743 			 * the size of the traced instruction cancels out.
1744 			 */
1745 			scratch[i++] = FASTTRAP_JMP32;
1746 			/* LINTED - alignment */
1747 			*(uint32_t *)&scratch[i] = pc - addr - 5;
1748 			i += sizeof (uint32_t);
1749 #endif
1750 #ifdef __amd64
1751 		}
1752 #endif
1753 
1754 		curthread->t_dtrace_astpc = addr + i;
1755 		bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1756 		i += tp->ftt_size;
1757 		scratch[i++] = FASTTRAP_INT;
1758 		scratch[i++] = T_DTRACE_RET;
1759 
1760 		ASSERT(i <= sizeof (scratch));
1761 
1762 #if defined(sun)
1763 		if (fasttrap_copyout(scratch, (char *)addr, i)) {
1764 #else
1765 		if (uwrite(p, scratch, i, addr)) {
1766 #endif
1767 			fasttrap_sigtrap(p, curthread, pc);
1768 			new_pc = pc;
1769 			break;
1770 		}
1771 		if (tp->ftt_retids != NULL) {
1772 			curthread->t_dtrace_step = 1;
1773 			curthread->t_dtrace_ret = 1;
1774 			new_pc = curthread->t_dtrace_astpc;
1775 		} else {
1776 			new_pc = curthread->t_dtrace_scrpc;
1777 		}
1778 
1779 		curthread->t_dtrace_pc = pc;
1780 		curthread->t_dtrace_npc = pc + tp->ftt_size;
1781 		curthread->t_dtrace_on = 1;
1782 		break;
1783 	}
1784 
1785 	default:
1786 		panic("fasttrap: mishandled an instruction");
1787 	}
1788 
1789 done:
1790 	/*
1791 	 * If there were no return probes when we first found the tracepoint,
1792 	 * we should feel no obligation to honor any return probes that were
1793 	 * subsequently enabled -- they'll just have to wait until the next
1794 	 * time around.
1795 	 */
1796 	if (tp->ftt_retids != NULL) {
1797 		/*
1798 		 * We need to wait until the results of the instruction are
1799 		 * apparent before invoking any return probes. If this
1800 		 * instruction was emulated we can just call
1801 		 * fasttrap_return_common(); if it needs to be executed, we
1802 		 * need to wait until the user thread returns to the kernel.
1803 		 */
1804 		if (tp->ftt_type != FASTTRAP_T_COMMON) {
1805 			/*
1806 			 * Set the program counter to the address of the traced
1807 			 * instruction so that it looks right in ustack()
1808 			 * output. We had previously set it to the end of the
1809 			 * instruction to simplify %rip-relative addressing.
1810 			 */
1811 			rp->r_rip = pc;
1812 
1813 			fasttrap_return_common(rp, pc, pid, new_pc);
1814 		} else {
1815 			ASSERT(curthread->t_dtrace_ret != 0);
1816 			ASSERT(curthread->t_dtrace_pc == pc);
1817 			ASSERT(curthread->t_dtrace_scrpc != 0);
1818 			ASSERT(new_pc == curthread->t_dtrace_astpc);
1819 		}
1820 	}
1821 
1822 	rp->r_rip = new_pc;
1823 
1824 #if !defined(sun)
1825 	PROC_LOCK(p);
1826 	proc_write_regs(curthread, rp);
1827 	_PRELE(p);
1828 	PROC_UNLOCK(p);
1829 #endif
1830 
1831 	return (0);
1832 }
1833 
1834 int
1835 fasttrap_return_probe(struct reg *rp)
1836 {
1837 	proc_t *p = curproc;
1838 	uintptr_t pc = curthread->t_dtrace_pc;
1839 	uintptr_t npc = curthread->t_dtrace_npc;
1840 
1841 	curthread->t_dtrace_pc = 0;
1842 	curthread->t_dtrace_npc = 0;
1843 	curthread->t_dtrace_scrpc = 0;
1844 	curthread->t_dtrace_astpc = 0;
1845 
1846 #if defined(sun)
1847 	/*
1848 	 * Treat a child created by a call to vfork(2) as if it were its
1849 	 * parent. We know that there's only one thread of control in such a
1850 	 * process: this one.
1851 	 */
1852 	while (p->p_flag & SVFORK) {
1853 		p = p->p_parent;
1854 	}
1855 #endif
1856 
1857 	/*
1858 	 * We set rp->r_rip to the address of the traced instruction so
1859 	 * that it appears to dtrace_probe() that we're on the original
1860 	 * instruction, and so that the user can't easily detect our
1861 	 * complex web of lies. dtrace_return_probe() (our caller)
1862 	 * will correctly set %pc after we return.
1863 	 */
1864 	rp->r_rip = pc;
1865 
1866 	fasttrap_return_common(rp, pc, p->p_pid, npc);
1867 
1868 	return (0);
1869 }
1870 
1871 /*ARGSUSED*/
1872 uint64_t
1873 fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
1874     int aframes)
1875 {
1876 	struct reg r;
1877 
1878 	fill_regs(curthread, &r);
1879 
1880 	return (fasttrap_anarg(&r, 1, argno));
1881 }
1882 
1883 /*ARGSUSED*/
1884 uint64_t
1885 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
1886     int aframes)
1887 {
1888 	struct reg r;
1889 
1890 	fill_regs(curthread, &r);
1891 
1892 	return (fasttrap_anarg(&r, 0, argno));
1893 }
1894 
1895 static ulong_t
1896 fasttrap_getreg(struct reg *rp, uint_t reg)
1897 {
1898 #ifdef __amd64
1899 	switch (reg) {
1900 	case REG_R15:		return (rp->r_r15);
1901 	case REG_R14:		return (rp->r_r14);
1902 	case REG_R13:		return (rp->r_r13);
1903 	case REG_R12:		return (rp->r_r12);
1904 	case REG_R11:		return (rp->r_r11);
1905 	case REG_R10:		return (rp->r_r10);
1906 	case REG_R9:		return (rp->r_r9);
1907 	case REG_R8:		return (rp->r_r8);
1908 	case REG_RDI:		return (rp->r_rdi);
1909 	case REG_RSI:		return (rp->r_rsi);
1910 	case REG_RBP:		return (rp->r_rbp);
1911 	case REG_RBX:		return (rp->r_rbx);
1912 	case REG_RDX:		return (rp->r_rdx);
1913 	case REG_RCX:		return (rp->r_rcx);
1914 	case REG_RAX:		return (rp->r_rax);
1915 	case REG_TRAPNO:	return (rp->r_trapno);
1916 	case REG_ERR:		return (rp->r_err);
1917 	case REG_RIP:		return (rp->r_rip);
1918 	case REG_CS:		return (rp->r_cs);
1919 #if defined(sun)
1920 	case REG_RFL:		return (rp->r_rfl);
1921 #endif
1922 	case REG_RSP:		return (rp->r_rsp);
1923 	case REG_SS:		return (rp->r_ss);
1924 	case REG_FS:		return (rp->r_fs);
1925 	case REG_GS:		return (rp->r_gs);
1926 	case REG_DS:		return (rp->r_ds);
1927 	case REG_ES:		return (rp->r_es);
1928 	case REG_FSBASE:	return (rdmsr(MSR_FSBASE));
1929 	case REG_GSBASE:	return (rdmsr(MSR_GSBASE));
1930 	}
1931 
1932 	panic("dtrace: illegal register constant");
1933 	/*NOTREACHED*/
1934 #else
1935 #define _NGREG 19
1936 	if (reg >= _NGREG)
1937 		panic("dtrace: illegal register constant");
1938 
1939 	return (((greg_t *)&rp->r_gs)[reg]);
1940 #endif
1941 }
1942