1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 * 21 * Portions Copyright 2010 The FreeBSD Foundation 22 * 23 * $FreeBSD$ 24 */ 25 26 /* 27 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 28 * Use is subject to license terms. 29 */ 30 31 #ifdef illumos 32 #pragma ident "%Z%%M% %I% %E% SMI" 33 #endif 34 35 #include <sys/fasttrap_isa.h> 36 #include <sys/fasttrap_impl.h> 37 #include <sys/dtrace.h> 38 #include <sys/dtrace_impl.h> 39 #include <sys/cmn_err.h> 40 #ifdef illumos 41 #include <sys/regset.h> 42 #include <sys/privregs.h> 43 #include <sys/segments.h> 44 #include <sys/x86_archext.h> 45 #else 46 #include <sys/types.h> 47 #include <sys/dtrace_bsd.h> 48 #include <sys/proc.h> 49 #include <sys/rmlock.h> 50 #include <cddl/dev/dtrace/dtrace_cddl.h> 51 #include <cddl/dev/dtrace/x86/regset.h> 52 #include <machine/segments.h> 53 #include <machine/reg.h> 54 #include <machine/pcb.h> 55 #endif 56 #include <sys/sysmacros.h> 57 #ifdef illumos 58 #include <sys/trap.h> 59 #include <sys/archsystm.h> 60 #else 61 #include <sys/ptrace.h> 62 63 static int 64 uread(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr) 65 { 66 ssize_t n; 67 68 PHOLD(p); 69 n = proc_readmem(curthread, p, uaddr, kaddr, len); 70 PRELE(p); 71 if (n != len) 72 return (ENOMEM); 73 return (0); 74 } 75 76 static int 77 uwrite(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr) 78 { 79 ssize_t n; 80 81 PHOLD(p); 82 n = proc_writemem(curthread, p, uaddr, kaddr, len); 83 PRELE(p); 84 if (n != len) 85 return (ENOMEM); 86 return (0); 87 } 88 89 #endif /* illumos */ 90 #ifdef __i386__ 91 #define r_rax r_eax 92 #define r_rbx r_ebx 93 #define r_rip r_eip 94 #define r_rflags r_eflags 95 #define r_rsp r_esp 96 #define r_rbp r_ebp 97 #endif 98 99 /* 100 * Lossless User-Land Tracing on x86 101 * --------------------------------- 102 * 103 * The execution of most instructions is not dependent on the address; for 104 * these instructions it is sufficient to copy them into the user process's 105 * address space and execute them. To effectively single-step an instruction 106 * in user-land, we copy out the following sequence of instructions to scratch 107 * space in the user thread's ulwp_t structure. 108 * 109 * We then set the program counter (%eip or %rip) to point to this scratch 110 * space. Once execution resumes, the original instruction is executed and 111 * then control flow is redirected to what was originally the subsequent 112 * instruction. If the kernel attemps to deliver a signal while single- 113 * stepping, the signal is deferred and the program counter is moved into the 114 * second sequence of instructions. The second sequence ends in a trap into 115 * the kernel where the deferred signal is then properly handled and delivered. 116 * 117 * For instructions whose execute is position dependent, we perform simple 118 * emulation. These instructions are limited to control transfer 119 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle 120 * of %rip-relative addressing that means that almost any instruction can be 121 * position dependent. For all the details on how we emulate generic 122 * instructions included %rip-relative instructions, see the code in 123 * fasttrap_pid_probe() below where we handle instructions of type 124 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing). 125 */ 126 127 #define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3) 128 #define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7) 129 #define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7) 130 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm)) 131 132 #define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3) 133 #define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7) 134 #define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7) 135 136 #define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1) 137 #define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1) 138 #define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1) 139 #define FASTTRAP_REX_B(rex) ((rex) & 1) 140 #define FASTTRAP_REX(w, r, x, b) \ 141 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b)) 142 143 /* 144 * Single-byte op-codes. 145 */ 146 #define FASTTRAP_PUSHL_EBP 0x55 147 148 #define FASTTRAP_JO 0x70 149 #define FASTTRAP_JNO 0x71 150 #define FASTTRAP_JB 0x72 151 #define FASTTRAP_JAE 0x73 152 #define FASTTRAP_JE 0x74 153 #define FASTTRAP_JNE 0x75 154 #define FASTTRAP_JBE 0x76 155 #define FASTTRAP_JA 0x77 156 #define FASTTRAP_JS 0x78 157 #define FASTTRAP_JNS 0x79 158 #define FASTTRAP_JP 0x7a 159 #define FASTTRAP_JNP 0x7b 160 #define FASTTRAP_JL 0x7c 161 #define FASTTRAP_JGE 0x7d 162 #define FASTTRAP_JLE 0x7e 163 #define FASTTRAP_JG 0x7f 164 165 #define FASTTRAP_NOP 0x90 166 167 #define FASTTRAP_MOV_EAX 0xb8 168 #define FASTTRAP_MOV_ECX 0xb9 169 170 #define FASTTRAP_RET16 0xc2 171 #define FASTTRAP_RET 0xc3 172 173 #define FASTTRAP_LOOPNZ 0xe0 174 #define FASTTRAP_LOOPZ 0xe1 175 #define FASTTRAP_LOOP 0xe2 176 #define FASTTRAP_JCXZ 0xe3 177 178 #define FASTTRAP_CALL 0xe8 179 #define FASTTRAP_JMP32 0xe9 180 #define FASTTRAP_JMP8 0xeb 181 182 #define FASTTRAP_INT3 0xcc 183 #define FASTTRAP_INT 0xcd 184 185 #define FASTTRAP_2_BYTE_OP 0x0f 186 #define FASTTRAP_GROUP5_OP 0xff 187 188 /* 189 * Two-byte op-codes (second byte only). 190 */ 191 #define FASTTRAP_0F_JO 0x80 192 #define FASTTRAP_0F_JNO 0x81 193 #define FASTTRAP_0F_JB 0x82 194 #define FASTTRAP_0F_JAE 0x83 195 #define FASTTRAP_0F_JE 0x84 196 #define FASTTRAP_0F_JNE 0x85 197 #define FASTTRAP_0F_JBE 0x86 198 #define FASTTRAP_0F_JA 0x87 199 #define FASTTRAP_0F_JS 0x88 200 #define FASTTRAP_0F_JNS 0x89 201 #define FASTTRAP_0F_JP 0x8a 202 #define FASTTRAP_0F_JNP 0x8b 203 #define FASTTRAP_0F_JL 0x8c 204 #define FASTTRAP_0F_JGE 0x8d 205 #define FASTTRAP_0F_JLE 0x8e 206 #define FASTTRAP_0F_JG 0x8f 207 208 #define FASTTRAP_EFLAGS_OF 0x800 209 #define FASTTRAP_EFLAGS_DF 0x400 210 #define FASTTRAP_EFLAGS_SF 0x080 211 #define FASTTRAP_EFLAGS_ZF 0x040 212 #define FASTTRAP_EFLAGS_AF 0x010 213 #define FASTTRAP_EFLAGS_PF 0x004 214 #define FASTTRAP_EFLAGS_CF 0x001 215 216 /* 217 * Instruction prefixes. 218 */ 219 #define FASTTRAP_PREFIX_OPERAND 0x66 220 #define FASTTRAP_PREFIX_ADDRESS 0x67 221 #define FASTTRAP_PREFIX_CS 0x2E 222 #define FASTTRAP_PREFIX_DS 0x3E 223 #define FASTTRAP_PREFIX_ES 0x26 224 #define FASTTRAP_PREFIX_FS 0x64 225 #define FASTTRAP_PREFIX_GS 0x65 226 #define FASTTRAP_PREFIX_SS 0x36 227 #define FASTTRAP_PREFIX_LOCK 0xF0 228 #define FASTTRAP_PREFIX_REP 0xF3 229 #define FASTTRAP_PREFIX_REPNE 0xF2 230 231 #define FASTTRAP_NOREG 0xff 232 233 /* 234 * Map between instruction register encodings and the kernel constants which 235 * correspond to indicies into struct regs. 236 */ 237 #ifdef __amd64 238 static const uint8_t regmap[16] = { 239 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI, 240 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15, 241 }; 242 #else 243 static const uint8_t regmap[8] = { 244 EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI 245 }; 246 #endif 247 248 static ulong_t fasttrap_getreg(struct reg *, uint_t); 249 250 static uint64_t 251 fasttrap_anarg(struct reg *rp, int function_entry, int argno) 252 { 253 uint64_t value = 0; 254 int shift = function_entry ? 1 : 0; 255 256 #ifdef __amd64 257 if (curproc->p_model == DATAMODEL_LP64) { 258 uintptr_t *stack; 259 260 /* 261 * In 64-bit mode, the first six arguments are stored in 262 * registers. 263 */ 264 if (argno < 6) 265 switch (argno) { 266 case 0: 267 return (rp->r_rdi); 268 case 1: 269 return (rp->r_rsi); 270 case 2: 271 return (rp->r_rdx); 272 case 3: 273 return (rp->r_rcx); 274 case 4: 275 return (rp->r_r8); 276 case 5: 277 return (rp->r_r9); 278 } 279 280 stack = (uintptr_t *)rp->r_rsp; 281 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 282 value = dtrace_fulword(&stack[argno - 6 + shift]); 283 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 284 } else { 285 #endif 286 uint32_t *stack = (uint32_t *)rp->r_rsp; 287 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); 288 value = dtrace_fuword32(&stack[argno + shift]); 289 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); 290 #ifdef __amd64 291 } 292 #endif 293 294 return (value); 295 } 296 297 /*ARGSUSED*/ 298 int 299 fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, 300 fasttrap_probe_type_t type) 301 { 302 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10]; 303 size_t len = FASTTRAP_MAX_INSTR_SIZE; 304 size_t first = MIN(len, PAGESIZE - (pc & PAGEOFFSET)); 305 uint_t start = 0; 306 int rmindex, size; 307 uint8_t seg, rex = 0; 308 309 /* 310 * Read the instruction at the given address out of the process's 311 * address space. We don't have to worry about a debugger 312 * changing this instruction before we overwrite it with our trap 313 * instruction since P_PR_LOCK is set. Since instructions can span 314 * pages, we potentially read the instruction in two parts. If the 315 * second part fails, we just zero out that part of the instruction. 316 */ 317 if (uread(p, &instr[0], first, pc) != 0) 318 return (-1); 319 if (len > first && 320 uread(p, &instr[first], len - first, pc + first) != 0) { 321 bzero(&instr[first], len - first); 322 len = first; 323 } 324 325 /* 326 * If the disassembly fails, then we have a malformed instruction. 327 */ 328 if ((size = dtrace_instr_size_isa(instr, p->p_model, &rmindex)) <= 0) 329 return (-1); 330 331 /* 332 * Make sure the disassembler isn't completely broken. 333 */ 334 ASSERT(-1 <= rmindex && rmindex < size); 335 336 /* 337 * If the computed size is greater than the number of bytes read, 338 * then it was a malformed instruction possibly because it fell on a 339 * page boundary and the subsequent page was missing or because of 340 * some malicious user. 341 */ 342 if (size > len) 343 return (-1); 344 345 tp->ftt_size = (uint8_t)size; 346 tp->ftt_segment = FASTTRAP_SEG_NONE; 347 348 /* 349 * Find the start of the instruction's opcode by processing any 350 * legacy prefixes. 351 */ 352 for (;;) { 353 seg = 0; 354 switch (instr[start]) { 355 case FASTTRAP_PREFIX_SS: 356 seg++; 357 /*FALLTHRU*/ 358 case FASTTRAP_PREFIX_GS: 359 seg++; 360 /*FALLTHRU*/ 361 case FASTTRAP_PREFIX_FS: 362 seg++; 363 /*FALLTHRU*/ 364 case FASTTRAP_PREFIX_ES: 365 seg++; 366 /*FALLTHRU*/ 367 case FASTTRAP_PREFIX_DS: 368 seg++; 369 /*FALLTHRU*/ 370 case FASTTRAP_PREFIX_CS: 371 seg++; 372 /*FALLTHRU*/ 373 case FASTTRAP_PREFIX_OPERAND: 374 case FASTTRAP_PREFIX_ADDRESS: 375 case FASTTRAP_PREFIX_LOCK: 376 case FASTTRAP_PREFIX_REP: 377 case FASTTRAP_PREFIX_REPNE: 378 if (seg != 0) { 379 /* 380 * It's illegal for an instruction to specify 381 * two segment prefixes -- give up on this 382 * illegal instruction. 383 */ 384 if (tp->ftt_segment != FASTTRAP_SEG_NONE) 385 return (-1); 386 387 tp->ftt_segment = seg; 388 } 389 start++; 390 continue; 391 } 392 break; 393 } 394 395 #ifdef __amd64 396 /* 397 * Identify the REX prefix on 64-bit processes. 398 */ 399 if (p->p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40) 400 rex = instr[start++]; 401 #endif 402 403 /* 404 * Now that we're pretty sure that the instruction is okay, copy the 405 * valid part to the tracepoint. 406 */ 407 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE); 408 409 tp->ftt_type = FASTTRAP_T_COMMON; 410 if (instr[start] == FASTTRAP_2_BYTE_OP) { 411 switch (instr[start + 1]) { 412 case FASTTRAP_0F_JO: 413 case FASTTRAP_0F_JNO: 414 case FASTTRAP_0F_JB: 415 case FASTTRAP_0F_JAE: 416 case FASTTRAP_0F_JE: 417 case FASTTRAP_0F_JNE: 418 case FASTTRAP_0F_JBE: 419 case FASTTRAP_0F_JA: 420 case FASTTRAP_0F_JS: 421 case FASTTRAP_0F_JNS: 422 case FASTTRAP_0F_JP: 423 case FASTTRAP_0F_JNP: 424 case FASTTRAP_0F_JL: 425 case FASTTRAP_0F_JGE: 426 case FASTTRAP_0F_JLE: 427 case FASTTRAP_0F_JG: 428 tp->ftt_type = FASTTRAP_T_JCC; 429 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO; 430 tp->ftt_dest = pc + tp->ftt_size + 431 /* LINTED - alignment */ 432 *(int32_t *)&instr[start + 2]; 433 break; 434 } 435 } else if (instr[start] == FASTTRAP_GROUP5_OP) { 436 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]); 437 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]); 438 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]); 439 440 if (reg == 2 || reg == 4) { 441 uint_t i, sz; 442 443 if (reg == 2) 444 tp->ftt_type = FASTTRAP_T_CALL; 445 else 446 tp->ftt_type = FASTTRAP_T_JMP; 447 448 if (mod == 3) 449 tp->ftt_code = 2; 450 else 451 tp->ftt_code = 1; 452 453 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0); 454 455 /* 456 * See AMD x86-64 Architecture Programmer's Manual 457 * Volume 3, Section 1.2.7, Table 1-12, and 458 * Appendix A.3.1, Table A-15. 459 */ 460 if (mod != 3 && rm == 4) { 461 uint8_t sib = instr[start + 2]; 462 uint_t index = FASTTRAP_SIB_INDEX(sib); 463 uint_t base = FASTTRAP_SIB_BASE(sib); 464 465 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib); 466 467 tp->ftt_index = (index == 4) ? 468 FASTTRAP_NOREG : 469 regmap[index | (FASTTRAP_REX_X(rex) << 3)]; 470 tp->ftt_base = (mod == 0 && base == 5) ? 471 FASTTRAP_NOREG : 472 regmap[base | (FASTTRAP_REX_B(rex) << 3)]; 473 474 i = 3; 475 sz = mod == 1 ? 1 : 4; 476 } else { 477 /* 478 * In 64-bit mode, mod == 0 and r/m == 5 479 * denotes %rip-relative addressing; in 32-bit 480 * mode, the base register isn't used. In both 481 * modes, there is a 32-bit operand. 482 */ 483 if (mod == 0 && rm == 5) { 484 #ifdef __amd64 485 if (p->p_model == DATAMODEL_LP64) 486 tp->ftt_base = REG_RIP; 487 else 488 #endif 489 tp->ftt_base = FASTTRAP_NOREG; 490 sz = 4; 491 } else { 492 uint8_t base = rm | 493 (FASTTRAP_REX_B(rex) << 3); 494 495 tp->ftt_base = regmap[base]; 496 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0; 497 } 498 tp->ftt_index = FASTTRAP_NOREG; 499 i = 2; 500 } 501 502 if (sz == 1) { 503 tp->ftt_dest = *(int8_t *)&instr[start + i]; 504 } else if (sz == 4) { 505 /* LINTED - alignment */ 506 tp->ftt_dest = *(int32_t *)&instr[start + i]; 507 } else { 508 tp->ftt_dest = 0; 509 } 510 } 511 } else { 512 switch (instr[start]) { 513 case FASTTRAP_RET: 514 tp->ftt_type = FASTTRAP_T_RET; 515 break; 516 517 case FASTTRAP_RET16: 518 tp->ftt_type = FASTTRAP_T_RET16; 519 /* LINTED - alignment */ 520 tp->ftt_dest = *(uint16_t *)&instr[start + 1]; 521 break; 522 523 case FASTTRAP_JO: 524 case FASTTRAP_JNO: 525 case FASTTRAP_JB: 526 case FASTTRAP_JAE: 527 case FASTTRAP_JE: 528 case FASTTRAP_JNE: 529 case FASTTRAP_JBE: 530 case FASTTRAP_JA: 531 case FASTTRAP_JS: 532 case FASTTRAP_JNS: 533 case FASTTRAP_JP: 534 case FASTTRAP_JNP: 535 case FASTTRAP_JL: 536 case FASTTRAP_JGE: 537 case FASTTRAP_JLE: 538 case FASTTRAP_JG: 539 tp->ftt_type = FASTTRAP_T_JCC; 540 tp->ftt_code = instr[start]; 541 tp->ftt_dest = pc + tp->ftt_size + 542 (int8_t)instr[start + 1]; 543 break; 544 545 case FASTTRAP_LOOPNZ: 546 case FASTTRAP_LOOPZ: 547 case FASTTRAP_LOOP: 548 tp->ftt_type = FASTTRAP_T_LOOP; 549 tp->ftt_code = instr[start]; 550 tp->ftt_dest = pc + tp->ftt_size + 551 (int8_t)instr[start + 1]; 552 break; 553 554 case FASTTRAP_JCXZ: 555 tp->ftt_type = FASTTRAP_T_JCXZ; 556 tp->ftt_dest = pc + tp->ftt_size + 557 (int8_t)instr[start + 1]; 558 break; 559 560 case FASTTRAP_CALL: 561 tp->ftt_type = FASTTRAP_T_CALL; 562 tp->ftt_dest = pc + tp->ftt_size + 563 /* LINTED - alignment */ 564 *(int32_t *)&instr[start + 1]; 565 tp->ftt_code = 0; 566 break; 567 568 case FASTTRAP_JMP32: 569 tp->ftt_type = FASTTRAP_T_JMP; 570 tp->ftt_dest = pc + tp->ftt_size + 571 /* LINTED - alignment */ 572 *(int32_t *)&instr[start + 1]; 573 break; 574 case FASTTRAP_JMP8: 575 tp->ftt_type = FASTTRAP_T_JMP; 576 tp->ftt_dest = pc + tp->ftt_size + 577 (int8_t)instr[start + 1]; 578 break; 579 580 case FASTTRAP_PUSHL_EBP: 581 if (start == 0) 582 tp->ftt_type = FASTTRAP_T_PUSHL_EBP; 583 break; 584 585 case FASTTRAP_NOP: 586 #ifdef __amd64 587 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0); 588 589 /* 590 * On amd64 we have to be careful not to confuse a nop 591 * (actually xchgl %eax, %eax) with an instruction using 592 * the same opcode, but that does something different 593 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax). 594 */ 595 if (FASTTRAP_REX_B(rex) == 0) 596 #endif 597 tp->ftt_type = FASTTRAP_T_NOP; 598 break; 599 600 case FASTTRAP_INT3: 601 /* 602 * The pid provider shares the int3 trap with debugger 603 * breakpoints so we can't instrument them. 604 */ 605 ASSERT(instr[start] == FASTTRAP_INSTR); 606 return (-1); 607 608 case FASTTRAP_INT: 609 /* 610 * Interrupts seem like they could be traced with 611 * no negative implications, but it's possible that 612 * a thread could be redirected by the trap handling 613 * code which would eventually return to the 614 * instruction after the interrupt. If the interrupt 615 * were in our scratch space, the subsequent 616 * instruction might be overwritten before we return. 617 * Accordingly we refuse to instrument any interrupt. 618 */ 619 return (-1); 620 } 621 } 622 623 #ifdef __amd64 624 if (p->p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) { 625 /* 626 * If the process is 64-bit and the instruction type is still 627 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an 628 * execute it -- we need to watch for %rip-relative 629 * addressing mode. See the portion of fasttrap_pid_probe() 630 * below where we handle tracepoints with type 631 * FASTTRAP_T_COMMON for how we emulate instructions that 632 * employ %rip-relative addressing. 633 */ 634 if (rmindex != -1) { 635 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]); 636 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]); 637 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]); 638 639 ASSERT(rmindex > start); 640 641 if (mod == 0 && rm == 5) { 642 /* 643 * We need to be sure to avoid other 644 * registers used by this instruction. While 645 * the reg field may determine the op code 646 * rather than denoting a register, assuming 647 * that it denotes a register is always safe. 648 * We leave the REX field intact and use 649 * whatever value's there for simplicity. 650 */ 651 if (reg != 0) { 652 tp->ftt_ripmode = FASTTRAP_RIP_1 | 653 (FASTTRAP_RIP_X * 654 FASTTRAP_REX_B(rex)); 655 rm = 0; 656 } else { 657 tp->ftt_ripmode = FASTTRAP_RIP_2 | 658 (FASTTRAP_RIP_X * 659 FASTTRAP_REX_B(rex)); 660 rm = 1; 661 } 662 663 tp->ftt_modrm = tp->ftt_instr[rmindex]; 664 tp->ftt_instr[rmindex] = 665 FASTTRAP_MODRM(2, reg, rm); 666 } 667 } 668 } 669 #endif 670 671 return (0); 672 } 673 674 int 675 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp) 676 { 677 fasttrap_instr_t instr = FASTTRAP_INSTR; 678 679 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0) 680 return (-1); 681 682 return (0); 683 } 684 685 int 686 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp) 687 { 688 uint8_t instr; 689 690 /* 691 * Distinguish between read or write failures and a changed 692 * instruction. 693 */ 694 if (uread(p, &instr, 1, tp->ftt_pc) != 0) 695 return (0); 696 if (instr != FASTTRAP_INSTR) 697 return (0); 698 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0) 699 return (-1); 700 701 return (0); 702 } 703 704 #ifdef __amd64 705 static uintptr_t 706 fasttrap_fulword_noerr(const void *uaddr) 707 { 708 uintptr_t ret; 709 710 if ((ret = fasttrap_fulword(uaddr)) != -1) 711 return (ret); 712 713 return (0); 714 } 715 #endif 716 717 static uint32_t 718 fasttrap_fuword32_noerr(const void *uaddr) 719 { 720 uint32_t ret; 721 722 if ((ret = fasttrap_fuword32(uaddr)) != -1) 723 return (ret); 724 725 return (0); 726 } 727 728 static void 729 fasttrap_return_common(struct reg *rp, uintptr_t pc, pid_t pid, 730 uintptr_t new_pc) 731 { 732 fasttrap_tracepoint_t *tp; 733 fasttrap_bucket_t *bucket; 734 fasttrap_id_t *id; 735 #ifdef illumos 736 kmutex_t *pid_mtx; 737 738 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 739 mutex_enter(pid_mtx); 740 #else 741 struct rm_priotracker tracker; 742 743 rm_rlock(&fasttrap_tp_lock, &tracker); 744 #endif 745 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 746 747 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 748 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 749 tp->ftt_proc->ftpc_acount != 0) 750 break; 751 } 752 753 /* 754 * Don't sweat it if we can't find the tracepoint again; unlike 755 * when we're in fasttrap_pid_probe(), finding the tracepoint here 756 * is not essential to the correct execution of the process. 757 */ 758 if (tp == NULL) { 759 #ifdef illumos 760 mutex_exit(pid_mtx); 761 #else 762 rm_runlock(&fasttrap_tp_lock, &tracker); 763 #endif 764 return; 765 } 766 767 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) { 768 /* 769 * If there's a branch that could act as a return site, we 770 * need to trace it, and check here if the program counter is 771 * external to the function. 772 */ 773 if (tp->ftt_type != FASTTRAP_T_RET && 774 tp->ftt_type != FASTTRAP_T_RET16 && 775 new_pc - id->fti_probe->ftp_faddr < 776 id->fti_probe->ftp_fsize) 777 continue; 778 779 dtrace_probe(id->fti_probe->ftp_id, 780 pc - id->fti_probe->ftp_faddr, 781 rp->r_rax, rp->r_rbx, 0, 0); 782 } 783 784 #ifdef illumos 785 mutex_exit(pid_mtx); 786 #else 787 rm_runlock(&fasttrap_tp_lock, &tracker); 788 #endif 789 } 790 791 static void 792 fasttrap_sigsegv(proc_t *p, kthread_t *t, uintptr_t addr) 793 { 794 #ifdef illumos 795 sigqueue_t *sqp = kmem_zalloc(sizeof (sigqueue_t), KM_SLEEP); 796 797 sqp->sq_info.si_signo = SIGSEGV; 798 sqp->sq_info.si_code = SEGV_MAPERR; 799 sqp->sq_info.si_addr = (caddr_t)addr; 800 801 mutex_enter(&p->p_lock); 802 sigaddqa(p, t, sqp); 803 mutex_exit(&p->p_lock); 804 805 if (t != NULL) 806 aston(t); 807 #else 808 ksiginfo_t *ksi = kmem_zalloc(sizeof (ksiginfo_t), KM_SLEEP); 809 810 ksiginfo_init(ksi); 811 ksi->ksi_signo = SIGSEGV; 812 ksi->ksi_code = SEGV_MAPERR; 813 ksi->ksi_addr = (caddr_t)addr; 814 (void) tdksignal(t, SIGSEGV, ksi); 815 #endif 816 } 817 818 #ifdef __amd64 819 static void 820 fasttrap_usdt_args64(fasttrap_probe_t *probe, struct reg *rp, int argc, 821 uintptr_t *argv) 822 { 823 int i, x, cap = MIN(argc, probe->ftp_nargs); 824 uintptr_t *stack = (uintptr_t *)rp->r_rsp; 825 826 for (i = 0; i < cap; i++) { 827 x = probe->ftp_argmap[i]; 828 829 if (x < 6) 830 argv[i] = (&rp->r_rdi)[x]; 831 else 832 argv[i] = fasttrap_fulword_noerr(&stack[x]); 833 } 834 835 for (; i < argc; i++) { 836 argv[i] = 0; 837 } 838 } 839 #endif 840 841 static void 842 fasttrap_usdt_args32(fasttrap_probe_t *probe, struct reg *rp, int argc, 843 uint32_t *argv) 844 { 845 int i, x, cap = MIN(argc, probe->ftp_nargs); 846 uint32_t *stack = (uint32_t *)rp->r_rsp; 847 848 for (i = 0; i < cap; i++) { 849 x = probe->ftp_argmap[i]; 850 851 argv[i] = fasttrap_fuword32_noerr(&stack[x]); 852 } 853 854 for (; i < argc; i++) { 855 argv[i] = 0; 856 } 857 } 858 859 static int 860 fasttrap_do_seg(fasttrap_tracepoint_t *tp, struct reg *rp, uintptr_t *addr) 861 { 862 proc_t *p = curproc; 863 #ifdef __i386__ 864 struct segment_descriptor *desc; 865 #else 866 struct user_segment_descriptor *desc; 867 #endif 868 uint16_t sel = 0, ndx, type; 869 uintptr_t limit; 870 871 switch (tp->ftt_segment) { 872 case FASTTRAP_SEG_CS: 873 sel = rp->r_cs; 874 break; 875 case FASTTRAP_SEG_DS: 876 sel = rp->r_ds; 877 break; 878 case FASTTRAP_SEG_ES: 879 sel = rp->r_es; 880 break; 881 case FASTTRAP_SEG_FS: 882 sel = rp->r_fs; 883 break; 884 case FASTTRAP_SEG_GS: 885 sel = rp->r_gs; 886 break; 887 case FASTTRAP_SEG_SS: 888 sel = rp->r_ss; 889 break; 890 } 891 892 /* 893 * Make sure the given segment register specifies a user priority 894 * selector rather than a kernel selector. 895 */ 896 if (ISPL(sel) != SEL_UPL) 897 return (-1); 898 899 ndx = IDXSEL(sel); 900 901 /* 902 * Check the bounds and grab the descriptor out of the specified 903 * descriptor table. 904 */ 905 if (ISLDT(sel)) { 906 #ifdef __i386__ 907 if (ndx > p->p_md.md_ldt->ldt_len) 908 return (-1); 909 910 desc = (struct segment_descriptor *) 911 p->p_md.md_ldt[ndx].ldt_base; 912 #else 913 if (ndx > max_ldt_segment) 914 return (-1); 915 916 desc = (struct user_segment_descriptor *) 917 p->p_md.md_ldt[ndx].ldt_base; 918 #endif 919 920 } else { 921 if (ndx >= NGDT) 922 return (-1); 923 924 #ifdef __i386__ 925 desc = &gdt[ndx].sd; 926 #else 927 desc = &gdt[ndx]; 928 #endif 929 } 930 931 /* 932 * The descriptor must have user privilege level and it must be 933 * present in memory. 934 */ 935 if (desc->sd_dpl != SEL_UPL || desc->sd_p != 1) 936 return (-1); 937 938 type = desc->sd_type; 939 940 /* 941 * If the S bit in the type field is not set, this descriptor can 942 * only be used in system context. 943 */ 944 if ((type & 0x10) != 0x10) 945 return (-1); 946 947 limit = USD_GETLIMIT(desc) * (desc->sd_gran ? PAGESIZE : 1); 948 949 if (tp->ftt_segment == FASTTRAP_SEG_CS) { 950 /* 951 * The code/data bit and readable bit must both be set. 952 */ 953 if ((type & 0xa) != 0xa) 954 return (-1); 955 956 if (*addr > limit) 957 return (-1); 958 } else { 959 /* 960 * The code/data bit must be clear. 961 */ 962 if ((type & 0x8) != 0) 963 return (-1); 964 965 /* 966 * If the expand-down bit is clear, we just check the limit as 967 * it would naturally be applied. Otherwise, we need to check 968 * that the address is the range [limit + 1 .. 0xffff] or 969 * [limit + 1 ... 0xffffffff] depending on if the default 970 * operand size bit is set. 971 */ 972 if ((type & 0x4) == 0) { 973 if (*addr > limit) 974 return (-1); 975 } else if (desc->sd_def32) { 976 if (*addr < limit + 1 || 0xffff < *addr) 977 return (-1); 978 } else { 979 if (*addr < limit + 1 || 0xffffffff < *addr) 980 return (-1); 981 } 982 } 983 984 *addr += USD_GETBASE(desc); 985 986 return (0); 987 } 988 989 int 990 fasttrap_pid_probe(struct reg *rp) 991 { 992 proc_t *p = curproc; 993 #ifndef illumos 994 struct rm_priotracker tracker; 995 proc_t *pp; 996 #endif 997 uintptr_t pc = rp->r_rip - 1; 998 uintptr_t new_pc = 0; 999 fasttrap_bucket_t *bucket; 1000 #ifdef illumos 1001 kmutex_t *pid_mtx; 1002 #endif 1003 fasttrap_tracepoint_t *tp, tp_local; 1004 pid_t pid; 1005 dtrace_icookie_t cookie; 1006 uint_t is_enabled = 0; 1007 1008 /* 1009 * It's possible that a user (in a veritable orgy of bad planning) 1010 * could redirect this thread's flow of control before it reached the 1011 * return probe fasttrap. In this case we need to kill the process 1012 * since it's in a unrecoverable state. 1013 */ 1014 if (curthread->t_dtrace_step) { 1015 ASSERT(curthread->t_dtrace_on); 1016 fasttrap_sigtrap(p, curthread, pc); 1017 return (0); 1018 } 1019 1020 /* 1021 * Clear all user tracing flags. 1022 */ 1023 curthread->t_dtrace_ft = 0; 1024 curthread->t_dtrace_pc = 0; 1025 curthread->t_dtrace_npc = 0; 1026 curthread->t_dtrace_scrpc = 0; 1027 curthread->t_dtrace_astpc = 0; 1028 #ifdef __amd64 1029 curthread->t_dtrace_regv = 0; 1030 #endif 1031 1032 /* 1033 * Treat a child created by a call to vfork(2) as if it were its 1034 * parent. We know that there's only one thread of control in such a 1035 * process: this one. 1036 */ 1037 #ifdef illumos 1038 while (p->p_flag & SVFORK) { 1039 p = p->p_parent; 1040 } 1041 1042 pid = p->p_pid; 1043 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock; 1044 mutex_enter(pid_mtx); 1045 #else 1046 pp = p; 1047 sx_slock(&proctree_lock); 1048 while (pp->p_vmspace == pp->p_pptr->p_vmspace) 1049 pp = pp->p_pptr; 1050 pid = pp->p_pid; 1051 sx_sunlock(&proctree_lock); 1052 pp = NULL; 1053 1054 rm_rlock(&fasttrap_tp_lock, &tracker); 1055 #endif 1056 1057 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; 1058 1059 /* 1060 * Lookup the tracepoint that the process just hit. 1061 */ 1062 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { 1063 if (pid == tp->ftt_pid && pc == tp->ftt_pc && 1064 tp->ftt_proc->ftpc_acount != 0) 1065 break; 1066 } 1067 1068 /* 1069 * If we couldn't find a matching tracepoint, either a tracepoint has 1070 * been inserted without using the pid<pid> ioctl interface (see 1071 * fasttrap_ioctl), or somehow we have mislaid this tracepoint. 1072 */ 1073 if (tp == NULL) { 1074 #ifdef illumos 1075 mutex_exit(pid_mtx); 1076 #else 1077 rm_runlock(&fasttrap_tp_lock, &tracker); 1078 #endif 1079 return (-1); 1080 } 1081 1082 /* 1083 * Set the program counter to the address of the traced instruction 1084 * so that it looks right in ustack() output. 1085 */ 1086 rp->r_rip = pc; 1087 1088 if (tp->ftt_ids != NULL) { 1089 fasttrap_id_t *id; 1090 1091 #ifdef __amd64 1092 if (p->p_model == DATAMODEL_LP64) { 1093 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 1094 fasttrap_probe_t *probe = id->fti_probe; 1095 1096 if (id->fti_ptype == DTFTP_ENTRY) { 1097 /* 1098 * We note that this was an entry 1099 * probe to help ustack() find the 1100 * first caller. 1101 */ 1102 cookie = dtrace_interrupt_disable(); 1103 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 1104 dtrace_probe(probe->ftp_id, rp->r_rdi, 1105 rp->r_rsi, rp->r_rdx, rp->r_rcx, 1106 rp->r_r8); 1107 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 1108 dtrace_interrupt_enable(cookie); 1109 } else if (id->fti_ptype == DTFTP_IS_ENABLED) { 1110 /* 1111 * Note that in this case, we don't 1112 * call dtrace_probe() since it's only 1113 * an artificial probe meant to change 1114 * the flow of control so that it 1115 * encounters the true probe. 1116 */ 1117 is_enabled = 1; 1118 } else if (probe->ftp_argmap == NULL) { 1119 dtrace_probe(probe->ftp_id, rp->r_rdi, 1120 rp->r_rsi, rp->r_rdx, rp->r_rcx, 1121 rp->r_r8); 1122 } else { 1123 uintptr_t t[5]; 1124 1125 fasttrap_usdt_args64(probe, rp, 1126 sizeof (t) / sizeof (t[0]), t); 1127 1128 dtrace_probe(probe->ftp_id, t[0], t[1], 1129 t[2], t[3], t[4]); 1130 } 1131 } 1132 } else { 1133 #endif 1134 uintptr_t s0, s1, s2, s3, s4, s5; 1135 uint32_t *stack = (uint32_t *)rp->r_rsp; 1136 1137 /* 1138 * In 32-bit mode, all arguments are passed on the 1139 * stack. If this is a function entry probe, we need 1140 * to skip the first entry on the stack as it 1141 * represents the return address rather than a 1142 * parameter to the function. 1143 */ 1144 s0 = fasttrap_fuword32_noerr(&stack[0]); 1145 s1 = fasttrap_fuword32_noerr(&stack[1]); 1146 s2 = fasttrap_fuword32_noerr(&stack[2]); 1147 s3 = fasttrap_fuword32_noerr(&stack[3]); 1148 s4 = fasttrap_fuword32_noerr(&stack[4]); 1149 s5 = fasttrap_fuword32_noerr(&stack[5]); 1150 1151 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { 1152 fasttrap_probe_t *probe = id->fti_probe; 1153 1154 if (id->fti_ptype == DTFTP_ENTRY) { 1155 /* 1156 * We note that this was an entry 1157 * probe to help ustack() find the 1158 * first caller. 1159 */ 1160 cookie = dtrace_interrupt_disable(); 1161 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); 1162 dtrace_probe(probe->ftp_id, s1, s2, 1163 s3, s4, s5); 1164 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); 1165 dtrace_interrupt_enable(cookie); 1166 } else if (id->fti_ptype == DTFTP_IS_ENABLED) { 1167 /* 1168 * Note that in this case, we don't 1169 * call dtrace_probe() since it's only 1170 * an artificial probe meant to change 1171 * the flow of control so that it 1172 * encounters the true probe. 1173 */ 1174 is_enabled = 1; 1175 } else if (probe->ftp_argmap == NULL) { 1176 dtrace_probe(probe->ftp_id, s0, s1, 1177 s2, s3, s4); 1178 } else { 1179 uint32_t t[5]; 1180 1181 fasttrap_usdt_args32(probe, rp, 1182 sizeof (t) / sizeof (t[0]), t); 1183 1184 dtrace_probe(probe->ftp_id, t[0], t[1], 1185 t[2], t[3], t[4]); 1186 } 1187 } 1188 #ifdef __amd64 1189 } 1190 #endif 1191 } 1192 1193 /* 1194 * We're about to do a bunch of work so we cache a local copy of 1195 * the tracepoint to emulate the instruction, and then find the 1196 * tracepoint again later if we need to light up any return probes. 1197 */ 1198 tp_local = *tp; 1199 #ifdef illumos 1200 mutex_exit(pid_mtx); 1201 #else 1202 rm_runlock(&fasttrap_tp_lock, &tracker); 1203 #endif 1204 tp = &tp_local; 1205 1206 /* 1207 * Set the program counter to appear as though the traced instruction 1208 * had completely executed. This ensures that fasttrap_getreg() will 1209 * report the expected value for REG_RIP. 1210 */ 1211 rp->r_rip = pc + tp->ftt_size; 1212 1213 /* 1214 * If there's an is-enabled probe connected to this tracepoint it 1215 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax' 1216 * instruction that was placed there by DTrace when the binary was 1217 * linked. As this probe is, in fact, enabled, we need to stuff 1 1218 * into %eax or %rax. Accordingly, we can bypass all the instruction 1219 * emulation logic since we know the inevitable result. It's possible 1220 * that a user could construct a scenario where the 'is-enabled' 1221 * probe was on some other instruction, but that would be a rather 1222 * exotic way to shoot oneself in the foot. 1223 */ 1224 if (is_enabled) { 1225 rp->r_rax = 1; 1226 new_pc = rp->r_rip; 1227 goto done; 1228 } 1229 1230 /* 1231 * We emulate certain types of instructions to ensure correctness 1232 * (in the case of position dependent instructions) or optimize 1233 * common cases. The rest we have the thread execute back in user- 1234 * land. 1235 */ 1236 switch (tp->ftt_type) { 1237 case FASTTRAP_T_RET: 1238 case FASTTRAP_T_RET16: 1239 { 1240 uintptr_t dst = 0; 1241 uintptr_t addr = 0; 1242 int ret = 0; 1243 1244 /* 1245 * We have to emulate _every_ facet of the behavior of a ret 1246 * instruction including what happens if the load from %esp 1247 * fails; in that case, we send a SIGSEGV. 1248 */ 1249 #ifdef __amd64 1250 if (p->p_model == DATAMODEL_NATIVE) { 1251 ret = dst = fasttrap_fulword((void *)rp->r_rsp); 1252 addr = rp->r_rsp + sizeof (uintptr_t); 1253 } else { 1254 #endif 1255 uint32_t dst32; 1256 ret = dst32 = fasttrap_fuword32((void *)rp->r_rsp); 1257 dst = dst32; 1258 addr = rp->r_rsp + sizeof (uint32_t); 1259 #ifdef __amd64 1260 } 1261 #endif 1262 1263 if (ret == -1) { 1264 fasttrap_sigsegv(p, curthread, rp->r_rsp); 1265 new_pc = pc; 1266 break; 1267 } 1268 1269 if (tp->ftt_type == FASTTRAP_T_RET16) 1270 addr += tp->ftt_dest; 1271 1272 rp->r_rsp = addr; 1273 new_pc = dst; 1274 break; 1275 } 1276 1277 case FASTTRAP_T_JCC: 1278 { 1279 uint_t taken = 0; 1280 1281 switch (tp->ftt_code) { 1282 case FASTTRAP_JO: 1283 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) != 0; 1284 break; 1285 case FASTTRAP_JNO: 1286 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0; 1287 break; 1288 case FASTTRAP_JB: 1289 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0; 1290 break; 1291 case FASTTRAP_JAE: 1292 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0; 1293 break; 1294 case FASTTRAP_JE: 1295 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0; 1296 break; 1297 case FASTTRAP_JNE: 1298 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0; 1299 break; 1300 case FASTTRAP_JBE: 1301 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0 || 1302 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0; 1303 break; 1304 case FASTTRAP_JA: 1305 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0 && 1306 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0; 1307 break; 1308 case FASTTRAP_JS: 1309 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) != 0; 1310 break; 1311 case FASTTRAP_JNS: 1312 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0; 1313 break; 1314 case FASTTRAP_JP: 1315 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) != 0; 1316 break; 1317 case FASTTRAP_JNP: 1318 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) == 0; 1319 break; 1320 case FASTTRAP_JL: 1321 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) != 1322 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1323 break; 1324 case FASTTRAP_JGE: 1325 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) == 1326 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1327 break; 1328 case FASTTRAP_JLE: 1329 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 || 1330 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) != 1331 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1332 break; 1333 case FASTTRAP_JG: 1334 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 && 1335 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) == 1336 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0); 1337 break; 1338 1339 } 1340 1341 if (taken) 1342 new_pc = tp->ftt_dest; 1343 else 1344 new_pc = pc + tp->ftt_size; 1345 break; 1346 } 1347 1348 case FASTTRAP_T_LOOP: 1349 { 1350 uint_t taken = 0; 1351 #ifdef __amd64 1352 greg_t cx = rp->r_rcx--; 1353 #else 1354 greg_t cx = rp->r_ecx--; 1355 #endif 1356 1357 switch (tp->ftt_code) { 1358 case FASTTRAP_LOOPNZ: 1359 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 && 1360 cx != 0; 1361 break; 1362 case FASTTRAP_LOOPZ: 1363 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 && 1364 cx != 0; 1365 break; 1366 case FASTTRAP_LOOP: 1367 taken = (cx != 0); 1368 break; 1369 } 1370 1371 if (taken) 1372 new_pc = tp->ftt_dest; 1373 else 1374 new_pc = pc + tp->ftt_size; 1375 break; 1376 } 1377 1378 case FASTTRAP_T_JCXZ: 1379 { 1380 #ifdef __amd64 1381 greg_t cx = rp->r_rcx; 1382 #else 1383 greg_t cx = rp->r_ecx; 1384 #endif 1385 1386 if (cx == 0) 1387 new_pc = tp->ftt_dest; 1388 else 1389 new_pc = pc + tp->ftt_size; 1390 break; 1391 } 1392 1393 case FASTTRAP_T_PUSHL_EBP: 1394 { 1395 int ret = 0; 1396 1397 #ifdef __amd64 1398 if (p->p_model == DATAMODEL_NATIVE) { 1399 rp->r_rsp -= sizeof (uintptr_t); 1400 ret = fasttrap_sulword((void *)rp->r_rsp, rp->r_rbp); 1401 } else { 1402 #endif 1403 rp->r_rsp -= sizeof (uint32_t); 1404 ret = fasttrap_suword32((void *)rp->r_rsp, rp->r_rbp); 1405 #ifdef __amd64 1406 } 1407 #endif 1408 1409 if (ret == -1) { 1410 fasttrap_sigsegv(p, curthread, rp->r_rsp); 1411 new_pc = pc; 1412 break; 1413 } 1414 1415 new_pc = pc + tp->ftt_size; 1416 break; 1417 } 1418 1419 case FASTTRAP_T_NOP: 1420 new_pc = pc + tp->ftt_size; 1421 break; 1422 1423 case FASTTRAP_T_JMP: 1424 case FASTTRAP_T_CALL: 1425 if (tp->ftt_code == 0) { 1426 new_pc = tp->ftt_dest; 1427 } else { 1428 uintptr_t value, addr = tp->ftt_dest; 1429 1430 if (tp->ftt_base != FASTTRAP_NOREG) 1431 addr += fasttrap_getreg(rp, tp->ftt_base); 1432 if (tp->ftt_index != FASTTRAP_NOREG) 1433 addr += fasttrap_getreg(rp, tp->ftt_index) << 1434 tp->ftt_scale; 1435 1436 if (tp->ftt_code == 1) { 1437 /* 1438 * If there's a segment prefix for this 1439 * instruction, we'll need to check permissions 1440 * and bounds on the given selector, and adjust 1441 * the address accordingly. 1442 */ 1443 if (tp->ftt_segment != FASTTRAP_SEG_NONE && 1444 fasttrap_do_seg(tp, rp, &addr) != 0) { 1445 fasttrap_sigsegv(p, curthread, addr); 1446 new_pc = pc; 1447 break; 1448 } 1449 1450 #ifdef __amd64 1451 if (p->p_model == DATAMODEL_NATIVE) { 1452 #endif 1453 if ((value = fasttrap_fulword((void *)addr)) 1454 == -1) { 1455 fasttrap_sigsegv(p, curthread, 1456 addr); 1457 new_pc = pc; 1458 break; 1459 } 1460 new_pc = value; 1461 #ifdef __amd64 1462 } else { 1463 uint32_t value32; 1464 addr = (uintptr_t)(uint32_t)addr; 1465 if ((value32 = fasttrap_fuword32((void *)addr)) 1466 == -1) { 1467 fasttrap_sigsegv(p, curthread, 1468 addr); 1469 new_pc = pc; 1470 break; 1471 } 1472 new_pc = value32; 1473 } 1474 #endif 1475 } else { 1476 new_pc = addr; 1477 } 1478 } 1479 1480 /* 1481 * If this is a call instruction, we need to push the return 1482 * address onto the stack. If this fails, we send the process 1483 * a SIGSEGV and reset the pc to emulate what would happen if 1484 * this instruction weren't traced. 1485 */ 1486 if (tp->ftt_type == FASTTRAP_T_CALL) { 1487 int ret = 0; 1488 uintptr_t addr = 0, pcps; 1489 #ifdef __amd64 1490 if (p->p_model == DATAMODEL_NATIVE) { 1491 addr = rp->r_rsp - sizeof (uintptr_t); 1492 pcps = pc + tp->ftt_size; 1493 ret = fasttrap_sulword((void *)addr, pcps); 1494 } else { 1495 #endif 1496 addr = rp->r_rsp - sizeof (uint32_t); 1497 pcps = (uint32_t)(pc + tp->ftt_size); 1498 ret = fasttrap_suword32((void *)addr, pcps); 1499 #ifdef __amd64 1500 } 1501 #endif 1502 1503 if (ret == -1) { 1504 fasttrap_sigsegv(p, curthread, addr); 1505 new_pc = pc; 1506 break; 1507 } 1508 1509 rp->r_rsp = addr; 1510 } 1511 1512 break; 1513 1514 case FASTTRAP_T_COMMON: 1515 { 1516 uintptr_t addr; 1517 #if defined(__amd64) 1518 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22]; 1519 #else 1520 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7]; 1521 #endif 1522 uint_t i = 0; 1523 #ifdef illumos 1524 klwp_t *lwp = ttolwp(curthread); 1525 1526 /* 1527 * Compute the address of the ulwp_t and step over the 1528 * ul_self pointer. The method used to store the user-land 1529 * thread pointer is very different on 32- and 64-bit 1530 * kernels. 1531 */ 1532 #if defined(__amd64) 1533 if (p->p_model == DATAMODEL_LP64) { 1534 addr = lwp->lwp_pcb.pcb_fsbase; 1535 addr += sizeof (void *); 1536 } else { 1537 addr = lwp->lwp_pcb.pcb_gsbase; 1538 addr += sizeof (caddr32_t); 1539 } 1540 #else 1541 addr = USD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc); 1542 addr += sizeof (void *); 1543 #endif 1544 #else /* !illumos */ 1545 fasttrap_scrspace_t *scrspace; 1546 scrspace = fasttrap_scraddr(curthread, tp->ftt_proc); 1547 if (scrspace == NULL) { 1548 /* 1549 * We failed to allocate scratch space for this thread. 1550 * Try to write the original instruction back out and 1551 * reset the pc. 1552 */ 1553 if (fasttrap_copyout(tp->ftt_instr, (void *)pc, 1554 tp->ftt_size)) 1555 fasttrap_sigtrap(p, curthread, pc); 1556 new_pc = pc; 1557 break; 1558 } 1559 addr = scrspace->ftss_addr; 1560 #endif /* illumos */ 1561 1562 /* 1563 * Generic Instruction Tracing 1564 * --------------------------- 1565 * 1566 * This is the layout of the scratch space in the user-land 1567 * thread structure for our generated instructions. 1568 * 1569 * 32-bit mode bytes 1570 * ------------------------ ----- 1571 * a: <original instruction> <= 15 1572 * jmp <pc + tp->ftt_size> 5 1573 * b: <original instruction> <= 15 1574 * int T_DTRACE_RET 2 1575 * ----- 1576 * <= 37 1577 * 1578 * 64-bit mode bytes 1579 * ------------------------ ----- 1580 * a: <original instruction> <= 15 1581 * jmp 0(%rip) 6 1582 * <pc + tp->ftt_size> 8 1583 * b: <original instruction> <= 15 1584 * int T_DTRACE_RET 2 1585 * ----- 1586 * <= 46 1587 * 1588 * The %pc is set to a, and curthread->t_dtrace_astpc is set 1589 * to b. If we encounter a signal on the way out of the 1590 * kernel, trap() will set %pc to curthread->t_dtrace_astpc 1591 * so that we execute the original instruction and re-enter 1592 * the kernel rather than redirecting to the next instruction. 1593 * 1594 * If there are return probes (so we know that we're going to 1595 * need to reenter the kernel after executing the original 1596 * instruction), the scratch space will just contain the 1597 * original instruction followed by an interrupt -- the same 1598 * data as at b. 1599 * 1600 * %rip-relative Addressing 1601 * ------------------------ 1602 * 1603 * There's a further complication in 64-bit mode due to %rip- 1604 * relative addressing. While this is clearly a beneficial 1605 * architectural decision for position independent code, it's 1606 * hard not to see it as a personal attack against the pid 1607 * provider since before there was a relatively small set of 1608 * instructions to emulate; with %rip-relative addressing, 1609 * almost every instruction can potentially depend on the 1610 * address at which it's executed. Rather than emulating 1611 * the broad spectrum of instructions that can now be 1612 * position dependent, we emulate jumps and others as in 1613 * 32-bit mode, and take a different tack for instructions 1614 * using %rip-relative addressing. 1615 * 1616 * For every instruction that uses the ModRM byte, the 1617 * in-kernel disassembler reports its location. We use the 1618 * ModRM byte to identify that an instruction uses 1619 * %rip-relative addressing and to see what other registers 1620 * the instruction uses. To emulate those instructions, 1621 * we modify the instruction to be %rax-relative rather than 1622 * %rip-relative (or %rcx-relative if the instruction uses 1623 * %rax; or %r8- or %r9-relative if the REX.B is present so 1624 * we don't have to rewrite the REX prefix). We then load 1625 * the value that %rip would have been into the scratch 1626 * register and generate an instruction to reset the scratch 1627 * register back to its original value. The instruction 1628 * sequence looks like this: 1629 * 1630 * 64-mode %rip-relative bytes 1631 * ------------------------ ----- 1632 * a: <modified instruction> <= 15 1633 * movq $<value>, %<scratch> 6 1634 * jmp 0(%rip) 6 1635 * <pc + tp->ftt_size> 8 1636 * b: <modified instruction> <= 15 1637 * int T_DTRACE_RET 2 1638 * ----- 1639 * 52 1640 * 1641 * We set curthread->t_dtrace_regv so that upon receiving 1642 * a signal we can reset the value of the scratch register. 1643 */ 1644 1645 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE); 1646 1647 curthread->t_dtrace_scrpc = addr; 1648 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1649 i += tp->ftt_size; 1650 1651 #ifdef __amd64 1652 if (tp->ftt_ripmode != 0) { 1653 greg_t *reg = NULL; 1654 1655 ASSERT(p->p_model == DATAMODEL_LP64); 1656 ASSERT(tp->ftt_ripmode & 1657 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2)); 1658 1659 /* 1660 * If this was a %rip-relative instruction, we change 1661 * it to be either a %rax- or %rcx-relative 1662 * instruction (depending on whether those registers 1663 * are used as another operand; or %r8- or %r9- 1664 * relative depending on the value of REX.B). We then 1665 * set that register and generate a movq instruction 1666 * to reset the value. 1667 */ 1668 if (tp->ftt_ripmode & FASTTRAP_RIP_X) 1669 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1); 1670 else 1671 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0); 1672 1673 if (tp->ftt_ripmode & FASTTRAP_RIP_1) 1674 scratch[i++] = FASTTRAP_MOV_EAX; 1675 else 1676 scratch[i++] = FASTTRAP_MOV_ECX; 1677 1678 switch (tp->ftt_ripmode) { 1679 case FASTTRAP_RIP_1: 1680 reg = &rp->r_rax; 1681 curthread->t_dtrace_reg = REG_RAX; 1682 break; 1683 case FASTTRAP_RIP_2: 1684 reg = &rp->r_rcx; 1685 curthread->t_dtrace_reg = REG_RCX; 1686 break; 1687 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X: 1688 reg = &rp->r_r8; 1689 curthread->t_dtrace_reg = REG_R8; 1690 break; 1691 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X: 1692 reg = &rp->r_r9; 1693 curthread->t_dtrace_reg = REG_R9; 1694 break; 1695 } 1696 1697 /* LINTED - alignment */ 1698 *(uint64_t *)&scratch[i] = *reg; 1699 curthread->t_dtrace_regv = *reg; 1700 *reg = pc + tp->ftt_size; 1701 i += sizeof (uint64_t); 1702 } 1703 #endif 1704 1705 /* 1706 * Generate the branch instruction to what would have 1707 * normally been the subsequent instruction. In 32-bit mode, 1708 * this is just a relative branch; in 64-bit mode this is a 1709 * %rip-relative branch that loads the 64-bit pc value 1710 * immediately after the jmp instruction. 1711 */ 1712 #ifdef __amd64 1713 if (p->p_model == DATAMODEL_LP64) { 1714 scratch[i++] = FASTTRAP_GROUP5_OP; 1715 scratch[i++] = FASTTRAP_MODRM(0, 4, 5); 1716 /* LINTED - alignment */ 1717 *(uint32_t *)&scratch[i] = 0; 1718 i += sizeof (uint32_t); 1719 /* LINTED - alignment */ 1720 *(uint64_t *)&scratch[i] = pc + tp->ftt_size; 1721 i += sizeof (uint64_t); 1722 } else { 1723 #endif 1724 /* 1725 * Set up the jmp to the next instruction; note that 1726 * the size of the traced instruction cancels out. 1727 */ 1728 scratch[i++] = FASTTRAP_JMP32; 1729 /* LINTED - alignment */ 1730 *(uint32_t *)&scratch[i] = pc - addr - 5; 1731 i += sizeof (uint32_t); 1732 #ifdef __amd64 1733 } 1734 #endif 1735 1736 curthread->t_dtrace_astpc = addr + i; 1737 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size); 1738 i += tp->ftt_size; 1739 scratch[i++] = FASTTRAP_INT; 1740 scratch[i++] = T_DTRACE_RET; 1741 1742 ASSERT(i <= sizeof (scratch)); 1743 1744 #ifdef illumos 1745 if (fasttrap_copyout(scratch, (char *)addr, i)) { 1746 #else 1747 if (uwrite(p, scratch, i, addr)) { 1748 #endif 1749 fasttrap_sigtrap(p, curthread, pc); 1750 new_pc = pc; 1751 break; 1752 } 1753 if (tp->ftt_retids != NULL) { 1754 curthread->t_dtrace_step = 1; 1755 curthread->t_dtrace_ret = 1; 1756 new_pc = curthread->t_dtrace_astpc; 1757 } else { 1758 new_pc = curthread->t_dtrace_scrpc; 1759 } 1760 1761 curthread->t_dtrace_pc = pc; 1762 curthread->t_dtrace_npc = pc + tp->ftt_size; 1763 curthread->t_dtrace_on = 1; 1764 break; 1765 } 1766 1767 default: 1768 panic("fasttrap: mishandled an instruction"); 1769 } 1770 1771 done: 1772 /* 1773 * If there were no return probes when we first found the tracepoint, 1774 * we should feel no obligation to honor any return probes that were 1775 * subsequently enabled -- they'll just have to wait until the next 1776 * time around. 1777 */ 1778 if (tp->ftt_retids != NULL) { 1779 /* 1780 * We need to wait until the results of the instruction are 1781 * apparent before invoking any return probes. If this 1782 * instruction was emulated we can just call 1783 * fasttrap_return_common(); if it needs to be executed, we 1784 * need to wait until the user thread returns to the kernel. 1785 */ 1786 if (tp->ftt_type != FASTTRAP_T_COMMON) { 1787 /* 1788 * Set the program counter to the address of the traced 1789 * instruction so that it looks right in ustack() 1790 * output. We had previously set it to the end of the 1791 * instruction to simplify %rip-relative addressing. 1792 */ 1793 rp->r_rip = pc; 1794 1795 fasttrap_return_common(rp, pc, pid, new_pc); 1796 } else { 1797 ASSERT(curthread->t_dtrace_ret != 0); 1798 ASSERT(curthread->t_dtrace_pc == pc); 1799 ASSERT(curthread->t_dtrace_scrpc != 0); 1800 ASSERT(new_pc == curthread->t_dtrace_astpc); 1801 } 1802 } 1803 1804 rp->r_rip = new_pc; 1805 1806 #ifndef illumos 1807 PROC_LOCK(p); 1808 proc_write_regs(curthread, rp); 1809 PROC_UNLOCK(p); 1810 #endif 1811 1812 return (0); 1813 } 1814 1815 int 1816 fasttrap_return_probe(struct reg *rp) 1817 { 1818 proc_t *p = curproc; 1819 uintptr_t pc = curthread->t_dtrace_pc; 1820 uintptr_t npc = curthread->t_dtrace_npc; 1821 1822 curthread->t_dtrace_pc = 0; 1823 curthread->t_dtrace_npc = 0; 1824 curthread->t_dtrace_scrpc = 0; 1825 curthread->t_dtrace_astpc = 0; 1826 1827 #ifdef illumos 1828 /* 1829 * Treat a child created by a call to vfork(2) as if it were its 1830 * parent. We know that there's only one thread of control in such a 1831 * process: this one. 1832 */ 1833 while (p->p_flag & SVFORK) { 1834 p = p->p_parent; 1835 } 1836 #endif 1837 1838 /* 1839 * We set rp->r_rip to the address of the traced instruction so 1840 * that it appears to dtrace_probe() that we're on the original 1841 * instruction, and so that the user can't easily detect our 1842 * complex web of lies. dtrace_return_probe() (our caller) 1843 * will correctly set %pc after we return. 1844 */ 1845 rp->r_rip = pc; 1846 1847 fasttrap_return_common(rp, pc, p->p_pid, npc); 1848 1849 return (0); 1850 } 1851 1852 /*ARGSUSED*/ 1853 uint64_t 1854 fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 1855 int aframes) 1856 { 1857 struct reg r; 1858 1859 fill_regs(curthread, &r); 1860 1861 return (fasttrap_anarg(&r, 1, argno)); 1862 } 1863 1864 /*ARGSUSED*/ 1865 uint64_t 1866 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, 1867 int aframes) 1868 { 1869 struct reg r; 1870 1871 fill_regs(curthread, &r); 1872 1873 return (fasttrap_anarg(&r, 0, argno)); 1874 } 1875 1876 static ulong_t 1877 fasttrap_getreg(struct reg *rp, uint_t reg) 1878 { 1879 #ifdef __amd64 1880 switch (reg) { 1881 case REG_R15: return (rp->r_r15); 1882 case REG_R14: return (rp->r_r14); 1883 case REG_R13: return (rp->r_r13); 1884 case REG_R12: return (rp->r_r12); 1885 case REG_R11: return (rp->r_r11); 1886 case REG_R10: return (rp->r_r10); 1887 case REG_R9: return (rp->r_r9); 1888 case REG_R8: return (rp->r_r8); 1889 case REG_RDI: return (rp->r_rdi); 1890 case REG_RSI: return (rp->r_rsi); 1891 case REG_RBP: return (rp->r_rbp); 1892 case REG_RBX: return (rp->r_rbx); 1893 case REG_RDX: return (rp->r_rdx); 1894 case REG_RCX: return (rp->r_rcx); 1895 case REG_RAX: return (rp->r_rax); 1896 case REG_TRAPNO: return (rp->r_trapno); 1897 case REG_ERR: return (rp->r_err); 1898 case REG_RIP: return (rp->r_rip); 1899 case REG_CS: return (rp->r_cs); 1900 #ifdef illumos 1901 case REG_RFL: return (rp->r_rfl); 1902 #endif 1903 case REG_RSP: return (rp->r_rsp); 1904 case REG_SS: return (rp->r_ss); 1905 case REG_FS: return (rp->r_fs); 1906 case REG_GS: return (rp->r_gs); 1907 case REG_DS: return (rp->r_ds); 1908 case REG_ES: return (rp->r_es); 1909 case REG_FSBASE: return (rdmsr(MSR_FSBASE)); 1910 case REG_GSBASE: return (rdmsr(MSR_GSBASE)); 1911 } 1912 1913 panic("dtrace: illegal register constant"); 1914 /*NOTREACHED*/ 1915 #else 1916 #define _NGREG 19 1917 if (reg >= _NGREG) 1918 panic("dtrace: illegal register constant"); 1919 1920 return (((greg_t *)&rp->r_gs)[reg]); 1921 #endif 1922 } 1923