1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2010 Spectra Logic Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * substantially similar to the "NO WARRANTY" disclaimer below 15 * ("Disclaimer") and any redistribution must be conditioned upon 16 * including a substantially similar Disclaimer requirement for further 17 * binary redistribution. 18 * 19 * NO WARRANTY 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 28 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 29 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGES. 31 * 32 * $Id: //depot/users/kenm/FreeBSD-test/sys/cam/scsi/smp_all.h#4 $ 33 * $FreeBSD$ 34 */ 35 36 /* 37 * Serial Management Protocol definitions. 38 */ 39 40 #ifndef _SCSI_SMP_ALL_H 41 #define _SCSI_SMP_ALL_H 1 42 43 #define SMP_FRAME_TYPE_REQUEST 0x40 44 #define SMP_FRAME_TYPE_RESPONSE 0x41 45 #define SMP_WORD_LEN 4 46 #define SMP_CRC_LEN 4 47 48 /* 49 * SMP Functions (current as of SPL Revision 7) 50 */ 51 /* 0x00 to 0x7f: SMP input functions */ 52 /* 0x00 to 0x0f: General SMP input functions */ 53 #define SMP_FUNC_REPORT_GENERAL 0x00 54 #define SMP_FUNC_REPORT_MANUF_INFO 0x01 55 #define SMP_FUNC_REPORT_SC_STATUS 0x03 56 #define SMP_FUNC_REPORT_ZONE_PERM_TBL 0x04 57 #define SMP_FUNC_REPORT_ZONE_MAN_PWD 0x05 58 #define SMP_FUNC_REPORT_BROADCAST 0x06 59 60 /* 0x10 to 0x1f: Phy-based SMP input functions */ 61 #define SMP_FUNC_DISCOVER 0x10 62 #define SMP_FUNC_REPORT_PHY_ERR_LOG 0x11 63 #define SMP_FUNC_REPORT_PHY_SATA 0x12 64 #define SMP_FUNC_REPORT_ROUTE_INFO 0x13 65 #define SMP_FUNC_REPORT_PHY_EVENT 0x14 66 67 /* 0x20 to 0x2f: Descriptor list-based SMP input functions */ 68 #define SMP_FUNC_DISCOVER_LIST 0x20 69 #define SMP_FUNC_REPORT_PHY_EVENT_LIST 0x21 70 #define SMP_FUNC_REPORT_EXP_RTL 0x22 71 72 /* 0x30 to 0x3f: Reserved for SMP input functions */ 73 /* 0x40 to 0x7f: Vendor specific */ 74 75 /* 0x80 to 0xff: SMP output functions */ 76 /* 0x80 to 0x8f: General SMP output functions */ 77 #define SMP_FUNC_CONFIG_GENERAL 0x80 78 #define SMP_FUNC_ENABLE_DISABLE_ZONING 0x81 79 #define SMP_FUNC_ZONED_BROADCAST 0x85 80 #define SMP_FUNC_ZONE_LOCK 0x86 81 #define SMP_FUNC_ZONE_ACTIVATE 0x87 82 #define SMP_FUNC_ZONE_UNLOCK 0x88 83 #define SMP_FUNC_CONFIG_ZM_PWD 0x89 84 #define SMP_FUNC_CONFIG_ZONE_PHY_INFO 0x8a 85 #define SMP_FUNC_CONFIG_ZONE_PERM_TBL 0x8b 86 87 /* 0x90 to 0x9f: Phy-based SMP output functions */ 88 #define SMP_FUNC_CONFIG_ROUTE_INFO 0x90 89 #define SMP_FUNC_PHY_CONTROL 0x91 90 #define SMP_FUNC_PHY_TEST_FUNC 0x92 91 #define SMP_FUNC_CONFIG_PHY_EVENT 0x93 92 93 /* 0xa0 to 0xbf: Reserved for SMP output functions */ 94 /* 0xc0 to 0xff: Vendor specific */ 95 96 /* 97 * Function Results (current as of SPL Revision 7) 98 */ 99 #define SMP_FR_ACCEPTED 0x00 100 #define SMP_FR_UNKNOWN_FUNC 0x01 101 #define SMP_FR_FUNCTION_FAILED 0x02 102 #define SMP_FR_INVALID_REQ_FRAME_LEN 0x03 103 #define SMP_FR_INVALID_EXP_CHG_CNT 0x04 104 #define SMP_FR_BUSY 0x05 105 #define SMP_FR_INCOMPLETE_DESC_LIST 0x06 106 #define SMP_FR_PHY_DOES_NOT_EXIST 0x10 107 #define SMP_FR_INDEX_DOES_NOT_EXIST 0x11 108 #define SMP_FR_PHY_DOES_NOT_SUP_SATA 0x12 109 #define SMP_FR_UNKNOWN_PHY_OP 0x13 110 #define SMP_FR_UNKNOWN_PHY_TEST_FUNC 0x14 111 #define SMP_FR_PHY_TEST_FUNC_INPROG 0x15 112 #define SMP_FR_PHY_VACANT 0x16 113 #define SMP_FR_UNKNOWN_PHY_EVENT_SRC 0x17 114 #define SMP_FR_UNKNOWN_DESC_TYPE 0x18 115 #define SMP_FR_UNKNOWN_PHY_FILTER 0x19 116 #define SMP_FR_AFFILIATION_VIOLATION 0x1a 117 #define SMP_FR_SMP_ZONE_VIOLATION 0x20 118 #define SMP_FR_NO_MGMT_ACCESS_RIGHTS 0x21 119 #define SMP_FR_UNKNOWN_ED_ZONING_VAL 0x22 120 #define SMP_FR_ZONE_LOCK_VIOLATION 0x23 121 #define SMP_FR_NOT_ACTIVATED 0x24 122 #define SMP_FR_ZG_OUT_OF_RANGE 0x25 123 #define SMP_FR_NO_PHYS_PRESENCE 0x26 124 #define SMP_FR_SAVING_NOT_SUP 0x27 125 #define SMP_FR_SRC_ZONE_DNE 0x28 126 #define SMP_FR_DISABLED_PWD_NOT_SUP 0x29 127 128 /* 129 * REPORT GENERAL request and response, current as of SPL Revision 7. 130 */ 131 struct smp_report_general_request 132 { 133 uint8_t frame_type; 134 uint8_t function; 135 uint8_t response_len; 136 uint8_t request_len; 137 uint8_t crc[4]; 138 }; 139 140 struct smp_report_general_response 141 { 142 uint8_t frame_type; 143 uint8_t function; 144 uint8_t function_result; 145 uint8_t response_len; 146 #define SMP_RG_RESPONSE_LEN 0x11 147 uint8_t expander_change_count[2]; 148 uint8_t expander_route_indexes[2]; 149 uint8_t long_response; 150 #define SMP_RG_LONG_RESPONSE 0x80 151 uint8_t num_phys; 152 uint8_t config_bits0; 153 #define SMP_RG_TABLE_TO_TABLE_SUP 0x80 154 #define SMP_RG_ZONE_CONFIGURING 0x40 155 #define SMP_RG_SELF_CONFIGURING 0x20 156 #define SMP_RG_STP_CONTINUE_AWT 0x10 157 #define SMP_RG_OPEN_REJECT_RETRY_SUP 0x08 158 #define SMP_RG_CONFIGURES_OTHERS 0x04 159 #define SMP_RG_CONFIGURING 0x02 160 #define SMP_RG_EXT_CONFIG_ROUTE_TABLE 0x01 161 uint8_t reserved0; 162 uint8_t encl_logical_id[8]; 163 uint8_t reserved1[8]; 164 uint8_t reserved2[2]; 165 uint8_t stp_bus_inact_time_limit[2]; 166 uint8_t stp_max_conn_time_limit[2]; 167 uint8_t stp_smp_it_nexus_loss_time[2]; 168 uint8_t config_bits1; 169 #define SMP_RG_NUM_ZONE_GROUPS_MASK 0xc0 170 #define SMP_RG_NUM_ZONE_GROUPS_SHIFT 6 171 #define SMP_RG_ZONE_LOCKED 0x10 172 #define SMP_RG_PP_SUPPORTED 0x08 173 #define SMP_RG_PP_ASSERTED 0x04 174 #define SMP_RG_ZONING_SUPPORTED 0x02 175 #define SMP_RG_ZONING_ENABLED 0x01 176 uint8_t config_bits2; 177 #define SMP_RG_SAVING 0x10 178 #define SMP_RG_SAVING_ZM_PWD_SUP 0x08 179 #define SMP_RG_SAVING_PHY_INFO_SUP 0x04 180 #define SMP_RG_SAVING_ZPERM_TAB_SUP 0x02 181 #define SMP_RG_SAVING_ZENABLED_SUP 0x01 182 uint8_t max_num_routed_addrs[2]; 183 uint8_t active_zm_address[8]; 184 uint8_t zone_lock_inact_time_limit[2]; 185 uint8_t reserved3[2]; 186 uint8_t reserved4; 187 uint8_t first_encl_conn_el_index; 188 uint8_t num_encl_conn_el_indexes; 189 uint8_t reserved5; 190 uint8_t reduced_functionality; 191 #define SMP_RG_REDUCED_FUNCTIONALITY 0x80 192 uint8_t time_to_reduced_func; 193 uint8_t initial_time_to_reduced_func; 194 uint8_t max_reduced_func_time; 195 uint8_t last_sc_stat_desc_index[2]; 196 uint8_t max_sc_stat_descs[2]; 197 uint8_t last_phy_evl_desc_index[2]; 198 uint8_t max_stored_pel_descs[2]; 199 uint8_t stp_reject_to_open_limit[2]; 200 uint8_t reserved6[2]; 201 uint8_t crc[4]; 202 }; 203 204 /* 205 * REPORT MANUFACTURER INFORMATION request and response, current as of SPL 206 * Revision 7. 207 */ 208 struct smp_report_manuf_info_request 209 { 210 uint8_t frame_type; 211 uint8_t function; 212 uint8_t response_len; 213 uint8_t request_len; 214 #define SMP_RMI_REQUEST_LEN 0x00 215 uint8_t crc[4]; 216 }; 217 218 struct smp_report_manuf_info_response 219 { 220 uint8_t frame_type; 221 uint8_t function; 222 uint8_t function_result; 223 uint8_t response_len; 224 #define SMP_RMI_RESPONSE_LEN 0x0e 225 uint8_t expander_change_count[2]; 226 uint8_t reserved0[2]; 227 uint8_t sas_11_format; 228 #define SMP_RMI_SAS11_FORMAT 0x01 229 uint8_t reserved1[3]; 230 uint8_t vendor[8]; 231 uint8_t product[16]; 232 uint8_t revision[4]; 233 uint8_t comp_vendor[8]; 234 uint8_t comp_id[2]; 235 uint8_t comp_revision; 236 uint8_t reserved2; 237 uint8_t vendor_specific[8]; 238 uint8_t crc[4]; 239 }; 240 241 /* 242 * DISCOVER request and response, current as of SPL Revision 7. 243 */ 244 struct smp_discover_request 245 { 246 uint8_t frame_type; 247 uint8_t function; 248 uint8_t response_len; 249 uint8_t request_len; 250 #define SMP_DIS_REQUEST_LEN 0x02 251 uint8_t reserved0[4]; 252 uint8_t ignore_zone_group; 253 #define SMP_DIS_IGNORE_ZONE_GROUP 0x01 254 uint8_t phy; 255 uint8_t reserved1[2]; 256 uint8_t crc[4]; 257 }; 258 259 struct smp_discover_response 260 { 261 uint8_t frame_type; 262 uint8_t function; 263 uint8_t function_result; 264 uint8_t response_len; 265 #define SMP_DIS_RESPONSE_LEN 0x20 266 uint8_t expander_change_count[2]; 267 uint8_t reserved0[3]; 268 uint8_t phy; 269 uint8_t reserved1[2]; 270 uint8_t attached_device; 271 #define SMP_DIS_AD_TYPE_MASK 0x70 272 #define SMP_DIS_AD_TYPE_NONE 0x00 273 #define SMP_DIS_AD_TYPE_SAS_SATA 0x10 274 #define SMP_DIS_AD_TYPE_EXP 0x20 275 #define SMP_DIS_AD_TYPE_EXP_OLD 0x30 276 #define SMP_DIS_ATTACH_REASON_MASK 0x0f 277 uint8_t neg_logical_link_rate; 278 #define SMP_DIS_LR_MASK 0x0f 279 #define SMP_DIS_LR_DISABLED 0x01 280 #define SMP_DIS_LR_PHY_RES_PROB 0x02 281 #define SMP_DIS_LR_SPINUP_HOLD 0x03 282 #define SMP_DIS_LR_PORT_SEL 0x04 283 #define SMP_DIS_LR_RESET_IN_PROG 0x05 284 #define SMP_DIS_LR_UNSUP_PHY_ATTACHED 0x06 285 #define SMP_DIS_LR_G1_15GBPS 0x08 286 #define SMP_DIS_LR_G2_30GBPS 0x09 287 #define SMP_DIS_LR_G3_60GBPS 0x0a 288 uint8_t config_bits0; 289 #define SMP_DIS_ATTACHED_SSP_INIT 0x08 290 #define SMP_DIS_ATTACHED_STP_INIT 0x04 291 #define SMP_DIS_ATTACHED_SMP_INIT 0x02 292 #define SMP_DIS_ATTACHED_SATA_HOST 0x01 293 uint8_t config_bits1; 294 #define SMP_DIS_ATTACHED_SATA_PORTSEL 0x80 295 #define SMP_DIS_STP_BUFFER_TOO_SMALL 0x10 296 #define SMP_DIS_ATTACHED_SSP_TARG 0x08 297 #define SMP_DIS_ATTACHED_STP_TARG 0x04 298 #define SMP_DIS_ATTACHED_SMP_TARG 0x02 299 #define SMP_DIS_ATTACHED_SATA_DEV 0x01 300 uint8_t sas_address[8]; 301 uint8_t attached_sas_address[8]; 302 uint8_t attached_phy_id; 303 uint8_t config_bits2; 304 #define SMP_DIS_ATT_SLUMB_CAP 0x10 305 #define SMP_DIS_ATT_PAR_CAP 0x08 306 #define SMP_DIS_ATT_IN_ZPSDS_PER 0x04 307 #define SMP_DIS_ATT_REQ_IN_ZPSDS 0x02 308 #define SMP_DIS_ATT_BREAK_RPL_CAP 0x01 309 uint8_t reserved2[6]; 310 uint8_t link_rate0; 311 #define SMP_DIS_PROG_MIN_LR_MASK 0xf0 312 #define SMP_DIS_PROG_MIN_LR_SHIFT 4 313 #define SMP_DIS_HARD_MIN_LR_MASK 0x0f 314 uint8_t link_rate1; 315 #define SMP_DIS_PROG_MAX_LR_MAX 0xf0 316 #define SMP_DIS_PROG_MAX_LR_SHIFT 4 317 #define SMP_DIS_HARD_MAX_LR_MASK 0x0f 318 uint8_t phy_change_count; 319 uint8_t pp_timeout; 320 #define SMP_DIS_VIRTUAL_PHY 0x80 321 #define SMP_DIS_PP_TIMEOUT_MASK 0x0f 322 uint8_t routing_attr; 323 uint8_t conn_type; 324 uint8_t conn_el_index; 325 uint8_t conn_phys_link; 326 uint8_t config_bits3; 327 #define SMP_DIS_PHY_POW_COND_MASK 0xc0 328 #define SMP_DIS_PHY_POW_COND_SHIFT 6 329 #define SMP_DIS_SAS_SLUMB_CAP 0x08 330 #define SMP_DIS_SAS_PART_CAP 0x04 331 #define SMP_DIS_SATA_SLUMB_CAP 0x02 332 #define SMP_DIS_SATA_PART_CAP 0x01 333 uint8_t config_bits4; 334 #define SMP_DIS_SAS_SLUMB_ENB 0x08 335 #define SMP_DIS_SAS_PART_ENB 0x04 336 #define SMP_DIS_SATA_SLUMB_ENB 0x02 337 #define SMP_DIS_SATA_PART_ENB 0x01 338 uint8_t vendor_spec[2]; 339 uint8_t attached_dev_name[8]; 340 uint8_t config_bits5; 341 #define SMP_DIS_REQ_IN_ZPSDS_CHG 0x40 342 #define SMP_DIS_IN_ZPSDS_PER 0x20 343 #define SMP_DIS_REQ_IN_ZPSDS 0x10 344 #define SMP_DIS_ZG_PER 0x04 345 #define SMP_DIS_IN_ZPSDS 0x02 346 #define SMP_DIS_ZONING_ENB 0x01 347 uint8_t reserved3[2]; 348 uint8_t zone_group; 349 uint8_t self_config_status; 350 uint8_t self_config_levels_comp; 351 uint8_t reserved4[2]; 352 uint8_t self_config_sas_addr[8]; 353 uint8_t prog_phy_cap[4]; 354 uint8_t current_phy_cap[4]; 355 uint8_t attached_phy_cap[4]; 356 uint8_t reserved5[6]; 357 uint8_t neg_phys_link_rate; 358 #define SMP_DIS_REASON_MASK 0xf0 359 #define SMP_DIS_REASON_SHIFT 4 360 #define SMP_DIS_PHYS_LR_MASK 0x0f 361 uint8_t config_bits6; 362 #define SMP_DIS_OPTICAL_MODE_ENB 0x04 363 #define SMP_DIS_NEG_SSC 0x02 364 #define SMP_DIS_HW_MUX_SUP 0x01 365 uint8_t config_bits7; 366 #define SMP_DIS_DEF_IN_ZPSDS_PER 0x20 367 #define SMP_DIS_DEF_REQ_IN_ZPSDS 0x10 368 #define SMP_DIS_DEF_ZG_PER 0x04 369 #define SMP_DIS_DEF_ZONING_ENB 0x01 370 uint8_t reserved6; 371 uint8_t reserved7; 372 uint8_t default_zone_group; 373 uint8_t config_bits8; 374 #define SMP_DIS_SAVED_IN_ZPSDS_PER 0x20 375 #define SMP_DIS_SAVED_REQ_IN_SPSDS 0x10 376 #define SMP_DIS_SAVED_ZG_PER 0x04 377 #define SMP_DIS_SAVED_ZONING_ENB 0x01 378 uint8_t reserved8; 379 uint8_t reserved9; 380 uint8_t saved_zone_group; 381 uint8_t config_bits9; 382 #define SMP_DIS_SHADOW_IN_ZPSDS_PER 0x20 383 #define SMP_DIS_SHADOW_IN_REQ_IN_ZPSDS 0x10 384 #define SMP_DIS_SHADOW_ZG_PER 0x04 385 uint8_t reserved10; 386 uint8_t reserved11; 387 uint8_t shadow_zone_group; 388 uint8_t device_slot_num; 389 uint8_t device_slot_group_num; 390 uint8_t device_slot_group_out_conn[6]; 391 uint8_t stp_buffer_size[2]; 392 uint8_t reserved12; 393 uint8_t reserved13; 394 uint8_t crc[4]; 395 }; 396 397 /* 398 * PHY CONTROL request and response. Current as of SPL Revision 7. 399 */ 400 struct smp_phy_control_request 401 { 402 uint8_t frame_type; 403 uint8_t function; 404 uint8_t response_len; 405 #define SMP_PC_RESPONSE_LEN 0x00 406 uint8_t request_len; 407 #define SMP_PC_REQUEST_LEN 0x09 408 uint8_t expected_exp_chg_cnt[2]; 409 uint8_t reserved0[3]; 410 uint8_t phy; 411 uint8_t phy_operation; 412 #define SMP_PC_PHY_OP_NOP 0x00 413 #define SMP_PC_PHY_OP_LINK_RESET 0x01 414 #define SMP_PC_PHY_OP_HARD_RESET 0x02 415 #define SMP_PC_PHY_OP_DISABLE 0x03 416 #define SMP_PC_PHY_OP_CLEAR_ERR_LOG 0x05 417 #define SMP_PC_PHY_OP_CLEAR_AFFILIATON 0x06 418 #define SMP_PC_PHY_OP_TRANS_SATA_PSS 0x07 419 #define SMP_PC_PHY_OP_CLEAR_STP_ITN_LS 0x08 420 #define SMP_PC_PHY_OP_SET_ATT_DEV_NAME 0x09 421 uint8_t update_pp_timeout; 422 #define SMP_PC_UPDATE_PP_TIMEOUT 0x01 423 uint8_t reserved1[12]; 424 uint8_t attached_device_name[8]; 425 uint8_t prog_min_phys_link_rate; 426 #define SMP_PC_PROG_MIN_PL_RATE_MASK 0xf0 427 #define SMP_PC_PROG_MIN_PL_RATE_SHIFT 4 428 uint8_t prog_max_phys_link_rate; 429 #define SMP_PC_PROG_MAX_PL_RATE_MASK 0xf0 430 #define SMP_PC_PROG_MAX_PL_RATE_SHIFT 4 431 uint8_t config_bits0; 432 #define SMP_PC_SP_NC 0x00 433 #define SMP_PC_SP_DISABLE 0x02 434 #define SMP_PC_SP_ENABLE 0x01 435 #define SMP_PC_SAS_SLUMBER_NC 0x00 436 #define SMP_PC_SAS_SLUMBER_DISABLE 0x80 437 #define SMP_PC_SAS_SLUMBER_ENABLE 0x40 438 #define SMP_PC_SAS_SLUMBER_MASK 0xc0 439 #define SMP_PC_SAS_SLUMBER_SHIFT 6 440 #define SMP_PC_SAS_PARTIAL_NC 0x00 441 #define SMP_PC_SAS_PARTIAL_DISABLE 0x20 442 #define SMP_PC_SAS_PARTIAL_ENABLE 0x10 443 #define SMP_PC_SAS_PARTIAL_MASK 0x30 444 #define SMP_PC_SAS_PARTIAL_SHIFT 4 445 #define SMP_PC_SATA_SLUMBER_NC 0x00 446 #define SMP_PC_SATA_SLUMBER_DISABLE 0x08 447 #define SMP_PC_SATA_SLUMBER_ENABLE 0x04 448 #define SMP_PC_SATA_SLUMBER_MASK 0x0c 449 #define SMP_PC_SATA_SLUMBER_SHIFT 2 450 #define SMP_PC_SATA_PARTIAL_NC 0x00 451 #define SMP_PC_SATA_PARTIAL_DISABLE 0x02 452 #define SMP_PC_SATA_PARTIAL_ENABLE 0x01 453 #define SMP_PC_SATA_PARTIAL_MASK 0x03 454 #define SMP_PC_SATA_PARTIAL_SHIFT 0 455 uint8_t reserved2; 456 uint8_t pp_timeout_value; 457 #define SMP_PC_PP_TIMEOUT_MASK 0x0f 458 uint8_t reserved3[3]; 459 uint8_t crc[4]; 460 }; 461 462 struct smp_phy_control_response 463 { 464 uint8_t frame_type; 465 uint8_t function; 466 uint8_t function_result; 467 uint8_t response_len; 468 #define SMP_PC_RESPONSE_LEN 0x00 469 uint8_t crc[4]; 470 }; 471 472 __BEGIN_DECLS 473 474 const char *smp_error_desc(int function_result); 475 const char *smp_command_desc(uint8_t cmd_num); 476 void smp_command_decode(uint8_t *smp_request, int request_len, struct sbuf *sb, 477 char *line_prefix, int first_line_len, int line_len); 478 void smp_command_sbuf(struct ccb_smpio *smpio, struct sbuf *sb, 479 char *line_prefix, int first_line_len, int line_len); 480 481 #ifdef _KERNEL 482 void smp_error_sbuf(struct ccb_smpio *smpio, struct sbuf *sb); 483 #else /* !_KERNEL*/ 484 void smp_error_sbuf(struct cam_device *device, struct ccb_smpio *smpio, 485 struct sbuf *sb); 486 #endif /* _KERNEL/!_KERNEL */ 487 488 void smp_report_general_sbuf(struct smp_report_general_response *response, 489 int response_len, struct sbuf *sb); 490 491 void smp_report_manuf_info_sbuf(struct smp_report_manuf_info_response *response, 492 int response_len, struct sbuf *sb); 493 494 void smp_report_general(struct ccb_smpio *smpio, uint32_t retries, 495 void (*cbfcnp)(struct cam_periph *, union ccb *), 496 struct smp_report_general_request *request, 497 int request_len, uint8_t *response, int response_len, 498 int long_response, uint32_t timeout); 499 500 void smp_discover(struct ccb_smpio *smpio, uint32_t retries, 501 void (*cbfcnp)(struct cam_periph *, union ccb *), 502 struct smp_discover_request *request, int request_len, 503 uint8_t *response, int response_len, int long_response, 504 int ignore_zone_group, int phy, uint32_t timeout); 505 506 void smp_report_manuf_info(struct ccb_smpio *smpio, uint32_t retries, 507 void (*cbfcnp)(struct cam_periph *, union ccb *), 508 struct smp_report_manuf_info_request *request, 509 int request_len, uint8_t *response, int response_len, 510 int long_response, uint32_t timeout); 511 512 void smp_phy_control(struct ccb_smpio *smpio, uint32_t retries, 513 void (*cbfcnp)(struct cam_periph *, union ccb *), 514 struct smp_phy_control_request *request, int request_len, 515 uint8_t *response, int response_len, int long_response, 516 uint32_t expected_exp_change_count, int phy, int phy_op, 517 int update_pp_timeout_val, uint64_t attached_device_name, 518 int prog_min_prl, int prog_max_prl, int slumber_partial, 519 int pp_timeout_value, uint32_t timeout); 520 __END_DECLS 521 522 #endif /*_SCSI_SMP_ALL_H*/ 523