1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 Bernd Walter <tisco@FreeBSD.org> 5 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org> 6 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> 7 * Copyright (c) 2015-2017 Ilya Bakulin <kibab@FreeBSD.org> 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer, 15 * without modification, immediately at the beginning of the file. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * Some code derived from the sys/dev/mmc and sys/cam/ata 32 * Thanks to Warner Losh <imp@FreeBSD.org>, Alexander Motin <mav@FreeBSD.org> 33 * Bernd Walter <tisco@FreeBSD.org>, and other authors. 34 */ 35 36 #include <sys/cdefs.h> 37 __FBSDID("$FreeBSD$"); 38 39 //#include "opt_sdda.h" 40 41 #include <sys/param.h> 42 43 #ifdef _KERNEL 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/bio.h> 47 #include <sys/endian.h> 48 #include <sys/taskqueue.h> 49 #include <sys/lock.h> 50 #include <sys/mutex.h> 51 #include <sys/conf.h> 52 #include <sys/devicestat.h> 53 #include <sys/eventhandler.h> 54 #include <sys/malloc.h> 55 #include <sys/cons.h> 56 #include <sys/proc.h> 57 #include <sys/reboot.h> 58 #include <geom/geom_disk.h> 59 #include <machine/_inttypes.h> /* for PRIu64 */ 60 #endif /* _KERNEL */ 61 62 #ifndef _KERNEL 63 #include <stdio.h> 64 #include <string.h> 65 #endif /* _KERNEL */ 66 67 #include <cam/cam.h> 68 #include <cam/cam_ccb.h> 69 #include <cam/cam_queue.h> 70 #include <cam/cam_periph.h> 71 #include <cam/cam_sim.h> 72 #include <cam/cam_xpt.h> 73 #include <cam/cam_xpt_sim.h> 74 #include <cam/cam_xpt_periph.h> 75 #include <cam/cam_xpt_internal.h> 76 #include <cam/cam_debug.h> 77 78 79 #include <cam/mmc/mmc_all.h> 80 81 #include <machine/md_var.h> /* geometry translation */ 82 83 #ifdef _KERNEL 84 85 typedef enum { 86 SDDA_FLAG_OPEN = 0x0002, 87 SDDA_FLAG_DIRTY = 0x0004 88 } sdda_flags; 89 90 typedef enum { 91 SDDA_STATE_INIT, 92 SDDA_STATE_INVALID, 93 SDDA_STATE_NORMAL, 94 SDDA_STATE_PART_SWITCH, 95 } sdda_state; 96 97 #define SDDA_FMT_BOOT "sdda%dboot" 98 #define SDDA_FMT_GP "sdda%dgp" 99 #define SDDA_FMT_RPMB "sdda%drpmb" 100 #define SDDA_LABEL_ENH "enh" 101 102 #define SDDA_PART_NAMELEN (16 + 1) 103 104 struct sdda_softc; 105 106 struct sdda_part { 107 struct disk *disk; 108 struct bio_queue_head bio_queue; 109 sdda_flags flags; 110 struct sdda_softc *sc; 111 u_int cnt; 112 u_int type; 113 bool ro; 114 char name[SDDA_PART_NAMELEN]; 115 }; 116 117 struct sdda_softc { 118 int outstanding_cmds; /* Number of active commands */ 119 int refcount; /* Active xpt_action() calls */ 120 sdda_state state; 121 struct mmc_data *mmcdata; 122 struct cam_periph *periph; 123 // sdda_quirks quirks; 124 struct task start_init_task; 125 uint32_t raw_csd[4]; 126 uint8_t raw_ext_csd[512]; /* MMC only? */ 127 struct mmc_csd csd; 128 struct mmc_cid cid; 129 struct mmc_scr scr; 130 /* Calculated from CSD */ 131 uint64_t sector_count; 132 uint64_t mediasize; 133 134 /* Calculated from CID */ 135 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 136 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 137 /* Determined from CSD + is highspeed card*/ 138 uint32_t card_f_max; 139 140 /* Generic switch timeout */ 141 uint32_t cmd6_time; 142 /* MMC partitions support */ 143 struct sdda_part *part[MMC_PART_MAX]; 144 uint8_t part_curr; /* Partition currently switched to */ 145 uint8_t part_requested; /* What partition we're currently switching to */ 146 uint32_t part_time; /* Partition switch timeout [us] */ 147 off_t enh_base; /* Enhanced user data area slice base ... */ 148 off_t enh_size; /* ... and size [bytes] */ 149 int log_count; 150 struct timeval log_time; 151 }; 152 153 #define ccb_bp ppriv_ptr1 154 155 static disk_strategy_t sddastrategy; 156 static periph_init_t sddainit; 157 static void sddaasync(void *callback_arg, u_int32_t code, 158 struct cam_path *path, void *arg); 159 static periph_ctor_t sddaregister; 160 static periph_dtor_t sddacleanup; 161 static periph_start_t sddastart; 162 static periph_oninv_t sddaoninvalidate; 163 static void sddadone(struct cam_periph *periph, 164 union ccb *done_ccb); 165 static int sddaerror(union ccb *ccb, u_int32_t cam_flags, 166 u_int32_t sense_flags); 167 168 static uint16_t get_rca(struct cam_periph *periph); 169 static void sdda_start_init(void *context, union ccb *start_ccb); 170 static void sdda_start_init_task(void *context, int pending); 171 static void sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *start_ccb); 172 static uint32_t sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb); 173 static void sdda_init_switch_part(struct cam_periph *periph, union ccb *start_ccb, u_int part); 174 175 static inline uint32_t mmc_get_sector_size(struct cam_periph *periph) {return MMC_SECTOR_SIZE;} 176 177 /* TODO: actually issue GET_TRAN_SETTINGS to get R/O status */ 178 static inline bool sdda_get_read_only(struct cam_periph *periph, union ccb *start_ccb) 179 { 180 181 return (false); 182 } 183 184 static uint32_t mmc_get_spec_vers(struct cam_periph *periph); 185 static uint64_t mmc_get_media_size(struct cam_periph *periph); 186 static uint32_t mmc_get_cmd6_timeout(struct cam_periph *periph); 187 static void sdda_add_part(struct cam_periph *periph, u_int type, 188 const char *name, u_int cnt, off_t media_size, bool ro); 189 190 static struct periph_driver sddadriver = 191 { 192 sddainit, "sdda", 193 TAILQ_HEAD_INITIALIZER(sddadriver.units), /* generation */ 0 194 }; 195 196 PERIPHDRIVER_DECLARE(sdda, sddadriver); 197 198 static MALLOC_DEFINE(M_SDDA, "sd_da", "sd_da buffers"); 199 200 static const int exp[8] = { 201 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 202 }; 203 204 static const int mant[16] = { 205 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 206 }; 207 208 static const int cur_min[8] = { 209 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 210 }; 211 212 static const int cur_max[8] = { 213 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 214 }; 215 216 static uint16_t 217 get_rca(struct cam_periph *periph) { 218 return periph->path->device->mmc_ident_data.card_rca; 219 } 220 221 static uint32_t 222 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 223 { 224 const int i = (bit_len / 32) - (start / 32) - 1; 225 const int shift = start & 31; 226 uint32_t retval = bits[i] >> shift; 227 if (size + shift > 32) 228 retval |= bits[i - 1] << (32 - shift); 229 return (retval & ((1llu << size) - 1)); 230 } 231 232 233 static void 234 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 235 { 236 int v; 237 int m; 238 int e; 239 240 memset(csd, 0, sizeof(*csd)); 241 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 242 if (v == 0) { 243 m = mmc_get_bits(raw_csd, 128, 115, 4); 244 e = mmc_get_bits(raw_csd, 128, 112, 3); 245 csd->tacc = (exp[e] * mant[m] + 9) / 10; 246 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 247 m = mmc_get_bits(raw_csd, 128, 99, 4); 248 e = mmc_get_bits(raw_csd, 128, 96, 3); 249 csd->tran_speed = exp[e] * 10000 * mant[m]; 250 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 251 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 252 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 253 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 254 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 255 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 256 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 257 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 258 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 259 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 260 m = mmc_get_bits(raw_csd, 128, 62, 12); 261 e = mmc_get_bits(raw_csd, 128, 47, 3); 262 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 263 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 264 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 265 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 266 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 267 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 268 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 269 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 270 } else if (v == 1) { 271 m = mmc_get_bits(raw_csd, 128, 115, 4); 272 e = mmc_get_bits(raw_csd, 128, 112, 3); 273 csd->tacc = (exp[e] * mant[m] + 9) / 10; 274 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 275 m = mmc_get_bits(raw_csd, 128, 99, 4); 276 e = mmc_get_bits(raw_csd, 128, 96, 3); 277 csd->tran_speed = exp[e] * 10000 * mant[m]; 278 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 279 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 280 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 281 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 282 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 283 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 284 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) * 285 512 * 1024; 286 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 287 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 288 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 289 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 290 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 291 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 292 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 293 } else 294 panic("unknown SD CSD version"); 295 } 296 297 static void 298 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 299 { 300 int m; 301 int e; 302 303 memset(csd, 0, sizeof(*csd)); 304 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 305 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 306 m = mmc_get_bits(raw_csd, 128, 115, 4); 307 e = mmc_get_bits(raw_csd, 128, 112, 3); 308 csd->tacc = exp[e] * mant[m] + 9 / 10; 309 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 310 m = mmc_get_bits(raw_csd, 128, 99, 4); 311 e = mmc_get_bits(raw_csd, 128, 96, 3); 312 csd->tran_speed = exp[e] * 10000 * mant[m]; 313 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 314 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 315 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 316 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 317 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 318 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 319 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 320 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 321 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 322 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 323 m = mmc_get_bits(raw_csd, 128, 62, 12); 324 e = mmc_get_bits(raw_csd, 128, 47, 3); 325 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 326 csd->erase_blk_en = 0; 327 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 328 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 329 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 330 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 331 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 332 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 333 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 334 } 335 336 static void 337 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 338 { 339 int i; 340 341 /* There's no version info, so we take it on faith */ 342 memset(cid, 0, sizeof(*cid)); 343 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 344 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 345 for (i = 0; i < 5; i++) 346 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 347 cid->pnm[5] = 0; 348 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 349 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 350 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 351 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 352 } 353 354 static void 355 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid) 356 { 357 int i; 358 359 /* There's no version info, so we take it on faith */ 360 memset(cid, 0, sizeof(*cid)); 361 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 362 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 363 for (i = 0; i < 6; i++) 364 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 365 cid->pnm[6] = 0; 366 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 367 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 368 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 369 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997; 370 } 371 372 static void 373 mmc_format_card_id_string(struct sdda_softc *sc, struct mmc_params *mmcp) 374 { 375 char oidstr[8]; 376 uint8_t c1; 377 uint8_t c2; 378 379 /* 380 * Format a card ID string for use by the mmcsd driver, it's what 381 * appears between the <> in the following: 382 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0 383 * 22.5MHz/4bit/128-block 384 * 385 * Also format just the card serial number, which the mmcsd driver will 386 * use as the disk->d_ident string. 387 * 388 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 389 * and our max formatted length is currently 55 bytes if every field 390 * contains the largest value. 391 * 392 * Sometimes the oid is two printable ascii chars; when it's not, 393 * format it as 0xnnnn instead. 394 */ 395 c1 = (sc->cid.oid >> 8) & 0x0ff; 396 c2 = sc->cid.oid & 0x0ff; 397 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 398 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 399 else 400 snprintf(oidstr, sizeof(oidstr), "0x%04x", sc->cid.oid); 401 snprintf(sc->card_sn_string, sizeof(sc->card_sn_string), 402 "%08X", sc->cid.psn); 403 snprintf(sc->card_id_string, sizeof(sc->card_id_string), 404 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 405 mmcp->card_features & CARD_FEATURE_MMC ? "MMC" : "SD", 406 mmcp->card_features & CARD_FEATURE_SDHC ? "HC" : "", 407 sc->cid.pnm, sc->cid.prv >> 4, sc->cid.prv & 0x0f, 408 sc->cid.psn, sc->cid.mdt_month, sc->cid.mdt_year, 409 sc->cid.mid, oidstr); 410 } 411 412 static int 413 sddaopen(struct disk *dp) 414 { 415 struct sdda_part *part; 416 struct cam_periph *periph; 417 struct sdda_softc *softc; 418 int error; 419 420 part = (struct sdda_part *)dp->d_drv1; 421 softc = part->sc; 422 periph = softc->periph; 423 if (cam_periph_acquire(periph) != 0) { 424 return(ENXIO); 425 } 426 427 cam_periph_lock(periph); 428 if ((error = cam_periph_hold(periph, PRIBIO|PCATCH)) != 0) { 429 cam_periph_unlock(periph); 430 cam_periph_release(periph); 431 return (error); 432 } 433 434 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaopen\n")); 435 436 part->flags |= SDDA_FLAG_OPEN; 437 438 cam_periph_unhold(periph); 439 cam_periph_unlock(periph); 440 return (0); 441 } 442 443 static int 444 sddaclose(struct disk *dp) 445 { 446 struct sdda_part *part; 447 struct cam_periph *periph; 448 struct sdda_softc *softc; 449 450 part = (struct sdda_part *)dp->d_drv1; 451 softc = part->sc; 452 periph = softc->periph; 453 part->flags &= ~SDDA_FLAG_OPEN; 454 455 cam_periph_lock(periph); 456 457 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaclose\n")); 458 459 while (softc->refcount != 0) 460 cam_periph_sleep(periph, &softc->refcount, PRIBIO, "sddaclose", 1); 461 cam_periph_unlock(periph); 462 cam_periph_release(periph); 463 return (0); 464 } 465 466 static void 467 sddaschedule(struct cam_periph *periph) 468 { 469 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 470 struct sdda_part *part; 471 struct bio *bp; 472 int i; 473 474 /* Check if we have more work to do. */ 475 /* Find partition that has outstanding commands. Prefer current partition. */ 476 bp = bioq_first(&softc->part[softc->part_curr]->bio_queue); 477 if (bp == NULL) { 478 for (i = 0; i < MMC_PART_MAX; i++) { 479 if ((part = softc->part[i]) != NULL && 480 (bp = bioq_first(&softc->part[i]->bio_queue)) != NULL) 481 break; 482 } 483 } 484 if (bp != NULL) { 485 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 486 } 487 } 488 489 /* 490 * Actually translate the requested transfer into one the physical driver 491 * can understand. The transfer is described by a buf and will include 492 * only one physical transfer. 493 */ 494 static void 495 sddastrategy(struct bio *bp) 496 { 497 struct cam_periph *periph; 498 struct sdda_part *part; 499 struct sdda_softc *softc; 500 501 part = (struct sdda_part *)bp->bio_disk->d_drv1; 502 softc = part->sc; 503 periph = softc->periph; 504 505 cam_periph_lock(periph); 506 507 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastrategy(%p)\n", bp)); 508 509 /* 510 * If the device has been made invalid, error out 511 */ 512 if ((periph->flags & CAM_PERIPH_INVALID) != 0) { 513 cam_periph_unlock(periph); 514 biofinish(bp, NULL, ENXIO); 515 return; 516 } 517 518 /* 519 * Place it in the queue of disk activities for this disk 520 */ 521 bioq_disksort(&part->bio_queue, bp); 522 523 /* 524 * Schedule ourselves for performing the work. 525 */ 526 sddaschedule(periph); 527 cam_periph_unlock(periph); 528 529 return; 530 } 531 532 static void 533 sddainit(void) 534 { 535 cam_status status; 536 537 /* 538 * Install a global async callback. This callback will 539 * receive async callbacks like "new device found". 540 */ 541 status = xpt_register_async(AC_FOUND_DEVICE, sddaasync, NULL, NULL); 542 543 if (status != CAM_REQ_CMP) { 544 printf("sdda: Failed to attach master async callback " 545 "due to status 0x%x!\n", status); 546 } 547 } 548 549 /* 550 * Callback from GEOM, called when it has finished cleaning up its 551 * resources. 552 */ 553 static void 554 sddadiskgonecb(struct disk *dp) 555 { 556 struct cam_periph *periph; 557 struct sdda_part *part; 558 559 part = (struct sdda_part *)dp->d_drv1; 560 periph = part->sc->periph; 561 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddadiskgonecb\n")); 562 563 cam_periph_release(periph); 564 } 565 566 static void 567 sddaoninvalidate(struct cam_periph *periph) 568 { 569 struct sdda_softc *softc; 570 struct sdda_part *part; 571 572 softc = (struct sdda_softc *)periph->softc; 573 574 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaoninvalidate\n")); 575 576 /* 577 * De-register any async callbacks. 578 */ 579 xpt_register_async(0, sddaasync, periph, periph->path); 580 581 /* 582 * Return all queued I/O with ENXIO. 583 * XXX Handle any transactions queued to the card 584 * with XPT_ABORT_CCB. 585 */ 586 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush start\n")); 587 for (int i = 0; i < MMC_PART_MAX; i++) { 588 if ((part = softc->part[i]) != NULL) { 589 bioq_flush(&part->bio_queue, NULL, ENXIO); 590 disk_gone(part->disk); 591 } 592 } 593 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush end\n")); 594 595 } 596 597 static void 598 sddacleanup(struct cam_periph *periph) 599 { 600 struct sdda_softc *softc; 601 struct sdda_part *part; 602 int i; 603 604 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddacleanup\n")); 605 softc = (struct sdda_softc *)periph->softc; 606 607 cam_periph_unlock(periph); 608 609 for (i = 0; i < MMC_PART_MAX; i++) { 610 if ((part = softc->part[i]) != NULL) { 611 disk_destroy(part->disk); 612 free(part, M_DEVBUF); 613 softc->part[i] = NULL; 614 } 615 } 616 free(softc, M_DEVBUF); 617 cam_periph_lock(periph); 618 } 619 620 static void 621 sddaasync(void *callback_arg, u_int32_t code, 622 struct cam_path *path, void *arg) 623 { 624 struct ccb_getdev cgd; 625 struct cam_periph *periph; 626 struct sdda_softc *softc; 627 628 periph = (struct cam_periph *)callback_arg; 629 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddaasync(code=%d)\n", code)); 630 switch (code) { 631 case AC_FOUND_DEVICE: 632 { 633 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_FOUND_DEVICE\n")); 634 struct ccb_getdev *cgd; 635 cam_status status; 636 637 cgd = (struct ccb_getdev *)arg; 638 if (cgd == NULL) 639 break; 640 641 if (cgd->protocol != PROTO_MMCSD) 642 break; 643 644 if (!(path->device->mmc_ident_data.card_features & CARD_FEATURE_MEMORY)) { 645 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("No memory on the card!\n")); 646 break; 647 } 648 649 /* 650 * Allocate a peripheral instance for 651 * this device and start the probe 652 * process. 653 */ 654 status = cam_periph_alloc(sddaregister, sddaoninvalidate, 655 sddacleanup, sddastart, 656 "sdda", CAM_PERIPH_BIO, 657 path, sddaasync, 658 AC_FOUND_DEVICE, cgd); 659 660 if (status != CAM_REQ_CMP 661 && status != CAM_REQ_INPROG) 662 printf("sddaasync: Unable to attach to new device " 663 "due to status 0x%x\n", status); 664 break; 665 } 666 case AC_GETDEV_CHANGED: 667 { 668 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_GETDEV_CHANGED\n")); 669 softc = (struct sdda_softc *)periph->softc; 670 xpt_setup_ccb(&cgd.ccb_h, periph->path, CAM_PRIORITY_NORMAL); 671 cgd.ccb_h.func_code = XPT_GDEV_TYPE; 672 xpt_action((union ccb *)&cgd); 673 cam_periph_async(periph, code, path, arg); 674 break; 675 } 676 case AC_ADVINFO_CHANGED: 677 { 678 uintptr_t buftype; 679 int i; 680 681 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_ADVINFO_CHANGED\n")); 682 buftype = (uintptr_t)arg; 683 if (buftype == CDAI_TYPE_PHYS_PATH) { 684 struct sdda_softc *softc; 685 struct sdda_part *part; 686 687 softc = periph->softc; 688 for (i = 0; i < MMC_PART_MAX; i++) { 689 if ((part = softc->part[i]) != NULL) { 690 disk_attr_changed(part->disk, "GEOM::physpath", 691 M_NOWAIT); 692 } 693 } 694 } 695 break; 696 } 697 default: 698 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> default?!\n")); 699 cam_periph_async(periph, code, path, arg); 700 break; 701 } 702 } 703 704 705 static int 706 sddagetattr(struct bio *bp) 707 { 708 struct cam_periph *periph; 709 struct sdda_softc *softc; 710 struct sdda_part *part; 711 int ret; 712 713 part = (struct sdda_part *)bp->bio_disk->d_drv1; 714 softc = part->sc; 715 periph = softc->periph; 716 cam_periph_lock(periph); 717 ret = xpt_getattr(bp->bio_data, bp->bio_length, bp->bio_attribute, 718 periph->path); 719 cam_periph_unlock(periph); 720 if (ret == 0) 721 bp->bio_completed = bp->bio_length; 722 return (ret); 723 } 724 725 static cam_status 726 sddaregister(struct cam_periph *periph, void *arg) 727 { 728 struct sdda_softc *softc; 729 struct ccb_getdev *cgd; 730 union ccb *request_ccb; /* CCB representing the probe request */ 731 732 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaregister\n")); 733 cgd = (struct ccb_getdev *)arg; 734 if (cgd == NULL) { 735 printf("sddaregister: no getdev CCB, can't register device\n"); 736 return (CAM_REQ_CMP_ERR); 737 } 738 739 softc = (struct sdda_softc *)malloc(sizeof(*softc), M_DEVBUF, 740 M_NOWAIT|M_ZERO); 741 742 if (softc == NULL) { 743 printf("sddaregister: Unable to probe new device. " 744 "Unable to allocate softc\n"); 745 return (CAM_REQ_CMP_ERR); 746 } 747 748 softc->state = SDDA_STATE_INIT; 749 softc->mmcdata = 750 (struct mmc_data *)malloc(sizeof(struct mmc_data), M_DEVBUF, M_NOWAIT|M_ZERO); 751 periph->softc = softc; 752 softc->periph = periph; 753 754 request_ccb = (union ccb*) arg; 755 xpt_schedule(periph, CAM_PRIORITY_XPT); 756 TASK_INIT(&softc->start_init_task, 0, sdda_start_init_task, periph); 757 taskqueue_enqueue(taskqueue_thread, &softc->start_init_task); 758 759 return (CAM_REQ_CMP); 760 } 761 762 static int 763 mmc_exec_app_cmd(struct cam_periph *periph, union ccb *ccb, 764 struct mmc_command *cmd) { 765 int err; 766 767 /* Send APP_CMD first */ 768 memset(&ccb->mmcio.cmd, 0, sizeof(struct mmc_command)); 769 memset(&ccb->mmcio.stop, 0, sizeof(struct mmc_command)); 770 cam_fill_mmcio(&ccb->mmcio, 771 /*retries*/ 0, 772 /*cbfcnp*/ NULL, 773 /*flags*/ CAM_DIR_NONE, 774 /*mmc_opcode*/ MMC_APP_CMD, 775 /*mmc_arg*/ get_rca(periph) << 16, 776 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_AC, 777 /*mmc_data*/ NULL, 778 /*timeout*/ 0); 779 780 err = cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 781 if (err != 0) 782 return err; 783 if (!(ccb->mmcio.cmd.resp[0] & R1_APP_CMD)) 784 return MMC_ERR_FAILED; 785 786 /* Now exec actual command */ 787 int flags = 0; 788 if (cmd->data != NULL) { 789 ccb->mmcio.cmd.data = cmd->data; 790 if (cmd->data->flags & MMC_DATA_READ) 791 flags |= CAM_DIR_IN; 792 if (cmd->data->flags & MMC_DATA_WRITE) 793 flags |= CAM_DIR_OUT; 794 } else flags = CAM_DIR_NONE; 795 796 cam_fill_mmcio(&ccb->mmcio, 797 /*retries*/ 0, 798 /*cbfcnp*/ NULL, 799 /*flags*/ flags, 800 /*mmc_opcode*/ cmd->opcode, 801 /*mmc_arg*/ cmd->arg, 802 /*mmc_flags*/ cmd->flags, 803 /*mmc_data*/ cmd->data, 804 /*timeout*/ 0); 805 806 err = cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 807 memcpy(cmd->resp, ccb->mmcio.cmd.resp, sizeof(cmd->resp)); 808 cmd->error = ccb->mmcio.cmd.error; 809 if (err != 0) 810 return err; 811 return 0; 812 } 813 814 static int 815 mmc_app_get_scr(struct cam_periph *periph, union ccb *ccb, uint32_t *rawscr) { 816 int err; 817 struct mmc_command cmd; 818 struct mmc_data d; 819 820 memset(&cmd, 0, sizeof(cmd)); 821 822 memset(rawscr, 0, 8); 823 cmd.opcode = ACMD_SEND_SCR; 824 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 825 cmd.arg = 0; 826 827 d.data = rawscr; 828 d.len = 8; 829 d.flags = MMC_DATA_READ; 830 cmd.data = &d; 831 832 err = mmc_exec_app_cmd(periph, ccb, &cmd); 833 rawscr[0] = be32toh(rawscr[0]); 834 rawscr[1] = be32toh(rawscr[1]); 835 return (err); 836 } 837 838 static int 839 mmc_send_ext_csd(struct cam_periph *periph, union ccb *ccb, 840 uint8_t *rawextcsd, size_t buf_len) { 841 int err; 842 struct mmc_data d; 843 844 KASSERT(buf_len == 512, ("Buffer for ext csd must be 512 bytes")); 845 d.data = rawextcsd; 846 d.len = buf_len; 847 d.flags = MMC_DATA_READ; 848 memset(d.data, 0, d.len); 849 850 cam_fill_mmcio(&ccb->mmcio, 851 /*retries*/ 0, 852 /*cbfcnp*/ NULL, 853 /*flags*/ CAM_DIR_IN, 854 /*mmc_opcode*/ MMC_SEND_EXT_CSD, 855 /*mmc_arg*/ 0, 856 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC, 857 /*mmc_data*/ &d, 858 /*timeout*/ 0); 859 860 err = cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 861 if (err != 0) 862 return (err); 863 return (MMC_ERR_NONE); 864 } 865 866 static void 867 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 868 { 869 unsigned int scr_struct; 870 871 memset(scr, 0, sizeof(*scr)); 872 873 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 874 if (scr_struct != 0) { 875 printf("Unrecognised SCR structure version %d\n", 876 scr_struct); 877 return; 878 } 879 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 880 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 881 } 882 883 static inline void 884 mmc_switch_fill_mmcio(union ccb *ccb, 885 uint8_t set, uint8_t index, uint8_t value, u_int timeout) 886 { 887 int arg = (MMC_SWITCH_FUNC_WR << 24) | 888 (index << 16) | 889 (value << 8) | 890 set; 891 892 cam_fill_mmcio(&ccb->mmcio, 893 /*retries*/ 0, 894 /*cbfcnp*/ NULL, 895 /*flags*/ CAM_DIR_NONE, 896 /*mmc_opcode*/ MMC_SWITCH_FUNC, 897 /*mmc_arg*/ arg, 898 /*mmc_flags*/ MMC_RSP_R1B | MMC_CMD_AC, 899 /*mmc_data*/ NULL, 900 /*timeout*/ timeout); 901 } 902 903 static int 904 mmc_switch(struct cam_periph *periph, union ccb *ccb, 905 uint8_t set, uint8_t index, uint8_t value, u_int timeout) 906 { 907 908 mmc_switch_fill_mmcio(ccb, set, index, value, timeout); 909 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 910 911 if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP)) { 912 if (ccb->mmcio.cmd.error != 0) { 913 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH, 914 ("%s: MMC command failed", __func__)); 915 return (EIO); 916 } 917 return (0); /* Normal return */ 918 } else { 919 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH, 920 ("%s: CAM request failed\n", __func__)); 921 return (EIO); 922 } 923 924 } 925 926 static uint32_t 927 mmc_get_spec_vers(struct cam_periph *periph) { 928 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 929 930 return (softc->csd.spec_vers); 931 } 932 933 static uint64_t 934 mmc_get_media_size(struct cam_periph *periph) { 935 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 936 937 return (softc->mediasize); 938 } 939 940 static uint32_t 941 mmc_get_cmd6_timeout(struct cam_periph *periph) 942 { 943 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 944 945 if (mmc_get_spec_vers(periph) >= 6) 946 return (softc->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME] * 10); 947 return (500 * 1000); 948 } 949 950 static int 951 mmc_sd_switch(struct cam_periph *periph, union ccb *ccb, 952 uint8_t mode, uint8_t grp, uint8_t value, 953 uint8_t *res) { 954 955 struct mmc_data mmc_d; 956 957 memset(res, 0, 64); 958 mmc_d.len = 64; 959 mmc_d.data = res; 960 mmc_d.flags = MMC_DATA_READ; 961 962 cam_fill_mmcio(&ccb->mmcio, 963 /*retries*/ 0, 964 /*cbfcnp*/ NULL, 965 /*flags*/ CAM_DIR_IN, 966 /*mmc_opcode*/ SD_SWITCH_FUNC, 967 /*mmc_arg*/ mode << 31, 968 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC, 969 /*mmc_data*/ &mmc_d, 970 /*timeout*/ 0); 971 972 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 973 974 if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP)) { 975 if (ccb->mmcio.cmd.error != 0) { 976 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH, 977 ("%s: MMC command failed", __func__)); 978 return EIO; 979 } 980 return 0; /* Normal return */ 981 } else { 982 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH, 983 ("%s: CAM request failed\n", __func__)); 984 return EIO; 985 } 986 } 987 988 static int 989 mmc_set_timing(struct cam_periph *periph, 990 union ccb *ccb, 991 enum mmc_bus_timing timing) 992 { 993 u_char switch_res[64]; 994 int err; 995 uint8_t value; 996 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 997 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 998 999 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, 1000 ("mmc_set_timing(timing=%d)", timing)); 1001 switch (timing) { 1002 case bus_timing_normal: 1003 value = 0; 1004 break; 1005 case bus_timing_hs: 1006 value = 1; 1007 break; 1008 default: 1009 return (MMC_ERR_INVALID); 1010 } 1011 if (mmcp->card_features & CARD_FEATURE_MMC) { 1012 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL, 1013 EXT_CSD_HS_TIMING, value, softc->cmd6_time); 1014 } else { 1015 err = mmc_sd_switch(periph, ccb, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, value, switch_res); 1016 } 1017 1018 /* Set high-speed timing on the host */ 1019 struct ccb_trans_settings_mmc *cts; 1020 cts = &ccb->cts.proto_specific.mmc; 1021 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1022 ccb->ccb_h.flags = CAM_DIR_NONE; 1023 ccb->ccb_h.retry_count = 0; 1024 ccb->ccb_h.timeout = 100; 1025 ccb->ccb_h.cbfcnp = NULL; 1026 cts->ios.timing = timing; 1027 cts->ios_valid = MMC_BT; 1028 xpt_action(ccb); 1029 1030 return (err); 1031 } 1032 1033 static void 1034 sdda_start_init_task(void *context, int pending) { 1035 union ccb *new_ccb; 1036 struct cam_periph *periph; 1037 1038 periph = (struct cam_periph *)context; 1039 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init_task\n")); 1040 new_ccb = xpt_alloc_ccb(); 1041 xpt_setup_ccb(&new_ccb->ccb_h, periph->path, 1042 CAM_PRIORITY_NONE); 1043 1044 cam_periph_lock(periph); 1045 sdda_start_init(context, new_ccb); 1046 cam_periph_unlock(periph); 1047 xpt_free_ccb(new_ccb); 1048 } 1049 1050 static void 1051 sdda_set_bus_width(struct cam_periph *periph, union ccb *ccb, int width) { 1052 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1053 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1054 int err; 1055 1056 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_set_bus_width\n")); 1057 1058 /* First set for the card, then for the host */ 1059 if (mmcp->card_features & CARD_FEATURE_MMC) { 1060 uint8_t value; 1061 switch (width) { 1062 case bus_width_1: 1063 value = EXT_CSD_BUS_WIDTH_1; 1064 break; 1065 case bus_width_4: 1066 value = EXT_CSD_BUS_WIDTH_4; 1067 break; 1068 case bus_width_8: 1069 value = EXT_CSD_BUS_WIDTH_8; 1070 break; 1071 default: 1072 panic("Invalid bus width %d", width); 1073 } 1074 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL, 1075 EXT_CSD_BUS_WIDTH, value, softc->cmd6_time); 1076 } else { 1077 /* For SD cards we send ACMD6 with the required bus width in arg */ 1078 struct mmc_command cmd; 1079 memset(&cmd, 0, sizeof(struct mmc_command)); 1080 cmd.opcode = ACMD_SET_BUS_WIDTH; 1081 cmd.arg = width; 1082 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1083 err = mmc_exec_app_cmd(periph, ccb, &cmd); 1084 } 1085 1086 if (err != MMC_ERR_NONE) { 1087 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Error %d when setting bus width on the card\n", err)); 1088 return; 1089 } 1090 /* Now card is done, set the host to the same width */ 1091 struct ccb_trans_settings_mmc *cts; 1092 cts = &ccb->cts.proto_specific.mmc; 1093 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1094 ccb->ccb_h.flags = CAM_DIR_NONE; 1095 ccb->ccb_h.retry_count = 0; 1096 ccb->ccb_h.timeout = 100; 1097 ccb->ccb_h.cbfcnp = NULL; 1098 cts->ios.bus_width = width; 1099 cts->ios_valid = MMC_BW; 1100 xpt_action(ccb); 1101 } 1102 1103 static inline const char 1104 *part_type(u_int type) 1105 { 1106 1107 switch (type) { 1108 case EXT_CSD_PART_CONFIG_ACC_RPMB: 1109 return ("RPMB"); 1110 case EXT_CSD_PART_CONFIG_ACC_DEFAULT: 1111 return ("default"); 1112 case EXT_CSD_PART_CONFIG_ACC_BOOT0: 1113 return ("boot0"); 1114 case EXT_CSD_PART_CONFIG_ACC_BOOT1: 1115 return ("boot1"); 1116 case EXT_CSD_PART_CONFIG_ACC_GP0: 1117 case EXT_CSD_PART_CONFIG_ACC_GP1: 1118 case EXT_CSD_PART_CONFIG_ACC_GP2: 1119 case EXT_CSD_PART_CONFIG_ACC_GP3: 1120 return ("general purpose"); 1121 default: 1122 return ("(unknown type)"); 1123 } 1124 } 1125 1126 static inline const char 1127 *bus_width_str(enum mmc_bus_width w) 1128 { 1129 1130 switch (w) { 1131 case bus_width_1: 1132 return ("1-bit"); 1133 case bus_width_4: 1134 return ("4-bit"); 1135 case bus_width_8: 1136 return ("8-bit"); 1137 } 1138 } 1139 1140 static uint32_t 1141 sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb) 1142 { 1143 struct ccb_trans_settings_mmc *cts; 1144 1145 cts = &ccb->cts.proto_specific.mmc; 1146 1147 ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1148 ccb->ccb_h.flags = CAM_DIR_NONE; 1149 ccb->ccb_h.retry_count = 0; 1150 ccb->ccb_h.timeout = 100; 1151 ccb->ccb_h.cbfcnp = NULL; 1152 xpt_action(ccb); 1153 1154 if (ccb->ccb_h.status != CAM_REQ_CMP) 1155 panic("Cannot get host caps"); 1156 return (cts->host_caps); 1157 } 1158 1159 static void 1160 sdda_start_init(void *context, union ccb *start_ccb) 1161 { 1162 struct cam_periph *periph = (struct cam_periph *)context; 1163 struct ccb_trans_settings_mmc *cts; 1164 uint32_t host_caps; 1165 uint32_t sec_count; 1166 int err; 1167 int host_f_max; 1168 1169 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init\n")); 1170 /* periph was held for us when this task was enqueued */ 1171 if ((periph->flags & CAM_PERIPH_INVALID) != 0) { 1172 cam_periph_release(periph); 1173 return; 1174 } 1175 1176 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1177 //struct ccb_mmcio *mmcio = &start_ccb->mmcio; 1178 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1179 struct cam_ed *device = periph->path->device; 1180 1181 if (mmcp->card_features & CARD_FEATURE_MMC) { 1182 mmc_decode_csd_mmc(mmcp->card_csd, &softc->csd); 1183 mmc_decode_cid_mmc(mmcp->card_cid, &softc->cid); 1184 if (mmc_get_spec_vers(periph) >= 4) { 1185 err = mmc_send_ext_csd(periph, start_ccb, 1186 (uint8_t *)&softc->raw_ext_csd, 1187 sizeof(softc->raw_ext_csd)); 1188 if (err != 0) { 1189 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1190 ("Cannot read EXT_CSD, err %d", err)); 1191 return; 1192 } 1193 } 1194 } else { 1195 mmc_decode_csd_sd(mmcp->card_csd, &softc->csd); 1196 mmc_decode_cid_sd(mmcp->card_cid, &softc->cid); 1197 } 1198 1199 softc->sector_count = softc->csd.capacity / 512; 1200 softc->mediasize = softc->csd.capacity; 1201 softc->cmd6_time = mmc_get_cmd6_timeout(periph); 1202 1203 /* MMC >= 4.x have EXT_CSD that has its own opinion about capacity */ 1204 if (mmc_get_spec_vers(periph) >= 4) { 1205 sec_count = softc->raw_ext_csd[EXT_CSD_SEC_CNT] + 1206 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1207 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1208 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1209 if (sec_count != 0) { 1210 softc->sector_count = sec_count; 1211 softc->mediasize = softc->sector_count * 512; 1212 /* FIXME: there should be a better name for this option...*/ 1213 mmcp->card_features |= CARD_FEATURE_SDHC; 1214 } 1215 1216 } 1217 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1218 ("Capacity: %"PRIu64", sectors: %"PRIu64"\n", 1219 softc->mediasize, 1220 softc->sector_count)); 1221 mmc_format_card_id_string(softc, mmcp); 1222 1223 /* Update info for CAM */ 1224 device->serial_num_len = strlen(softc->card_sn_string); 1225 device->serial_num = (u_int8_t *)malloc((device->serial_num_len + 1), 1226 M_CAMXPT, M_NOWAIT); 1227 strlcpy(device->serial_num, softc->card_sn_string, device->serial_num_len); 1228 1229 device->device_id_len = strlen(softc->card_id_string); 1230 device->device_id = (u_int8_t *)malloc((device->device_id_len + 1), 1231 M_CAMXPT, M_NOWAIT); 1232 strlcpy(device->device_id, softc->card_id_string, device->device_id_len); 1233 1234 strlcpy(mmcp->model, softc->card_id_string, sizeof(mmcp->model)); 1235 1236 /* Set the clock frequency that the card can handle */ 1237 cts = &start_ccb->cts.proto_specific.mmc; 1238 1239 /* First, get the host's max freq */ 1240 start_ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1241 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1242 start_ccb->ccb_h.retry_count = 0; 1243 start_ccb->ccb_h.timeout = 100; 1244 start_ccb->ccb_h.cbfcnp = NULL; 1245 xpt_action(start_ccb); 1246 1247 if (start_ccb->ccb_h.status != CAM_REQ_CMP) 1248 panic("Cannot get max host freq"); 1249 host_f_max = cts->host_f_max; 1250 host_caps = cts->host_caps; 1251 if (cts->ios.bus_width != bus_width_1) 1252 panic("Bus width in ios is not 1-bit"); 1253 1254 /* Now check if the card supports High-speed */ 1255 softc->card_f_max = softc->csd.tran_speed; 1256 1257 if (host_caps & MMC_CAP_HSPEED) { 1258 /* Find out if the card supports High speed timing */ 1259 if (mmcp->card_features & CARD_FEATURE_SD20) { 1260 /* Get and decode SCR */ 1261 uint32_t rawscr; 1262 uint8_t res[64]; 1263 if (mmc_app_get_scr(periph, start_ccb, &rawscr)) { 1264 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Cannot get SCR\n")); 1265 goto finish_hs_tests; 1266 } 1267 mmc_app_decode_scr(&rawscr, &softc->scr); 1268 1269 if ((softc->scr.sda_vsn >= 1) && (softc->csd.ccc & (1<<10))) { 1270 mmc_sd_switch(periph, start_ccb, SD_SWITCH_MODE_CHECK, 1271 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, res); 1272 if (res[13] & 2) { 1273 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS\n")); 1274 softc->card_f_max = SD_HS_MAX; 1275 } 1276 } else { 1277 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Not trying the switch\n")); 1278 goto finish_hs_tests; 1279 } 1280 } 1281 1282 if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) { 1283 if (softc->raw_ext_csd[EXT_CSD_CARD_TYPE] 1284 & EXT_CSD_CARD_TYPE_HS_52) 1285 softc->card_f_max = MMC_TYPE_HS_52_MAX; 1286 else if (softc->raw_ext_csd[EXT_CSD_CARD_TYPE] 1287 & EXT_CSD_CARD_TYPE_HS_26) 1288 softc->card_f_max = MMC_TYPE_HS_26_MAX; 1289 } 1290 } 1291 int f_max; 1292 finish_hs_tests: 1293 f_max = min(host_f_max, softc->card_f_max); 1294 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Set SD freq to %d MHz (min out of host f=%d MHz and card f=%d MHz)\n", f_max / 1000000, host_f_max / 1000000, softc->card_f_max / 1000000)); 1295 1296 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1297 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1298 start_ccb->ccb_h.retry_count = 0; 1299 start_ccb->ccb_h.timeout = 100; 1300 start_ccb->ccb_h.cbfcnp = NULL; 1301 cts->ios.clock = f_max; 1302 cts->ios_valid = MMC_CLK; 1303 xpt_action(start_ccb); 1304 1305 /* Set bus width */ 1306 enum mmc_bus_width desired_bus_width = bus_width_1; 1307 enum mmc_bus_width max_host_bus_width = 1308 (host_caps & MMC_CAP_8_BIT_DATA ? bus_width_8 : 1309 host_caps & MMC_CAP_4_BIT_DATA ? bus_width_4 : bus_width_1); 1310 enum mmc_bus_width max_card_bus_width = bus_width_1; 1311 if (mmcp->card_features & CARD_FEATURE_SD20 && 1312 softc->scr.bus_widths & SD_SCR_BUS_WIDTH_4) 1313 max_card_bus_width = bus_width_4; 1314 /* 1315 * Unlike SD, MMC cards don't have any information about supported bus width... 1316 * So we need to perform read/write test to find out the width. 1317 */ 1318 /* TODO: figure out bus width for MMC; use 8-bit for now (to test on BBB) */ 1319 if (mmcp->card_features & CARD_FEATURE_MMC) 1320 max_card_bus_width = bus_width_8; 1321 1322 desired_bus_width = min(max_host_bus_width, max_card_bus_width); 1323 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1324 ("Set bus width to %s (min of host %s and card %s)\n", 1325 bus_width_str(desired_bus_width), 1326 bus_width_str(max_host_bus_width), 1327 bus_width_str(max_card_bus_width))); 1328 sdda_set_bus_width(periph, start_ccb, desired_bus_width); 1329 1330 if (f_max > 25000000) { 1331 err = mmc_set_timing(periph, start_ccb, bus_timing_hs); 1332 if (err != MMC_ERR_NONE) 1333 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("Cannot switch card to high-speed mode")); 1334 } 1335 1336 softc->state = SDDA_STATE_NORMAL; 1337 1338 /* MMC partitions support */ 1339 if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) { 1340 sdda_process_mmc_partitions(periph, start_ccb); 1341 } else if (mmcp->card_features & CARD_FEATURE_SD20) { 1342 /* For SD[HC] cards, just add one partition that is the whole card */ 1343 sdda_add_part(periph, 0, "sdda", 1344 periph->unit_number, 1345 mmc_get_media_size(periph), 1346 sdda_get_read_only(periph, start_ccb)); 1347 softc->part_curr = 0; 1348 } 1349 1350 xpt_announce_periph(periph, softc->card_id_string); 1351 /* 1352 * Add async callbacks for bus reset and bus device reset calls. 1353 * I don't bother checking if this fails as, in most cases, 1354 * the system will function just fine without them and the only 1355 * alternative would be to not attach the device on failure. 1356 */ 1357 xpt_register_async(AC_LOST_DEVICE | AC_GETDEV_CHANGED | 1358 AC_ADVINFO_CHANGED, sddaasync, periph, periph->path); 1359 } 1360 1361 static void 1362 sdda_add_part(struct cam_periph *periph, u_int type, const char *name, 1363 u_int cnt, off_t media_size, bool ro) 1364 { 1365 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1366 struct sdda_part *part; 1367 struct ccb_pathinq cpi; 1368 u_int maxio; 1369 1370 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1371 ("Partition type '%s', size %ju %s\n", 1372 part_type(type), 1373 media_size, 1374 ro ? "(read-only)" : "")); 1375 1376 part = sc->part[type] = malloc(sizeof(*part), M_DEVBUF, 1377 M_WAITOK | M_ZERO); 1378 1379 part->cnt = cnt; 1380 part->type = type; 1381 part->ro = ro; 1382 part->sc = sc; 1383 snprintf(part->name, sizeof(part->name), name, periph->unit_number); 1384 1385 /* 1386 * Due to the nature of RPMB partition it doesn't make much sense 1387 * to add it as a disk. It would be more appropriate to create a 1388 * userland tool to operate on the partition or leverage the existing 1389 * tools from sysutils/mmc-utils. 1390 */ 1391 if (type == EXT_CSD_PART_CONFIG_ACC_RPMB) { 1392 /* TODO: Create device, assign IOCTL handler */ 1393 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1394 ("Don't know what to do with RPMB partitions yet\n")); 1395 return; 1396 } 1397 1398 bioq_init(&part->bio_queue); 1399 1400 bzero(&cpi, sizeof(cpi)); 1401 xpt_setup_ccb(&cpi.ccb_h, periph->path, CAM_PRIORITY_NONE); 1402 cpi.ccb_h.func_code = XPT_PATH_INQ; 1403 xpt_action((union ccb *)&cpi); 1404 1405 /* 1406 * Register this media as a disk 1407 */ 1408 (void)cam_periph_hold(periph, PRIBIO); 1409 cam_periph_unlock(periph); 1410 1411 part->disk = disk_alloc(); 1412 part->disk->d_rotation_rate = DISK_RR_NON_ROTATING; 1413 part->disk->d_devstat = devstat_new_entry(part->name, 1414 cnt, 512, 1415 DEVSTAT_ALL_SUPPORTED, 1416 DEVSTAT_TYPE_DIRECT | XPORT_DEVSTAT_TYPE(cpi.transport), 1417 DEVSTAT_PRIORITY_DISK); 1418 1419 part->disk->d_open = sddaopen; 1420 part->disk->d_close = sddaclose; 1421 part->disk->d_strategy = sddastrategy; 1422 part->disk->d_getattr = sddagetattr; 1423 // sc->disk->d_dump = sddadump; 1424 part->disk->d_gone = sddadiskgonecb; 1425 part->disk->d_name = part->name; 1426 part->disk->d_drv1 = part; 1427 maxio = cpi.maxio; /* Honor max I/O size of SIM */ 1428 if (maxio == 0) 1429 maxio = DFLTPHYS; /* traditional default */ 1430 else if (maxio > MAXPHYS) 1431 maxio = MAXPHYS; /* for safety */ 1432 part->disk->d_maxsize = maxio; 1433 part->disk->d_unit = cnt; 1434 part->disk->d_flags = 0; 1435 strlcpy(part->disk->d_descr, sc->card_id_string, 1436 MIN(sizeof(part->disk->d_descr), sizeof(sc->card_id_string))); 1437 strlcpy(part->disk->d_ident, sc->card_sn_string, 1438 MIN(sizeof(part->disk->d_ident), sizeof(sc->card_sn_string))); 1439 part->disk->d_hba_vendor = cpi.hba_vendor; 1440 part->disk->d_hba_device = cpi.hba_device; 1441 part->disk->d_hba_subvendor = cpi.hba_subvendor; 1442 part->disk->d_hba_subdevice = cpi.hba_subdevice; 1443 1444 part->disk->d_sectorsize = mmc_get_sector_size(periph); 1445 part->disk->d_mediasize = media_size; 1446 part->disk->d_stripesize = 0; 1447 part->disk->d_fwsectors = 0; 1448 part->disk->d_fwheads = 0; 1449 1450 /* 1451 * Acquire a reference to the periph before we register with GEOM. 1452 * We'll release this reference once GEOM calls us back (via 1453 * sddadiskgonecb()) telling us that our provider has been freed. 1454 */ 1455 if (cam_periph_acquire(periph) != 0) { 1456 xpt_print(periph->path, "%s: lost periph during " 1457 "registration!\n", __func__); 1458 cam_periph_lock(periph); 1459 return; 1460 } 1461 disk_create(part->disk, DISK_VERSION); 1462 cam_periph_lock(periph); 1463 cam_periph_unhold(periph); 1464 } 1465 1466 /* 1467 * For MMC cards, process EXT_CSD and add partitions that are supported by 1468 * this device. 1469 */ 1470 static void 1471 sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *ccb) 1472 { 1473 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1474 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1475 off_t erase_size, sector_size, size, wp_size; 1476 int i; 1477 const uint8_t *ext_csd; 1478 uint8_t rev; 1479 bool comp, ro; 1480 1481 ext_csd = sc->raw_ext_csd; 1482 1483 /* 1484 * Enhanced user data area and general purpose partitions are only 1485 * supported in revision 1.4 (EXT_CSD_REV == 4) and later, the RPMB 1486 * partition in revision 1.5 (MMC v4.41, EXT_CSD_REV == 5) and later. 1487 */ 1488 rev = ext_csd[EXT_CSD_REV]; 1489 1490 /* 1491 * Ignore user-creatable enhanced user data area and general purpose 1492 * partitions partitions as long as partitioning hasn't been finished. 1493 */ 1494 comp = (ext_csd[EXT_CSD_PART_SET] & EXT_CSD_PART_SET_COMPLETED) != 0; 1495 1496 /* 1497 * Add enhanced user data area slice, unless it spans the entirety of 1498 * the user data area. The enhanced area is of a multiple of high 1499 * capacity write protect groups ((ERASE_GRP_SIZE + HC_WP_GRP_SIZE) * 1500 * 512 KB) and its offset given in either sectors or bytes, depending 1501 * on whether it's a high capacity device or not. 1502 * NB: The slicer and its slices need to be registered before adding 1503 * the disk for the corresponding user data area as re-tasting is 1504 * racy. 1505 */ 1506 sector_size = mmc_get_sector_size(periph); 1507 size = ext_csd[EXT_CSD_ENH_SIZE_MULT] + 1508 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) + 1509 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16); 1510 if (rev >= 4 && comp == TRUE && size > 0 && 1511 (ext_csd[EXT_CSD_PART_SUPPORT] & 1512 EXT_CSD_PART_SUPPORT_ENH_ATTR_EN) != 0 && 1513 (ext_csd[EXT_CSD_PART_ATTR] & (EXT_CSD_PART_ATTR_ENH_USR)) != 0) { 1514 erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 * 1515 MMC_SECTOR_SIZE; 1516 wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1517 size *= erase_size * wp_size; 1518 if (size != mmc_get_media_size(periph) * sector_size) { 1519 sc->enh_size = size; 1520 sc->enh_base = (ext_csd[EXT_CSD_ENH_START_ADDR] + 1521 (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) + 1522 (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) + 1523 (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24)) * 1524 ((mmcp->card_features & CARD_FEATURE_SDHC) ? 1: MMC_SECTOR_SIZE); 1525 } else 1526 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1527 ("enhanced user data area spans entire device")); 1528 } 1529 1530 /* 1531 * Add default partition. This may be the only one or the user 1532 * data area in case partitions are supported. 1533 */ 1534 ro = sdda_get_read_only(periph, ccb); 1535 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_DEFAULT, "sdda", 1536 periph->unit_number, mmc_get_media_size(periph), ro); 1537 sc->part_curr = EXT_CSD_PART_CONFIG_ACC_DEFAULT; 1538 1539 if (mmc_get_spec_vers(periph) < 3) 1540 return; 1541 1542 /* Belatedly announce enhanced user data slice. */ 1543 if (sc->enh_size != 0) { 1544 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1545 ("enhanced user data area off 0x%jx size %ju bytes\n", 1546 sc->enh_base, sc->enh_size)); 1547 } 1548 1549 /* 1550 * Determine partition switch timeout (provided in units of 10 ms) 1551 * and ensure it's at least 300 ms as some eMMC chips lie. 1552 */ 1553 sc->part_time = max(ext_csd[EXT_CSD_PART_SWITCH_TO] * 10 * 1000, 1554 300 * 1000); 1555 1556 /* Add boot partitions, which are of a fixed multiple of 128 KB. */ 1557 size = ext_csd[EXT_CSD_BOOT_SIZE_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE; 1558 if (size > 0 && (sdda_get_host_caps(periph, ccb) & MMC_CAP_BOOT_NOACC) == 0) { 1559 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT0, 1560 SDDA_FMT_BOOT, 0, size, 1561 ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] & 1562 EXT_CSD_BOOT_WP_STATUS_BOOT0_MASK) != 0)); 1563 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT1, 1564 SDDA_FMT_BOOT, 1, size, 1565 ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] & 1566 EXT_CSD_BOOT_WP_STATUS_BOOT1_MASK) != 0)); 1567 } 1568 1569 /* Add RPMB partition, which also is of a fixed multiple of 128 KB. */ 1570 size = ext_csd[EXT_CSD_RPMB_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE; 1571 if (rev >= 5 && size > 0) 1572 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_RPMB, 1573 SDDA_FMT_RPMB, 0, size, ro); 1574 1575 if (rev <= 3 || comp == FALSE) 1576 return; 1577 1578 /* 1579 * Add general purpose partitions, which are of a multiple of high 1580 * capacity write protect groups, too. 1581 */ 1582 if ((ext_csd[EXT_CSD_PART_SUPPORT] & EXT_CSD_PART_SUPPORT_EN) != 0) { 1583 erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 * 1584 MMC_SECTOR_SIZE; 1585 wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1586 for (i = 0; i < MMC_PART_GP_MAX; i++) { 1587 size = ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3] + 1588 (ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 1] << 8) + 1589 (ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 2] << 16); 1590 if (size == 0) 1591 continue; 1592 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_GP0 + i, 1593 SDDA_FMT_GP, i, size * erase_size * wp_size, ro); 1594 } 1595 } 1596 } 1597 1598 /* 1599 * We cannot just call mmc_switch() since it will sleep, and we are in 1600 * GEOM context and cannot sleep. Instead, create an MMCIO request to switch 1601 * partitions and send it to h/w, and upon completion resume processing 1602 * the I/O queue. 1603 * This function cannot fail, instead check switch errors in sddadone(). 1604 */ 1605 static void 1606 sdda_init_switch_part(struct cam_periph *periph, union ccb *start_ccb, u_int part) { 1607 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1608 uint8_t value; 1609 1610 sc->part_requested = part; 1611 1612 value = (sc->raw_ext_csd[EXT_CSD_PART_CONFIG] & 1613 ~EXT_CSD_PART_CONFIG_ACC_MASK) | part; 1614 1615 mmc_switch_fill_mmcio(start_ccb, EXT_CSD_CMD_SET_NORMAL, 1616 EXT_CSD_PART_CONFIG, value, sc->part_time); 1617 start_ccb->ccb_h.cbfcnp = sddadone; 1618 1619 sc->outstanding_cmds++; 1620 cam_periph_unlock(periph); 1621 xpt_action(start_ccb); 1622 cam_periph_lock(periph); 1623 } 1624 1625 /* Called with periph lock held! */ 1626 static void 1627 sddastart(struct cam_periph *periph, union ccb *start_ccb) 1628 { 1629 struct bio *bp; 1630 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1631 struct sdda_part *part; 1632 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1633 int part_index; 1634 1635 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastart\n")); 1636 1637 if (softc->state != SDDA_STATE_NORMAL) { 1638 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("device is not in SDDA_STATE_NORMAL yet\n")); 1639 xpt_release_ccb(start_ccb); 1640 return; 1641 } 1642 1643 /* Find partition that has outstanding commands. Prefer current partition. */ 1644 part = softc->part[softc->part_curr]; 1645 bp = bioq_first(&part->bio_queue); 1646 if (bp == NULL) { 1647 for (part_index = 0; part_index < MMC_PART_MAX; part_index++) { 1648 if ((part = softc->part[part_index]) != NULL && 1649 (bp = bioq_first(&softc->part[part_index]->bio_queue)) != NULL) 1650 break; 1651 } 1652 } 1653 if (bp == NULL) { 1654 xpt_release_ccb(start_ccb); 1655 return; 1656 } 1657 if (part_index != softc->part_curr) { 1658 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1659 ("Partition %d -> %d\n", softc->part_curr, part_index)); 1660 /* 1661 * According to section "6.2.2 Command restrictions" of the eMMC 1662 * specification v5.1, CMD19/CMD21 aren't allowed to be used with 1663 * RPMB partitions. So we pause re-tuning along with triggering 1664 * it up-front to decrease the likelihood of re-tuning becoming 1665 * necessary while accessing an RPMB partition. Consequently, an 1666 * RPMB partition should immediately be switched away from again 1667 * after an access in order to allow for re-tuning to take place 1668 * anew. 1669 */ 1670 /* TODO: pause retune if switching to RPMB partition */ 1671 softc->state = SDDA_STATE_PART_SWITCH; 1672 sdda_init_switch_part(periph, start_ccb, part_index); 1673 return; 1674 } 1675 1676 bioq_remove(&part->bio_queue, bp); 1677 1678 switch (bp->bio_cmd) { 1679 case BIO_WRITE: 1680 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_WRITE\n")); 1681 part->flags |= SDDA_FLAG_DIRTY; 1682 /* FALLTHROUGH */ 1683 case BIO_READ: 1684 { 1685 struct ccb_mmcio *mmcio; 1686 uint64_t blockno = bp->bio_pblkno; 1687 uint16_t count = bp->bio_bcount / 512; 1688 uint16_t opcode; 1689 1690 if (bp->bio_cmd == BIO_READ) 1691 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_READ\n")); 1692 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, 1693 ("Block %"PRIu64" cnt %u\n", blockno, count)); 1694 1695 /* Construct new MMC command */ 1696 if (bp->bio_cmd == BIO_READ) { 1697 if (count > 1) 1698 opcode = MMC_READ_MULTIPLE_BLOCK; 1699 else 1700 opcode = MMC_READ_SINGLE_BLOCK; 1701 } else { 1702 if (count > 1) 1703 opcode = MMC_WRITE_MULTIPLE_BLOCK; 1704 else 1705 opcode = MMC_WRITE_BLOCK; 1706 } 1707 1708 start_ccb->ccb_h.func_code = XPT_MMC_IO; 1709 start_ccb->ccb_h.flags = (bp->bio_cmd == BIO_READ ? CAM_DIR_IN : CAM_DIR_OUT); 1710 start_ccb->ccb_h.retry_count = 0; 1711 start_ccb->ccb_h.timeout = 15 * 1000; 1712 start_ccb->ccb_h.cbfcnp = sddadone; 1713 1714 mmcio = &start_ccb->mmcio; 1715 mmcio->cmd.opcode = opcode; 1716 mmcio->cmd.arg = blockno; 1717 if (!(mmcp->card_features & CARD_FEATURE_SDHC)) 1718 mmcio->cmd.arg <<= 9; 1719 1720 mmcio->cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1721 mmcio->cmd.data = softc->mmcdata; 1722 mmcio->cmd.data->data = bp->bio_data; 1723 mmcio->cmd.data->len = 512 * count; 1724 mmcio->cmd.data->flags = (bp->bio_cmd == BIO_READ ? MMC_DATA_READ : MMC_DATA_WRITE); 1725 /* Direct h/w to issue CMD12 upon completion */ 1726 if (count > 1) { 1727 mmcio->stop.opcode = MMC_STOP_TRANSMISSION; 1728 mmcio->stop.flags = MMC_RSP_R1B | MMC_CMD_AC; 1729 mmcio->stop.arg = 0; 1730 } 1731 1732 break; 1733 } 1734 case BIO_FLUSH: 1735 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_FLUSH\n")); 1736 sddaschedule(periph); 1737 break; 1738 case BIO_DELETE: 1739 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_DELETE\n")); 1740 sddaschedule(periph); 1741 break; 1742 } 1743 start_ccb->ccb_h.ccb_bp = bp; 1744 softc->outstanding_cmds++; 1745 softc->refcount++; 1746 cam_periph_unlock(periph); 1747 xpt_action(start_ccb); 1748 cam_periph_lock(periph); 1749 1750 /* May have more work to do, so ensure we stay scheduled */ 1751 sddaschedule(periph); 1752 } 1753 1754 static void 1755 sddadone(struct cam_periph *periph, union ccb *done_ccb) 1756 { 1757 struct bio *bp; 1758 struct sdda_softc *softc; 1759 struct ccb_mmcio *mmcio; 1760 struct cam_path *path; 1761 uint32_t card_status; 1762 int error = 0; 1763 1764 softc = (struct sdda_softc *)periph->softc; 1765 mmcio = &done_ccb->mmcio; 1766 path = done_ccb->ccb_h.path; 1767 1768 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddadone\n")); 1769 // cam_periph_lock(periph); 1770 if ((done_ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) { 1771 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("Error!!!\n")); 1772 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0) 1773 cam_release_devq(path, 1774 /*relsim_flags*/0, 1775 /*reduction*/0, 1776 /*timeout*/0, 1777 /*getcount_only*/0); 1778 error = 5; /* EIO */ 1779 } else { 1780 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0) 1781 panic("REQ_CMP with QFRZN"); 1782 error = 0; 1783 } 1784 1785 card_status = mmcio->cmd.resp[0]; 1786 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1787 ("Card status: %08x\n", R1_STATUS(card_status))); 1788 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1789 ("Current state: %d\n", R1_CURRENT_STATE(card_status))); 1790 1791 /* Process result of switching MMC partitions */ 1792 if (softc->state == SDDA_STATE_PART_SWITCH) { 1793 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1794 ("Compteting partition switch to %d\n", softc->part_requested)); 1795 softc->outstanding_cmds--; 1796 /* Complete partition switch */ 1797 softc->state = SDDA_STATE_NORMAL; 1798 if (error != MMC_ERR_NONE) { 1799 /* TODO: Unpause retune if accessing RPMB */ 1800 xpt_release_ccb(done_ccb); 1801 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 1802 return; 1803 } 1804 1805 softc->raw_ext_csd[EXT_CSD_PART_CONFIG] = 1806 (softc->raw_ext_csd[EXT_CSD_PART_CONFIG] & 1807 ~EXT_CSD_PART_CONFIG_ACC_MASK) | softc->part_requested; 1808 /* TODO: Unpause retune if accessing RPMB */ 1809 softc->part_curr = softc->part_requested; 1810 xpt_release_ccb(done_ccb); 1811 1812 /* Return to processing BIO requests */ 1813 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 1814 return; 1815 } 1816 1817 bp = (struct bio *)done_ccb->ccb_h.ccb_bp; 1818 bp->bio_error = error; 1819 if (error != 0) { 1820 bp->bio_resid = bp->bio_bcount; 1821 bp->bio_flags |= BIO_ERROR; 1822 } else { 1823 /* XXX: How many bytes remaining? */ 1824 bp->bio_resid = 0; 1825 if (bp->bio_resid > 0) 1826 bp->bio_flags |= BIO_ERROR; 1827 } 1828 1829 softc->outstanding_cmds--; 1830 xpt_release_ccb(done_ccb); 1831 /* 1832 * Release the periph refcount taken in sddastart() for each CCB. 1833 */ 1834 KASSERT(softc->refcount >= 1, ("sddadone softc %p refcount %d", softc, softc->refcount)); 1835 softc->refcount--; 1836 biodone(bp); 1837 } 1838 1839 static int 1840 sddaerror(union ccb *ccb, u_int32_t cam_flags, u_int32_t sense_flags) 1841 { 1842 return(cam_periph_error(ccb, cam_flags, sense_flags)); 1843 } 1844 #endif /* _KERNEL */ 1845