xref: /freebsd/sys/cam/mmc/mmc_da.c (revision 97cb52fa9aefd90fad38790fded50905aeeb9b9e)
1 /*-
2  * Copyright (c) 2006 Bernd Walter <tisco@FreeBSD.org>
3  * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org>
4  * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org>
5  * Copyright (c) 2015-2017 Ilya Bakulin <kibab@FreeBSD.org>
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer,
13  *    without modification, immediately at the beginning of the file.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  *
29  * Some code derived from the sys/dev/mmc and sys/cam/ata
30  * Thanks to Warner Losh <imp@FreeBSD.org>, Alexander Motin <mav@FreeBSD.org>
31  * Bernd Walter <tisco@FreeBSD.org>, and other authors.
32  */
33 
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
36 
37 //#include "opt_sdda.h"
38 
39 #include <sys/param.h>
40 
41 #ifdef _KERNEL
42 #include <sys/systm.h>
43 #include <sys/kernel.h>
44 #include <sys/bio.h>
45 #include <sys/endian.h>
46 #include <sys/taskqueue.h>
47 #include <sys/lock.h>
48 #include <sys/mutex.h>
49 #include <sys/conf.h>
50 #include <sys/devicestat.h>
51 #include <sys/eventhandler.h>
52 #include <sys/malloc.h>
53 #include <sys/cons.h>
54 #include <sys/proc.h>
55 #include <sys/reboot.h>
56 #include <geom/geom_disk.h>
57 #include <machine/_inttypes.h>  /* for PRIu64 */
58 #endif /* _KERNEL */
59 
60 #ifndef _KERNEL
61 #include <stdio.h>
62 #include <string.h>
63 #endif /* _KERNEL */
64 
65 #include <cam/cam.h>
66 #include <cam/cam_ccb.h>
67 #include <cam/cam_queue.h>
68 #include <cam/cam_periph.h>
69 #include <cam/cam_sim.h>
70 #include <cam/cam_xpt.h>
71 #include <cam/cam_xpt_sim.h>
72 #include <cam/cam_xpt_periph.h>
73 #include <cam/cam_xpt_internal.h>
74 #include <cam/cam_debug.h>
75 
76 
77 #include <cam/mmc/mmc_all.h>
78 
79 #include <machine/md_var.h>	/* geometry translation */
80 
81 #ifdef _KERNEL
82 
83 typedef enum {
84 	SDDA_FLAG_OPEN		= 0x0002,
85 	SDDA_FLAG_DIRTY		= 0x0004
86 } sdda_flags;
87 
88 typedef enum {
89         SDDA_STATE_INIT,
90         SDDA_STATE_INVALID,
91         SDDA_STATE_NORMAL
92 } sdda_state;
93 
94 struct sdda_softc {
95 	struct	 bio_queue_head bio_queue;
96 	int	 outstanding_cmds;	/* Number of active commands */
97 	int	 refcount;		/* Active xpt_action() calls */
98 	sdda_state state;
99 	sdda_flags flags;
100 	struct mmc_data *mmcdata;
101 //	sdda_quirks quirks;
102 	struct task start_init_task;
103 	struct	 disk *disk;
104         uint32_t raw_csd[4];
105 	uint8_t raw_ext_csd[512]; /* MMC only? */
106         struct mmc_csd csd;
107         struct mmc_cid cid;
108 	struct mmc_scr scr;
109         /* Calculated from CSD */
110         uint64_t sector_count;
111         uint64_t mediasize;
112 
113         /* Calculated from CID */
114 	char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */
115 	char card_sn_string[16];/* Formatted serial # for disk->d_ident */
116 	/* Determined from CSD + is highspeed card*/
117 	uint32_t card_f_max;
118 };
119 
120 #define ccb_bp		ppriv_ptr1
121 
122 static	disk_strategy_t	sddastrategy;
123 static	periph_init_t	sddainit;
124 static	void		sddaasync(void *callback_arg, u_int32_t code,
125 				struct cam_path *path, void *arg);
126 static	periph_ctor_t	sddaregister;
127 static	periph_dtor_t	sddacleanup;
128 static	periph_start_t	sddastart;
129 static	periph_oninv_t	sddaoninvalidate;
130 static	void		sddadone(struct cam_periph *periph,
131 			       union ccb *done_ccb);
132 static  int		sddaerror(union ccb *ccb, u_int32_t cam_flags,
133 				u_int32_t sense_flags);
134 
135 static uint16_t get_rca(struct cam_periph *periph);
136 static cam_status sdda_hook_into_geom(struct cam_periph *periph);
137 static void sdda_start_init(void *context, union ccb *start_ccb);
138 static void sdda_start_init_task(void *context, int pending);
139 
140 static struct periph_driver sddadriver =
141 {
142 	sddainit, "sdda",
143 	TAILQ_HEAD_INITIALIZER(sddadriver.units), /* generation */ 0
144 };
145 
146 PERIPHDRIVER_DECLARE(sdda, sddadriver);
147 
148 static MALLOC_DEFINE(M_SDDA, "sd_da", "sd_da buffers");
149 
150 static const int exp[8] = {
151 	1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
152 };
153 
154 static const int mant[16] = {
155 	0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
156 };
157 
158 static const int cur_min[8] = {
159 	500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
160 };
161 
162 static const int cur_max[8] = {
163 	1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
164 };
165 
166 static uint16_t
167 get_rca(struct cam_periph *periph) {
168 	return periph->path->device->mmc_ident_data.card_rca;
169 }
170 
171 static uint32_t
172 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
173 {
174 	const int i = (bit_len / 32) - (start / 32) - 1;
175 	const int shift = start & 31;
176 	uint32_t retval = bits[i] >> shift;
177 	if (size + shift > 32)
178 		retval |= bits[i - 1] << (32 - shift);
179 	return (retval & ((1llu << size) - 1));
180 }
181 
182 
183 static void
184 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
185 {
186 	int v;
187 	int m;
188 	int e;
189 
190 	memset(csd, 0, sizeof(*csd));
191 	csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
192 	if (v == 0) {
193 		m = mmc_get_bits(raw_csd, 128, 115, 4);
194 		e = mmc_get_bits(raw_csd, 128, 112, 3);
195 		csd->tacc = (exp[e] * mant[m] + 9) / 10;
196 		csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
197 		m = mmc_get_bits(raw_csd, 128, 99, 4);
198 		e = mmc_get_bits(raw_csd, 128, 96, 3);
199 		csd->tran_speed = exp[e] * 10000 * mant[m];
200 		csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
201 		csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
202 		csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
203 		csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
204 		csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
205 		csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
206 		csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
207 		csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
208 		csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
209 		csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
210 		m = mmc_get_bits(raw_csd, 128, 62, 12);
211 		e = mmc_get_bits(raw_csd, 128, 47, 3);
212 		csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
213 		csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
214 		csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
215 		csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
216 		csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
217 		csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
218 		csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
219 		csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
220 	} else if (v == 1) {
221 		m = mmc_get_bits(raw_csd, 128, 115, 4);
222 		e = mmc_get_bits(raw_csd, 128, 112, 3);
223 		csd->tacc = (exp[e] * mant[m] + 9) / 10;
224 		csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
225 		m = mmc_get_bits(raw_csd, 128, 99, 4);
226 		e = mmc_get_bits(raw_csd, 128, 96, 3);
227 		csd->tran_speed = exp[e] * 10000 * mant[m];
228 		csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
229 		csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
230 		csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
231 		csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
232 		csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
233 		csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
234 		csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) *
235 		    512 * 1024;
236 		csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
237 		csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
238 		csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
239 		csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
240 		csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
241 		csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
242 		csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
243 	} else
244 		panic("unknown SD CSD version");
245 }
246 
247 static void
248 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
249 {
250 	int m;
251 	int e;
252 
253 	memset(csd, 0, sizeof(*csd));
254 	csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
255 	csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
256 	m = mmc_get_bits(raw_csd, 128, 115, 4);
257 	e = mmc_get_bits(raw_csd, 128, 112, 3);
258 	csd->tacc = exp[e] * mant[m] + 9 / 10;
259 	csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
260 	m = mmc_get_bits(raw_csd, 128, 99, 4);
261 	e = mmc_get_bits(raw_csd, 128, 96, 3);
262 	csd->tran_speed = exp[e] * 10000 * mant[m];
263 	csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
264 	csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
265 	csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
266 	csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
267 	csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
268 	csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
269 	csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
270 	csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
271 	csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
272 	csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
273 	m = mmc_get_bits(raw_csd, 128, 62, 12);
274 	e = mmc_get_bits(raw_csd, 128, 47, 3);
275 	csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
276 	csd->erase_blk_en = 0;
277 	csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
278 	    (mmc_get_bits(raw_csd, 128, 37, 5) + 1);
279 	csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
280 	csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
281 	csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
282 	csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
283 	csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
284 }
285 
286 static void
287 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
288 {
289 	int i;
290 
291 	/* There's no version info, so we take it on faith */
292 	memset(cid, 0, sizeof(*cid));
293 	cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
294 	cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
295 	for (i = 0; i < 5; i++)
296 		cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
297 	cid->pnm[5] = 0;
298 	cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
299 	cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
300 	cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
301 	cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
302 }
303 
304 static void
305 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid)
306 {
307 	int i;
308 
309 	/* There's no version info, so we take it on faith */
310 	memset(cid, 0, sizeof(*cid));
311 	cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
312 	cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
313 	for (i = 0; i < 6; i++)
314 		cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
315 	cid->pnm[6] = 0;
316 	cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
317 	cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
318 	cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
319 	cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997;
320 }
321 
322 static void
323 mmc_format_card_id_string(struct sdda_softc *sc, struct mmc_params *mmcp)
324 {
325 	char oidstr[8];
326 	uint8_t c1;
327 	uint8_t c2;
328 
329 	/*
330 	 * Format a card ID string for use by the mmcsd driver, it's what
331 	 * appears between the <> in the following:
332 	 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0
333 	 * 22.5MHz/4bit/128-block
334 	 *
335 	 * Also format just the card serial number, which the mmcsd driver will
336 	 * use as the disk->d_ident string.
337 	 *
338 	 * The card_id_string in mmc_ivars is currently allocated as 64 bytes,
339 	 * and our max formatted length is currently 55 bytes if every field
340 	 * contains the largest value.
341 	 *
342 	 * Sometimes the oid is two printable ascii chars; when it's not,
343 	 * format it as 0xnnnn instead.
344 	 */
345 	c1 = (sc->cid.oid >> 8) & 0x0ff;
346 	c2 = sc->cid.oid & 0x0ff;
347 	if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f)
348 		snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2);
349 	else
350 		snprintf(oidstr, sizeof(oidstr), "0x%04x", sc->cid.oid);
351 	snprintf(sc->card_sn_string, sizeof(sc->card_sn_string),
352 	    "%08X", sc->cid.psn);
353 	snprintf(sc->card_id_string, sizeof(sc->card_id_string),
354                  "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s",
355                  mmcp->card_features & CARD_FEATURE_MMC ? "MMC" : "SD",
356                  mmcp->card_features & CARD_FEATURE_SDHC ? "HC" : "",
357                  sc->cid.pnm, sc->cid.prv >> 4, sc->cid.prv & 0x0f,
358                  sc->cid.psn, sc->cid.mdt_month, sc->cid.mdt_year,
359                  sc->cid.mid, oidstr);
360 }
361 
362 static int
363 sddaopen(struct disk *dp)
364 {
365 	struct cam_periph *periph;
366 	struct sdda_softc *softc;
367 	int error;
368 
369 	periph = (struct cam_periph *)dp->d_drv1;
370 	if (cam_periph_acquire(periph) != CAM_REQ_CMP) {
371 		return(ENXIO);
372 	}
373 
374 	cam_periph_lock(periph);
375 	if ((error = cam_periph_hold(periph, PRIBIO|PCATCH)) != 0) {
376 		cam_periph_unlock(periph);
377 		cam_periph_release(periph);
378 		return (error);
379 	}
380 
381 	CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaopen\n"));
382 
383 	softc = (struct sdda_softc *)periph->softc;
384 	softc->flags |= SDDA_FLAG_OPEN;
385 
386 	cam_periph_unhold(periph);
387 	cam_periph_unlock(periph);
388 	return (0);
389 }
390 
391 static int
392 sddaclose(struct disk *dp)
393 {
394 	struct	cam_periph *periph;
395 	struct	sdda_softc *softc;
396 //	union ccb *ccb;
397 //	int error;
398 
399 	periph = (struct cam_periph *)dp->d_drv1;
400 	softc = (struct sdda_softc *)periph->softc;
401         softc->flags &= ~SDDA_FLAG_OPEN;
402 
403 	cam_periph_lock(periph);
404 
405 	CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaclose\n"));
406 
407 	while (softc->refcount != 0)
408 		cam_periph_sleep(periph, &softc->refcount, PRIBIO, "sddaclose", 1);
409 	cam_periph_unlock(periph);
410 	cam_periph_release(periph);
411 	return (0);
412 }
413 
414 static void
415 sddaschedule(struct cam_periph *periph)
416 {
417 	struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
418 
419 	/* Check if we have more work to do. */
420 	if (bioq_first(&softc->bio_queue)) {
421 		xpt_schedule(periph, CAM_PRIORITY_NORMAL);
422 	}
423 }
424 
425 /*
426  * Actually translate the requested transfer into one the physical driver
427  * can understand.  The transfer is described by a buf and will include
428  * only one physical transfer.
429  */
430 static void
431 sddastrategy(struct bio *bp)
432 {
433 	struct cam_periph *periph;
434 	struct sdda_softc *softc;
435 
436 	periph = (struct cam_periph *)bp->bio_disk->d_drv1;
437 	softc = (struct sdda_softc *)periph->softc;
438 
439 	cam_periph_lock(periph);
440 
441 	CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastrategy(%p)\n", bp));
442 
443 	/*
444 	 * If the device has been made invalid, error out
445 	 */
446 	if ((periph->flags & CAM_PERIPH_INVALID) != 0) {
447 		cam_periph_unlock(periph);
448 		biofinish(bp, NULL, ENXIO);
449 		return;
450 	}
451 
452 	/*
453 	 * Place it in the queue of disk activities for this disk
454 	 */
455         bioq_disksort(&softc->bio_queue, bp);
456 
457 	/*
458 	 * Schedule ourselves for performing the work.
459 	 */
460 	sddaschedule(periph);
461 	cam_periph_unlock(periph);
462 
463 	return;
464 }
465 
466 static void
467 sddainit(void)
468 {
469 	cam_status status;
470 
471 	/*
472 	 * Install a global async callback.  This callback will
473 	 * receive async callbacks like "new device found".
474 	 */
475 	status = xpt_register_async(AC_FOUND_DEVICE, sddaasync, NULL, NULL);
476 
477 	if (status != CAM_REQ_CMP) {
478 		printf("sdda: Failed to attach master async callback "
479 		       "due to status 0x%x!\n", status);
480 	}
481 }
482 
483 /*
484  * Callback from GEOM, called when it has finished cleaning up its
485  * resources.
486  */
487 static void
488 sddadiskgonecb(struct disk *dp)
489 {
490 	struct cam_periph *periph;
491 
492 	periph = (struct cam_periph *)dp->d_drv1;
493         CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddadiskgonecb\n"));
494 
495 	cam_periph_release(periph);
496 }
497 
498 static void
499 sddaoninvalidate(struct cam_periph *periph)
500 {
501 	struct sdda_softc *softc;
502 
503 	softc = (struct sdda_softc *)periph->softc;
504 
505         CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaoninvalidate\n"));
506 
507 	/*
508 	 * De-register any async callbacks.
509 	 */
510 	xpt_register_async(0, sddaasync, periph, periph->path);
511 
512 	/*
513 	 * Return all queued I/O with ENXIO.
514 	 * XXX Handle any transactions queued to the card
515 	 *     with XPT_ABORT_CCB.
516 	 */
517         CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush start\n"));
518 	bioq_flush(&softc->bio_queue, NULL, ENXIO);
519         CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush end\n"));
520 
521 	disk_gone(softc->disk);
522 }
523 
524 static void
525 sddacleanup(struct cam_periph *periph)
526 {
527 	struct sdda_softc *softc;
528 
529 	CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddacleanup\n"));
530 	softc = (struct sdda_softc *)periph->softc;
531 
532 	cam_periph_unlock(periph);
533 
534 	disk_destroy(softc->disk);
535 	free(softc, M_DEVBUF);
536 	cam_periph_lock(periph);
537 }
538 
539 static void
540 sddaasync(void *callback_arg, u_int32_t code,
541 	struct cam_path *path, void *arg)
542 {
543 	struct ccb_getdev cgd;
544 	struct cam_periph *periph;
545 	struct sdda_softc *softc;
546 
547 	periph = (struct cam_periph *)callback_arg;
548         CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddaasync(code=%d)\n", code));
549 	switch (code) {
550 	case AC_FOUND_DEVICE:
551 	{
552                 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_FOUND_DEVICE\n"));
553 		struct ccb_getdev *cgd;
554 		cam_status status;
555 
556 		cgd = (struct ccb_getdev *)arg;
557 		if (cgd == NULL)
558 			break;
559 
560 		if (cgd->protocol != PROTO_MMCSD)
561 			break;
562 
563                 if (!(path->device->mmc_ident_data.card_features & CARD_FEATURE_MEMORY)) {
564                         CAM_DEBUG(path, CAM_DEBUG_TRACE, ("No memory on the card!\n"));
565                         break;
566                 }
567 
568 		/*
569 		 * Allocate a peripheral instance for
570 		 * this device and start the probe
571 		 * process.
572 		 */
573 		status = cam_periph_alloc(sddaregister, sddaoninvalidate,
574 					  sddacleanup, sddastart,
575 					  "sdda", CAM_PERIPH_BIO,
576 					  path, sddaasync,
577 					  AC_FOUND_DEVICE, cgd);
578 
579 		if (status != CAM_REQ_CMP
580 		 && status != CAM_REQ_INPROG)
581 			printf("sddaasync: Unable to attach to new device "
582 				"due to status 0x%x\n", status);
583 		break;
584 	}
585 	case AC_GETDEV_CHANGED:
586 	{
587 		CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_GETDEV_CHANGED\n"));
588 		softc = (struct sdda_softc *)periph->softc;
589 		xpt_setup_ccb(&cgd.ccb_h, periph->path, CAM_PRIORITY_NORMAL);
590 		cgd.ccb_h.func_code = XPT_GDEV_TYPE;
591 		xpt_action((union ccb *)&cgd);
592 		cam_periph_async(periph, code, path, arg);
593 		break;
594 	}
595 	case AC_ADVINFO_CHANGED:
596 	{
597 		uintptr_t buftype;
598 		CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_ADVINFO_CHANGED\n"));
599 		buftype = (uintptr_t)arg;
600 		if (buftype == CDAI_TYPE_PHYS_PATH) {
601 			struct sdda_softc *softc;
602 
603 			softc = periph->softc;
604 			disk_attr_changed(softc->disk, "GEOM::physpath",
605 					  M_NOWAIT);
606 		}
607 		break;
608 	}
609 	case AC_SENT_BDR:
610 	case AC_BUS_RESET:
611 	{
612 		CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("AC_BUS_RESET"));
613 	}
614 	default:
615 		CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> default?!\n"));
616 		cam_periph_async(periph, code, path, arg);
617 		break;
618 	}
619 }
620 
621 
622 static int
623 sddagetattr(struct bio *bp)
624 {
625 	int ret;
626 	struct cam_periph *periph;
627 
628 	periph = (struct cam_periph *)bp->bio_disk->d_drv1;
629 	cam_periph_lock(periph);
630 	ret = xpt_getattr(bp->bio_data, bp->bio_length, bp->bio_attribute,
631 	    periph->path);
632 	cam_periph_unlock(periph);
633 	if (ret == 0)
634 		bp->bio_completed = bp->bio_length;
635 	return ret;
636 }
637 
638 static cam_status
639 sddaregister(struct cam_periph *periph, void *arg)
640 {
641 	struct sdda_softc *softc;
642 //	struct ccb_pathinq cpi;
643 	struct ccb_getdev *cgd;
644 //	char   announce_buf[80], buf1[32];
645 //	caddr_t match;
646 	union ccb *request_ccb;	/* CCB representing the probe request */
647 
648         CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaregister\n"));
649 	cgd = (struct ccb_getdev *)arg;
650 	if (cgd == NULL) {
651 		printf("sddaregister: no getdev CCB, can't register device\n");
652 		return(CAM_REQ_CMP_ERR);
653 	}
654 
655 	softc = (struct sdda_softc *)malloc(sizeof(*softc), M_DEVBUF,
656 	    M_NOWAIT|M_ZERO);
657 
658 	if (softc == NULL) {
659 		printf("sddaregister: Unable to probe new device. "
660 		    "Unable to allocate softc\n");
661 		return(CAM_REQ_CMP_ERR);
662 	}
663 
664 	bioq_init(&softc->bio_queue);
665 	softc->state = SDDA_STATE_INIT;
666 	softc->mmcdata =
667 		(struct mmc_data *) malloc(sizeof(struct mmc_data), M_DEVBUF, M_NOWAIT|M_ZERO);
668 	periph->softc = softc;
669 
670 	request_ccb = (union ccb*) arg;
671 	xpt_schedule(periph, CAM_PRIORITY_XPT);
672 	TASK_INIT(&softc->start_init_task, 0, sdda_start_init_task, periph);
673 	taskqueue_enqueue(taskqueue_thread, &softc->start_init_task);
674 
675 	return (CAM_REQ_CMP);
676 }
677 
678 static cam_status
679 sdda_hook_into_geom(struct cam_periph *periph)
680 {
681 	struct sdda_softc *softc;
682 	struct ccb_pathinq cpi;
683 	struct ccb_getdev cgd;
684 	u_int maxio;
685 
686 	softc = (struct sdda_softc*) periph->softc;
687 
688 	xpt_path_inq(&cpi, periph->path);
689 
690 	bzero(&cgd, sizeof(cgd));
691 	xpt_setup_ccb(&cgd.ccb_h, periph->path, CAM_PRIORITY_NONE);
692 	cpi.ccb_h.func_code = XPT_GDEV_TYPE;
693 	xpt_action((union ccb *)&cgd);
694 
695 	/*
696 	 * Register this media as a disk
697 	 */
698 	(void)cam_periph_hold(periph, PRIBIO);
699 	cam_periph_unlock(periph);
700 
701 	softc->disk = disk_alloc();
702 	softc->disk->d_rotation_rate = 0;
703 	softc->disk->d_devstat = devstat_new_entry(periph->periph_name,
704 			  periph->unit_number, 512,
705 			  DEVSTAT_ALL_SUPPORTED,
706 			  DEVSTAT_TYPE_DIRECT |
707 			  XPORT_DEVSTAT_TYPE(cpi.transport),
708 			  DEVSTAT_PRIORITY_DISK);
709 	softc->disk->d_open = sddaopen;
710 	softc->disk->d_close = sddaclose;
711 	softc->disk->d_strategy = sddastrategy;
712 	softc->disk->d_getattr = sddagetattr;
713 //	softc->disk->d_dump = sddadump;
714 	softc->disk->d_gone = sddadiskgonecb;
715 	softc->disk->d_name = "sdda";
716 	softc->disk->d_drv1 = periph;
717 	maxio = cpi.maxio;		/* Honor max I/O size of SIM */
718 	if (maxio == 0)
719 		maxio = DFLTPHYS;	/* traditional default */
720 	else if (maxio > MAXPHYS)
721 		maxio = MAXPHYS;	/* for safety */
722 	softc->disk->d_maxsize = maxio;
723 	softc->disk->d_unit = periph->unit_number;
724 	softc->disk->d_flags = DISKFLAG_CANDELETE;
725 	strlcpy(softc->disk->d_descr, softc->card_id_string,
726 	    MIN(sizeof(softc->disk->d_descr), sizeof(softc->card_id_string)));
727 	strlcpy(softc->disk->d_ident, softc->card_sn_string,
728 	    MIN(sizeof(softc->disk->d_ident), sizeof(softc->card_sn_string)));
729 	softc->disk->d_hba_vendor = cpi.hba_vendor;
730 	softc->disk->d_hba_device = cpi.hba_device;
731 	softc->disk->d_hba_subvendor = cpi.hba_subvendor;
732 	softc->disk->d_hba_subdevice = cpi.hba_subdevice;
733 
734 	softc->disk->d_sectorsize = 512;
735 	softc->disk->d_mediasize = softc->mediasize;
736 	softc->disk->d_stripesize = 0;
737 	softc->disk->d_fwsectors = 0;
738 	softc->disk->d_fwheads = 0;
739 
740 	/*
741 	 * Acquire a reference to the periph before we register with GEOM.
742 	 * We'll release this reference once GEOM calls us back (via
743 	 * sddadiskgonecb()) telling us that our provider has been freed.
744 	 */
745 	if (cam_periph_acquire(periph) != CAM_REQ_CMP) {
746 		xpt_print(periph->path, "%s: lost periph during "
747 			  "registration!\n", __func__);
748 		cam_periph_lock(periph);
749 		return (CAM_REQ_CMP_ERR);
750 	}
751 	disk_create(softc->disk, DISK_VERSION);
752 	cam_periph_lock(periph);
753 	cam_periph_unhold(periph);
754 
755 	xpt_announce_periph(periph, softc->card_id_string);
756 
757 	/*
758 	 * Add async callbacks for bus reset and
759 	 * bus device reset calls.  I don't bother
760 	 * checking if this fails as, in most cases,
761 	 * the system will function just fine without
762 	 * them and the only alternative would be to
763 	 * not attach the device on failure.
764 	 */
765 	xpt_register_async(AC_SENT_BDR | AC_BUS_RESET | AC_LOST_DEVICE |
766 	    AC_GETDEV_CHANGED | AC_ADVINFO_CHANGED,
767 	    sddaasync, periph, periph->path);
768 
769 	return(CAM_REQ_CMP);
770 }
771 
772 static int
773 mmc_exec_app_cmd(struct cam_periph *periph, union ccb *ccb,
774 	struct mmc_command *cmd) {
775 	int err;
776 
777 	/* Send APP_CMD first */
778 	memset(&ccb->mmcio.cmd, 0, sizeof(struct mmc_command));
779 	memset(&ccb->mmcio.stop, 0, sizeof(struct mmc_command));
780 	cam_fill_mmcio(&ccb->mmcio,
781 		       /*retries*/ 0,
782 		       /*cbfcnp*/ NULL,
783 		       /*flags*/ CAM_DIR_NONE,
784 		       /*mmc_opcode*/ MMC_APP_CMD,
785 		       /*mmc_arg*/ get_rca(periph) << 16,
786 		       /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_AC,
787 		       /*mmc_data*/ NULL,
788 		       /*timeout*/ 0);
789 
790 	err = cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
791 	if (err != 0)
792 		return err;
793 	if (!(ccb->mmcio.cmd.resp[0] & R1_APP_CMD))
794 		return MMC_ERR_FAILED;
795 
796 	/* Now exec actual command */
797 	int flags = 0;
798 	if (cmd->data != NULL) {
799 		ccb->mmcio.cmd.data = cmd->data;
800 		if (cmd->data->flags & MMC_DATA_READ)
801 			flags |= CAM_DIR_IN;
802 		if (cmd->data->flags & MMC_DATA_WRITE)
803 			flags |= CAM_DIR_OUT;
804 	} else flags = CAM_DIR_NONE;
805 
806 	cam_fill_mmcio(&ccb->mmcio,
807 		       /*retries*/ 0,
808 		       /*cbfcnp*/ NULL,
809 		       /*flags*/ flags,
810 		       /*mmc_opcode*/ cmd->opcode,
811 		       /*mmc_arg*/ cmd->arg,
812 		       /*mmc_flags*/ cmd->flags,
813 		       /*mmc_data*/ cmd->data,
814 		       /*timeout*/ 0);
815 
816 	err = cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
817 	memcpy(cmd->resp, ccb->mmcio.cmd.resp, sizeof(cmd->resp));
818 	cmd->error = ccb->mmcio.cmd.error;
819 	if (err != 0)
820 		return err;
821 	return 0;
822 }
823 
824 static int
825 mmc_app_get_scr(struct cam_periph *periph, union ccb *ccb, uint32_t *rawscr) {
826 	int err;
827 	struct mmc_command cmd;
828 	struct mmc_data d;
829 
830 	memset(&cmd, 0, sizeof(cmd));
831 
832 	memset(rawscr, 0, 8);
833 	cmd.opcode = ACMD_SEND_SCR;
834 	cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
835 	cmd.arg = 0;
836 
837 	d.data = rawscr;
838 	d.len = 8;
839 	d.flags = MMC_DATA_READ;
840 	cmd.data = &d;
841 
842 	err = mmc_exec_app_cmd(periph, ccb, &cmd);
843 	rawscr[0] = be32toh(rawscr[0]);
844 	rawscr[1] = be32toh(rawscr[1]);
845 	return (err);
846 }
847 
848 static int
849 mmc_send_ext_csd(struct cam_periph *periph, union ccb *ccb,
850 		 uint8_t *rawextcsd, size_t buf_len) {
851 	int err;
852 	struct mmc_data d;
853 
854 	KASSERT(buf_len == 512, ("Buffer for ext csd must be 512 bytes"));
855 	d.data = rawextcsd;
856 	d.len = buf_len;
857 	d.flags = MMC_DATA_READ;
858 	memset(d.data, 0, d.len);
859 
860 	cam_fill_mmcio(&ccb->mmcio,
861 		       /*retries*/ 0,
862 		       /*cbfcnp*/ NULL,
863 		       /*flags*/ CAM_DIR_IN,
864 		       /*mmc_opcode*/ MMC_SEND_EXT_CSD,
865 		       /*mmc_arg*/ 0,
866 		       /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC,
867 		       /*mmc_data*/ &d,
868 		       /*timeout*/ 0);
869 
870 	err = cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
871 	if (err != 0)
872 		return err;
873 	if (!(ccb->mmcio.cmd.resp[0] & R1_APP_CMD))
874 		return MMC_ERR_FAILED;
875 
876 	return MMC_ERR_NONE;
877 }
878 
879 static void
880 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
881 {
882 	unsigned int scr_struct;
883 
884 	memset(scr, 0, sizeof(*scr));
885 
886 	scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
887 	if (scr_struct != 0) {
888 		printf("Unrecognised SCR structure version %d\n",
889 		    scr_struct);
890 		return;
891 	}
892 	scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
893 	scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
894 }
895 
896 static int
897 mmc_switch(struct cam_periph *periph, union ccb *ccb,
898 	   uint8_t set, uint8_t index, uint8_t value)
899 {
900 	int arg = (MMC_SWITCH_FUNC_WR << 24) |
901 	    (index << 16) |
902 	    (value << 8) |
903 	    set;
904 	cam_fill_mmcio(&ccb->mmcio,
905 		       /*retries*/ 0,
906 		       /*cbfcnp*/ NULL,
907 		       /*flags*/ CAM_DIR_NONE,
908 		       /*mmc_opcode*/ MMC_SWITCH_FUNC,
909 		       /*mmc_arg*/ arg,
910 		       /*mmc_flags*/ MMC_RSP_R1B | MMC_CMD_AC,
911 		       /*mmc_data*/ NULL,
912 		       /*timeout*/ 0);
913 
914 	cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
915 
916 	if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP)) {
917 		if (ccb->mmcio.cmd.error != 0) {
918 			CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH,
919 				  ("%s: MMC command failed", __func__));
920 			return EIO;
921 		}
922 		return 0; /* Normal return */
923 	} else {
924 		CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH,
925 			  ("%s: CAM request failed\n", __func__));
926 		return EIO;
927 	}
928 
929 }
930 
931 static int
932 mmc_sd_switch(struct cam_periph *periph, union ccb *ccb,
933 	      uint8_t mode, uint8_t grp, uint8_t value,
934 	      uint8_t *res) {
935 
936 	struct mmc_data mmc_d;
937 
938 	memset(res, 0, 64);
939 	mmc_d.len = 64;
940 	mmc_d.data = res;
941 	mmc_d.flags = MMC_DATA_READ;
942 
943 	cam_fill_mmcio(&ccb->mmcio,
944 		       /*retries*/ 0,
945 		       /*cbfcnp*/ NULL,
946 		       /*flags*/ CAM_DIR_IN,
947 		       /*mmc_opcode*/ SD_SWITCH_FUNC,
948 		       /*mmc_arg*/ mode << 31,
949 		       /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC,
950 		       /*mmc_data*/ &mmc_d,
951 		       /*timeout*/ 0);
952 
953 	cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
954 
955 	if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP)) {
956 		if (ccb->mmcio.cmd.error != 0) {
957 			CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH,
958 				  ("%s: MMC command failed", __func__));
959 			return EIO;
960 		}
961 		return 0; /* Normal return */
962 	} else {
963 		CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_PERIPH,
964 			  ("%s: CAM request failed\n", __func__));
965 		return EIO;
966 	}
967 }
968 
969 static int
970 mmc_set_timing(struct cam_periph *periph,
971 	       union ccb *ccb,
972 	       enum mmc_bus_timing timing)
973 {
974 	u_char switch_res[64];
975 	int err;
976 	uint8_t	value;
977 	struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
978 
979 	CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE,
980 		  ("mmc_set_timing(timing=%d)", timing));
981 	switch (timing) {
982 	case bus_timing_normal:
983 		value = 0;
984 		break;
985 	case bus_timing_hs:
986 		value = 1;
987 		break;
988 	default:
989 		return (MMC_ERR_INVALID);
990 	}
991 	if (mmcp->card_features & CARD_FEATURE_MMC) {
992 		err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL,
993 				 EXT_CSD_HS_TIMING, value);
994 	} else {
995 		err = mmc_sd_switch(periph, ccb, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, value, switch_res);
996 	}
997 
998 	/* Set high-speed timing on the host */
999 	struct ccb_trans_settings_mmc *cts;
1000 	cts = &ccb->cts.proto_specific.mmc;
1001 	ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1002 	ccb->ccb_h.flags = CAM_DIR_NONE;
1003 	ccb->ccb_h.retry_count = 0;
1004 	ccb->ccb_h.timeout = 100;
1005 	ccb->ccb_h.cbfcnp = NULL;
1006 	cts->ios.timing = timing;
1007 	cts->ios_valid = MMC_BT;
1008 	xpt_action(ccb);
1009 
1010 	return (err);
1011 }
1012 
1013 static void
1014 sdda_start_init_task(void *context, int pending) {
1015 	union ccb *new_ccb;
1016 	struct cam_periph *periph;
1017 
1018 	periph = (struct cam_periph *)context;
1019 	CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init_task\n"));
1020 	new_ccb = xpt_alloc_ccb();
1021 	xpt_setup_ccb(&new_ccb->ccb_h, periph->path,
1022 		      CAM_PRIORITY_NONE);
1023 
1024 	cam_periph_lock(periph);
1025 	sdda_start_init(context, new_ccb);
1026 	cam_periph_unlock(periph);
1027 	xpt_free_ccb(new_ccb);
1028 }
1029 
1030 static void
1031 sdda_set_bus_width(struct cam_periph *periph, union ccb *ccb, int width) {
1032 	struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1033 	int err;
1034 
1035 	CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_set_bus_width\n"));
1036 
1037 	/* First set for the card, then for the host */
1038 	if (mmcp->card_features & CARD_FEATURE_MMC) {
1039 		uint8_t	value;
1040 		switch (width) {
1041 		case bus_width_1:
1042 			value = EXT_CSD_BUS_WIDTH_1;
1043 			break;
1044 		case bus_width_4:
1045 			value = EXT_CSD_BUS_WIDTH_4;
1046 			break;
1047 		case bus_width_8:
1048 			value = EXT_CSD_BUS_WIDTH_8;
1049 			break;
1050 		default:
1051 			panic("Invalid bus width %d", width);
1052 		}
1053 		err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL,
1054 				 EXT_CSD_BUS_WIDTH, value);
1055 	} else {
1056 		/* For SD cards we send ACMD6 with the required bus width in arg */
1057 		struct mmc_command cmd;
1058 		memset(&cmd, 0, sizeof(struct mmc_command));
1059 		cmd.opcode = ACMD_SET_BUS_WIDTH;
1060 		cmd.arg = width;
1061 		cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1062 		err = mmc_exec_app_cmd(periph, ccb, &cmd);
1063 	}
1064 
1065 	if (err != MMC_ERR_NONE) {
1066 		CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Error %d when setting bus width on the card\n", err));
1067 		return;
1068 	}
1069 	/* Now card is done, set the host to the same width */
1070 	struct ccb_trans_settings_mmc *cts;
1071 	cts = &ccb->cts.proto_specific.mmc;
1072 	ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1073 	ccb->ccb_h.flags = CAM_DIR_NONE;
1074 	ccb->ccb_h.retry_count = 0;
1075 	ccb->ccb_h.timeout = 100;
1076 	ccb->ccb_h.cbfcnp = NULL;
1077 	cts->ios.bus_width = width;
1078 	cts->ios_valid = MMC_BW;
1079 	xpt_action(ccb);
1080 }
1081 
1082 static inline const char *bus_width_str(enum mmc_bus_width w) {
1083 	switch (w) {
1084 	case bus_width_1:
1085 		return "1-bit";
1086 	case bus_width_4:
1087 		return "4-bit";
1088 	case bus_width_8:
1089 		return "8-bit";
1090 	}
1091 }
1092 
1093 static void
1094 sdda_start_init(void *context, union ccb *start_ccb) {
1095 	struct cam_periph *periph;
1096 	periph = (struct cam_periph *)context;
1097 	int err;
1098 
1099 	CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init\n"));
1100 	/* periph was held for us when this task was enqueued */
1101 	if ((periph->flags & CAM_PERIPH_INVALID) != 0) {
1102 		cam_periph_release(periph);
1103 		return;
1104 	}
1105 
1106 	struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
1107 	//struct ccb_mmcio *mmcio = &start_ccb->mmcio;
1108 	struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1109 	struct cam_ed *device = periph->path->device;
1110 
1111 	if (mmcp->card_features & CARD_FEATURE_MMC) {
1112 		mmc_decode_csd_mmc(mmcp->card_csd, &softc->csd);
1113 		mmc_decode_cid_mmc(mmcp->card_cid, &softc->cid);
1114 		if (softc->csd.spec_vers >= 4)
1115 			err = mmc_send_ext_csd(periph, start_ccb,
1116 					       (uint8_t *)&softc->raw_ext_csd,
1117 					       sizeof(softc->raw_ext_csd));
1118 	} else {
1119 		mmc_decode_csd_sd(mmcp->card_csd, &softc->csd);
1120 		mmc_decode_cid_sd(mmcp->card_cid, &softc->cid);
1121 	}
1122 
1123 	softc->sector_count = softc->csd.capacity / 512;
1124 	softc->mediasize = softc->csd.capacity;
1125 
1126 	/* MMC >= 4.x have EXT_CSD that has its own opinion about capacity */
1127 	if (softc->csd.spec_vers >= 4) {
1128 		uint32_t sec_count = softc->raw_ext_csd[EXT_CSD_SEC_CNT] +
1129 			(softc->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) +
1130 			(softc->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) +
1131 			(softc->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1132 		if (sec_count != 0) {
1133 			softc->sector_count = sec_count;
1134 			softc->mediasize = softc->sector_count * 512;
1135 			/* FIXME: there should be a better name for this option...*/
1136 			mmcp->card_features |= CARD_FEATURE_SDHC;
1137 		}
1138 
1139 	}
1140 	CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1141 		  ("Capacity: %"PRIu64", sectors: %"PRIu64"\n",
1142 		   softc->mediasize,
1143 		   softc->sector_count));
1144 	mmc_format_card_id_string(softc, mmcp);
1145 
1146 	/* Update info for CAM */
1147 	device->serial_num_len = strlen(softc->card_sn_string);
1148 	device->serial_num =
1149 		(u_int8_t *)malloc((device->serial_num_len + 1),
1150 				   M_CAMXPT, M_NOWAIT);
1151 	strlcpy(device->serial_num, softc->card_sn_string, device->serial_num_len);
1152 
1153 	device->device_id_len = strlen(softc->card_id_string);
1154 	device->device_id =
1155 		(u_int8_t *)malloc((device->device_id_len + 1),
1156 				   M_CAMXPT, M_NOWAIT);
1157 	strlcpy(device->device_id, softc->card_id_string, device->device_id_len);
1158 
1159 	strlcpy(mmcp->model, softc->card_id_string, sizeof(mmcp->model));
1160 
1161 	/* Set the clock frequency that the card can handle */
1162 	struct ccb_trans_settings_mmc *cts;
1163 	cts = &start_ccb->cts.proto_specific.mmc;
1164 
1165 	/* First, get the host's max freq */
1166 	start_ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS;
1167 	start_ccb->ccb_h.flags = CAM_DIR_NONE;
1168 	start_ccb->ccb_h.retry_count = 0;
1169 	start_ccb->ccb_h.timeout = 100;
1170 	start_ccb->ccb_h.cbfcnp = NULL;
1171 	xpt_action(start_ccb);
1172 
1173 	if (start_ccb->ccb_h.status != CAM_REQ_CMP)
1174 		panic("Cannot get max host freq");
1175 	int host_f_max = cts->host_f_max;
1176 	uint32_t host_caps = cts->host_caps;
1177 	if (cts->ios.bus_width != bus_width_1)
1178 		panic("Bus width in ios is not 1-bit");
1179 
1180 	/* Now check if the card supports High-speed */
1181 	softc->card_f_max = softc->csd.tran_speed;
1182 
1183 	if (host_caps & MMC_CAP_HSPEED) {
1184 		/* Find out if the card supports High speed timing */
1185 		if (mmcp->card_features & CARD_FEATURE_SD20) {
1186 			/* Get and decode SCR */
1187 			uint32_t rawscr;
1188 			uint8_t res[64];
1189 			if (mmc_app_get_scr(periph, start_ccb, &rawscr)) {
1190 				CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Cannot get SCR\n"));
1191 				goto finish_hs_tests;
1192 			}
1193 			mmc_app_decode_scr(&rawscr, &softc->scr);
1194 
1195 			if ((softc->scr.sda_vsn >= 1) && (softc->csd.ccc & (1<<10))) {
1196 				mmc_sd_switch(periph, start_ccb, SD_SWITCH_MODE_CHECK,
1197 					      SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, res);
1198 				if (res[13] & 2) {
1199 					CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS\n"));
1200 					softc->card_f_max = SD_HS_MAX;
1201 				}
1202 			} else {
1203 				CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Not trying the switch\n"));
1204 				goto finish_hs_tests;
1205 			}
1206 		}
1207 
1208 		if (mmcp->card_features & CARD_FEATURE_MMC && softc->csd.spec_vers >= 4) {
1209 			if (softc->raw_ext_csd[EXT_CSD_CARD_TYPE]
1210 			    & EXT_CSD_CARD_TYPE_HS_52)
1211 				softc->card_f_max = MMC_TYPE_HS_52_MAX;
1212 			else if (softc->raw_ext_csd[EXT_CSD_CARD_TYPE]
1213 				 & EXT_CSD_CARD_TYPE_HS_26)
1214 				softc->card_f_max = MMC_TYPE_HS_26_MAX;
1215 		}
1216 	}
1217 	int f_max;
1218 finish_hs_tests:
1219 	f_max = min(host_f_max, softc->card_f_max);
1220 	CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Set SD freq to %d MHz (min out of host f=%d MHz and card f=%d MHz)\n", f_max  / 1000000, host_f_max / 1000000, softc->card_f_max / 1000000));
1221 
1222 	start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1223 	start_ccb->ccb_h.flags = CAM_DIR_NONE;
1224 	start_ccb->ccb_h.retry_count = 0;
1225 	start_ccb->ccb_h.timeout = 100;
1226 	start_ccb->ccb_h.cbfcnp = NULL;
1227 	cts->ios.clock = f_max;
1228 	cts->ios_valid = MMC_CLK;
1229 	xpt_action(start_ccb);
1230 
1231 	/* Set bus width */
1232 	enum mmc_bus_width desired_bus_width = bus_width_1;
1233 	enum mmc_bus_width max_host_bus_width =
1234 		(host_caps & MMC_CAP_8_BIT_DATA ? bus_width_8 :
1235 		 host_caps & MMC_CAP_4_BIT_DATA ? bus_width_4 : bus_width_1);
1236 	enum mmc_bus_width max_card_bus_width = bus_width_1;
1237 	if (mmcp->card_features & CARD_FEATURE_SD20 &&
1238 	    softc->scr.bus_widths & SD_SCR_BUS_WIDTH_4)
1239 		max_card_bus_width = bus_width_4;
1240 	/*
1241 	 * Unlike SD, MMC cards don't have any information about supported bus width...
1242 	 * So we need to perform read/write test to find out the width.
1243 	 */
1244 	/* TODO: figure out bus width for MMC; use 8-bit for now (to test on BBB) */
1245 	if (mmcp->card_features & CARD_FEATURE_MMC)
1246 		max_card_bus_width = bus_width_8;
1247 
1248 	desired_bus_width = min(max_host_bus_width, max_card_bus_width);
1249 	CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1250 		  ("Set bus width to %s (min of host %s and card %s)\n",
1251 		   bus_width_str(desired_bus_width),
1252 		   bus_width_str(max_host_bus_width),
1253 		   bus_width_str(max_card_bus_width)));
1254 	sdda_set_bus_width(periph, start_ccb, desired_bus_width);
1255 
1256 	if (f_max > 25000000) {
1257 		err = mmc_set_timing(periph, start_ccb, bus_timing_hs);
1258 		if (err != MMC_ERR_NONE)
1259 			CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("Cannot switch card to high-speed mode"));
1260 	}
1261 	softc->state = SDDA_STATE_NORMAL;
1262 	sdda_hook_into_geom(periph);
1263 }
1264 
1265 /* Called with periph lock held! */
1266 static void
1267 sddastart(struct cam_periph *periph, union ccb *start_ccb)
1268 {
1269 	struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
1270 	struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1271 
1272 	CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastart\n"));
1273 
1274 	if (softc->state != SDDA_STATE_NORMAL) {
1275 		CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("device is not in SDDA_STATE_NORMAL yet"));
1276 		xpt_release_ccb(start_ccb);
1277 		return;
1278 	}
1279 	struct bio *bp;
1280 
1281 	/* Run regular command. */
1282 	bp = bioq_first(&softc->bio_queue);
1283 	if (bp == NULL) {
1284 		xpt_release_ccb(start_ccb);
1285 		return;
1286 	}
1287 	bioq_remove(&softc->bio_queue, bp);
1288 
1289 	switch (bp->bio_cmd) {
1290 	case BIO_WRITE:
1291 		CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_WRITE\n"));
1292 		softc->flags |= SDDA_FLAG_DIRTY;
1293 		/* FALLTHROUGH */
1294 	case BIO_READ:
1295 	{
1296 		CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_READ\n"));
1297 		uint64_t blockno = bp->bio_pblkno;
1298 		uint16_t count = bp->bio_bcount / 512;
1299 		uint16_t opcode;
1300 
1301 		CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("Block %"PRIu64" cnt %u\n", blockno, count));
1302 
1303 		/* Construct new MMC command */
1304 		if (bp->bio_cmd == BIO_READ) {
1305 			if (count > 1)
1306 				opcode = MMC_READ_MULTIPLE_BLOCK;
1307 			else
1308 				opcode = MMC_READ_SINGLE_BLOCK;
1309 		} else {
1310 			if (count > 1)
1311 				opcode = MMC_WRITE_MULTIPLE_BLOCK;
1312 			else
1313 				opcode = MMC_WRITE_BLOCK;
1314 		}
1315 
1316 		start_ccb->ccb_h.func_code = XPT_MMC_IO;
1317 		start_ccb->ccb_h.flags = (bp->bio_cmd == BIO_READ ? CAM_DIR_IN : CAM_DIR_OUT);
1318 		start_ccb->ccb_h.retry_count = 0;
1319 		start_ccb->ccb_h.timeout = 15 * 1000;
1320 		start_ccb->ccb_h.cbfcnp = sddadone;
1321 		struct ccb_mmcio *mmcio;
1322 
1323 		mmcio = &start_ccb->mmcio;
1324 		mmcio->cmd.opcode = opcode;
1325 		mmcio->cmd.arg = blockno;
1326 		if (!(mmcp->card_features & CARD_FEATURE_SDHC))
1327 			mmcio->cmd.arg <<= 9;
1328 
1329 		mmcio->cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1330 		mmcio->cmd.data = softc->mmcdata;
1331 		mmcio->cmd.data->data = bp->bio_data;
1332 		mmcio->cmd.data->len = 512 * count;
1333 		mmcio->cmd.data->flags = (bp->bio_cmd == BIO_READ ? MMC_DATA_READ : MMC_DATA_WRITE);
1334 		/* Direct h/w to issue CMD12 upon completion */
1335 		if (count > 1) {
1336 			mmcio->stop.opcode = MMC_STOP_TRANSMISSION;
1337 			mmcio->stop.flags = MMC_RSP_R1B | MMC_CMD_AC;
1338 			mmcio->stop.arg = 0;
1339 		}
1340 
1341 		break;
1342 	}
1343 	case BIO_FLUSH:
1344 		CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_FLUSH\n"));
1345 		sddaschedule(periph);
1346 		break;
1347 	case BIO_DELETE:
1348 		CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_DELETE\n"));
1349 		sddaschedule(periph);
1350 		break;
1351 	}
1352 	start_ccb->ccb_h.ccb_bp = bp;
1353 	softc->outstanding_cmds++;
1354 	softc->refcount++;
1355 	cam_periph_unlock(periph);
1356 	xpt_action(start_ccb);
1357 	cam_periph_lock(periph);
1358 	softc->refcount--;
1359 
1360 	/* May have more work to do, so ensure we stay scheduled */
1361 	sddaschedule(periph);
1362 }
1363 
1364 static void
1365 sddadone(struct cam_periph *periph, union ccb *done_ccb)
1366 {
1367 	struct sdda_softc *softc;
1368 	struct ccb_mmcio *mmcio;
1369 //	struct ccb_getdev *cgd;
1370 	struct cam_path *path;
1371 //	int state;
1372 
1373 	softc = (struct sdda_softc *)periph->softc;
1374 	mmcio = &done_ccb->mmcio;
1375 	path = done_ccb->ccb_h.path;
1376 
1377 	CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddadone\n"));
1378 
1379 	struct bio *bp;
1380 	int error = 0;
1381 
1382 //        cam_periph_lock(periph);
1383 	if ((done_ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
1384 		CAM_DEBUG(path, CAM_DEBUG_TRACE, ("Error!!!\n"));
1385 		if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0)
1386 			cam_release_devq(path,
1387 					 /*relsim_flags*/0,
1388 					 /*reduction*/0,
1389 					 /*timeout*/0,
1390 					 /*getcount_only*/0);
1391 		error = 5; /* EIO */
1392 	} else {
1393 		if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0)
1394 			panic("REQ_CMP with QFRZN");
1395 		error = 0;
1396 	}
1397 
1398 
1399 	bp = (struct bio *)done_ccb->ccb_h.ccb_bp;
1400 	bp->bio_error = error;
1401 	if (error != 0) {
1402 		bp->bio_resid = bp->bio_bcount;
1403 		bp->bio_flags |= BIO_ERROR;
1404 	} else {
1405 		/* XXX: How many bytes remaining? */
1406 		bp->bio_resid = 0;
1407 		if (bp->bio_resid > 0)
1408 			bp->bio_flags |= BIO_ERROR;
1409 	}
1410 
1411 	uint32_t card_status = mmcio->cmd.resp[0];
1412 	CAM_DEBUG(path, CAM_DEBUG_TRACE,
1413 		  ("Card status: %08x\n", R1_STATUS(card_status)));
1414 	CAM_DEBUG(path, CAM_DEBUG_TRACE,
1415 		  ("Current state: %d\n", R1_CURRENT_STATE(card_status)));
1416 
1417 	softc->outstanding_cmds--;
1418 	xpt_release_ccb(done_ccb);
1419 	biodone(bp);
1420 }
1421 
1422 static int
1423 sddaerror(union ccb *ccb, u_int32_t cam_flags, u_int32_t sense_flags)
1424 {
1425 	return(cam_periph_error(ccb, cam_flags, sense_flags));
1426 }
1427 #endif /* _KERNEL */
1428