1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 Bernd Walter <tisco@FreeBSD.org> All rights reserved. 5 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> All rights reserved. 6 * Copyright (c) 2015-2017 Ilya Bakulin <kibab@FreeBSD.org> All rights reserved. 7 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org> 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer, 14 * without modification, immediately at the beginning of the file. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * Some code derived from the sys/dev/mmc and sys/cam/ata 31 * Thanks to Warner Losh <imp@FreeBSD.org>, Alexander Motin <mav@FreeBSD.org> 32 * Bernd Walter <tisco@FreeBSD.org>, and other authors. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 //#include "opt_sdda.h" 39 40 #include <sys/param.h> 41 42 #ifdef _KERNEL 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/bio.h> 46 #include <sys/sysctl.h> 47 #include <sys/endian.h> 48 #include <sys/taskqueue.h> 49 #include <sys/lock.h> 50 #include <sys/mutex.h> 51 #include <sys/conf.h> 52 #include <sys/devicestat.h> 53 #include <sys/eventhandler.h> 54 #include <sys/malloc.h> 55 #include <sys/cons.h> 56 #include <sys/proc.h> 57 #include <sys/reboot.h> 58 #include <geom/geom_disk.h> 59 #include <machine/_inttypes.h> /* for PRIu64 */ 60 #endif /* _KERNEL */ 61 62 #ifndef _KERNEL 63 #include <stdio.h> 64 #include <string.h> 65 #endif /* _KERNEL */ 66 67 #include <cam/cam.h> 68 #include <cam/cam_ccb.h> 69 #include <cam/cam_queue.h> 70 #include <cam/cam_periph.h> 71 #include <cam/cam_sim.h> 72 #include <cam/cam_xpt.h> 73 #include <cam/cam_xpt_sim.h> 74 #include <cam/cam_xpt_periph.h> 75 #include <cam/cam_xpt_internal.h> 76 #include <cam/cam_debug.h> 77 78 #include <cam/mmc/mmc_all.h> 79 80 #ifdef _KERNEL 81 82 typedef enum { 83 SDDA_FLAG_OPEN = 0x0002, 84 SDDA_FLAG_DIRTY = 0x0004 85 } sdda_flags; 86 87 typedef enum { 88 SDDA_STATE_INIT, 89 SDDA_STATE_INVALID, 90 SDDA_STATE_NORMAL, 91 SDDA_STATE_PART_SWITCH, 92 } sdda_state; 93 94 #define SDDA_FMT_BOOT "sdda%dboot" 95 #define SDDA_FMT_GP "sdda%dgp" 96 #define SDDA_FMT_RPMB "sdda%drpmb" 97 #define SDDA_LABEL_ENH "enh" 98 99 #define SDDA_PART_NAMELEN (16 + 1) 100 101 struct sdda_softc; 102 103 struct sdda_part { 104 struct disk *disk; 105 struct bio_queue_head bio_queue; 106 sdda_flags flags; 107 struct sdda_softc *sc; 108 u_int cnt; 109 u_int type; 110 bool ro; 111 char name[SDDA_PART_NAMELEN]; 112 }; 113 114 struct sdda_softc { 115 int outstanding_cmds; /* Number of active commands */ 116 int refcount; /* Active xpt_action() calls */ 117 sdda_state state; 118 struct mmc_data *mmcdata; 119 struct cam_periph *periph; 120 // sdda_quirks quirks; 121 struct task start_init_task; 122 uint32_t raw_csd[4]; 123 uint8_t raw_ext_csd[512]; /* MMC only? */ 124 struct mmc_csd csd; 125 struct mmc_cid cid; 126 struct mmc_scr scr; 127 /* Calculated from CSD */ 128 uint64_t sector_count; 129 uint64_t mediasize; 130 131 /* Calculated from CID */ 132 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 133 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 134 /* Determined from CSD + is highspeed card*/ 135 uint32_t card_f_max; 136 137 /* Generic switch timeout */ 138 uint32_t cmd6_time; 139 uint32_t timings; /* Mask of bus timings supported */ 140 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */ 141 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */ 142 /* MMC partitions support */ 143 struct sdda_part *part[MMC_PART_MAX]; 144 uint8_t part_curr; /* Partition currently switched to */ 145 uint8_t part_requested; /* What partition we're currently switching to */ 146 uint32_t part_time; /* Partition switch timeout [us] */ 147 off_t enh_base; /* Enhanced user data area slice base ... */ 148 off_t enh_size; /* ... and size [bytes] */ 149 int log_count; 150 struct timeval log_time; 151 }; 152 153 static const char *mmc_errmsg[] = 154 { 155 "None", 156 "Timeout", 157 "Bad CRC", 158 "Fifo", 159 "Failed", 160 "Invalid", 161 "NO MEMORY" 162 }; 163 164 #define ccb_bp ppriv_ptr1 165 166 static disk_strategy_t sddastrategy; 167 static periph_init_t sddainit; 168 static void sddaasync(void *callback_arg, u_int32_t code, 169 struct cam_path *path, void *arg); 170 static periph_ctor_t sddaregister; 171 static periph_dtor_t sddacleanup; 172 static periph_start_t sddastart; 173 static periph_oninv_t sddaoninvalidate; 174 static void sddadone(struct cam_periph *periph, 175 union ccb *done_ccb); 176 static int sddaerror(union ccb *ccb, u_int32_t cam_flags, 177 u_int32_t sense_flags); 178 179 static int mmc_handle_reply(union ccb *ccb); 180 static uint16_t get_rca(struct cam_periph *periph); 181 static void sdda_start_init(void *context, union ccb *start_ccb); 182 static void sdda_start_init_task(void *context, int pending); 183 static void sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *start_ccb); 184 static uint32_t sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb); 185 static int mmc_select_card(struct cam_periph *periph, union ccb *ccb, uint32_t rca); 186 static inline uint32_t mmc_get_sector_size(struct cam_periph *periph) {return MMC_SECTOR_SIZE;} 187 188 static SYSCTL_NODE(_kern_cam, OID_AUTO, sdda, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 189 "CAM Direct Access Disk driver"); 190 191 static int sdda_mmcsd_compat = 1; 192 SYSCTL_INT(_kern_cam_sdda, OID_AUTO, mmcsd_compat, CTLFLAG_RDTUN, 193 &sdda_mmcsd_compat, 1, "Enable creation of mmcsd aliases."); 194 195 /* TODO: actually issue GET_TRAN_SETTINGS to get R/O status */ 196 static inline bool sdda_get_read_only(struct cam_periph *periph, union ccb *start_ccb) 197 { 198 199 return (false); 200 } 201 202 static uint32_t mmc_get_spec_vers(struct cam_periph *periph); 203 static uint64_t mmc_get_media_size(struct cam_periph *periph); 204 static uint32_t mmc_get_cmd6_timeout(struct cam_periph *periph); 205 static bool sdda_add_part(struct cam_periph *periph, u_int type, 206 const char *name, u_int cnt, off_t media_size, bool ro); 207 208 static struct periph_driver sddadriver = 209 { 210 sddainit, "sdda", 211 TAILQ_HEAD_INITIALIZER(sddadriver.units), /* generation */ 0 212 }; 213 214 PERIPHDRIVER_DECLARE(sdda, sddadriver); 215 216 static MALLOC_DEFINE(M_SDDA, "sd_da", "sd_da buffers"); 217 218 static const int exp[8] = { 219 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 220 }; 221 222 static const int mant[16] = { 223 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 224 }; 225 226 static const int cur_min[8] = { 227 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 228 }; 229 230 static const int cur_max[8] = { 231 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 232 }; 233 234 static uint16_t 235 get_rca(struct cam_periph *periph) { 236 return periph->path->device->mmc_ident_data.card_rca; 237 } 238 239 /* 240 * Figure out if CCB execution resulted in error. 241 * Look at both CAM-level errors and on MMC protocol errors. 242 * 243 * Return value is always MMC error. 244 */ 245 static int 246 mmc_handle_reply(union ccb *ccb) 247 { 248 KASSERT(ccb->ccb_h.func_code == XPT_MMC_IO, 249 ("ccb %p: cannot handle non-XPT_MMC_IO errors, got func_code=%d", 250 ccb, ccb->ccb_h.func_code)); 251 252 /* CAM-level error should always correspond to MMC-level error */ 253 if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) && 254 (ccb->mmcio.cmd.error != MMC_ERR_NONE)) 255 panic("CCB status is OK but MMC error != MMC_ERR_NONE"); 256 257 if (ccb->mmcio.cmd.error != MMC_ERR_NONE) { 258 xpt_print_path(ccb->ccb_h.path); 259 printf("CMD%d failed, err %d (%s)\n", 260 ccb->mmcio.cmd.opcode, 261 ccb->mmcio.cmd.error, 262 mmc_errmsg[ccb->mmcio.cmd.error]); 263 } 264 return (ccb->mmcio.cmd.error); 265 } 266 267 static uint32_t 268 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 269 { 270 const int i = (bit_len / 32) - (start / 32) - 1; 271 const int shift = start & 31; 272 uint32_t retval = bits[i] >> shift; 273 if (size + shift > 32) 274 retval |= bits[i - 1] << (32 - shift); 275 return (retval & ((1llu << size) - 1)); 276 } 277 278 static void 279 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 280 { 281 int v; 282 int m; 283 int e; 284 285 memset(csd, 0, sizeof(*csd)); 286 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 287 if (v == 0) { 288 m = mmc_get_bits(raw_csd, 128, 115, 4); 289 e = mmc_get_bits(raw_csd, 128, 112, 3); 290 csd->tacc = (exp[e] * mant[m] + 9) / 10; 291 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 292 m = mmc_get_bits(raw_csd, 128, 99, 4); 293 e = mmc_get_bits(raw_csd, 128, 96, 3); 294 csd->tran_speed = exp[e] * 10000 * mant[m]; 295 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 296 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 297 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 298 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 299 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 300 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 301 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 302 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 303 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 304 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 305 m = mmc_get_bits(raw_csd, 128, 62, 12); 306 e = mmc_get_bits(raw_csd, 128, 47, 3); 307 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 308 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 309 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 310 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 311 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 312 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 313 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 314 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 315 } else if (v == 1) { 316 m = mmc_get_bits(raw_csd, 128, 115, 4); 317 e = mmc_get_bits(raw_csd, 128, 112, 3); 318 csd->tacc = (exp[e] * mant[m] + 9) / 10; 319 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 320 m = mmc_get_bits(raw_csd, 128, 99, 4); 321 e = mmc_get_bits(raw_csd, 128, 96, 3); 322 csd->tran_speed = exp[e] * 10000 * mant[m]; 323 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 324 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 325 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 326 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 327 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 328 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 329 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) * 330 512 * 1024; 331 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 332 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 333 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 334 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 335 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 336 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 337 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 338 } else 339 panic("unknown SD CSD version"); 340 } 341 342 static void 343 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 344 { 345 int m; 346 int e; 347 348 memset(csd, 0, sizeof(*csd)); 349 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 350 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 351 m = mmc_get_bits(raw_csd, 128, 115, 4); 352 e = mmc_get_bits(raw_csd, 128, 112, 3); 353 csd->tacc = exp[e] * mant[m] + 9 / 10; 354 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 355 m = mmc_get_bits(raw_csd, 128, 99, 4); 356 e = mmc_get_bits(raw_csd, 128, 96, 3); 357 csd->tran_speed = exp[e] * 10000 * mant[m]; 358 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 359 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 360 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 361 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 362 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 363 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 364 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 365 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 366 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 367 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 368 m = mmc_get_bits(raw_csd, 128, 62, 12); 369 e = mmc_get_bits(raw_csd, 128, 47, 3); 370 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 371 csd->erase_blk_en = 0; 372 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 373 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 374 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 375 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 376 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 377 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 378 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 379 } 380 381 static void 382 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 383 { 384 int i; 385 386 /* There's no version info, so we take it on faith */ 387 memset(cid, 0, sizeof(*cid)); 388 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 389 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 390 for (i = 0; i < 5; i++) 391 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 392 cid->pnm[5] = 0; 393 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 394 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 395 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 396 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 397 } 398 399 static void 400 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid) 401 { 402 int i; 403 404 /* There's no version info, so we take it on faith */ 405 memset(cid, 0, sizeof(*cid)); 406 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 407 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 408 for (i = 0; i < 6; i++) 409 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 410 cid->pnm[6] = 0; 411 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 412 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 413 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 414 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997; 415 } 416 417 static void 418 mmc_format_card_id_string(struct sdda_softc *sc, struct mmc_params *mmcp) 419 { 420 char oidstr[8]; 421 uint8_t c1; 422 uint8_t c2; 423 424 /* 425 * Format a card ID string for use by the mmcsd driver, it's what 426 * appears between the <> in the following: 427 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0 428 * 22.5MHz/4bit/128-block 429 * 430 * Also format just the card serial number, which the mmcsd driver will 431 * use as the disk->d_ident string. 432 * 433 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 434 * and our max formatted length is currently 55 bytes if every field 435 * contains the largest value. 436 * 437 * Sometimes the oid is two printable ascii chars; when it's not, 438 * format it as 0xnnnn instead. 439 */ 440 c1 = (sc->cid.oid >> 8) & 0x0ff; 441 c2 = sc->cid.oid & 0x0ff; 442 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 443 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 444 else 445 snprintf(oidstr, sizeof(oidstr), "0x%04x", sc->cid.oid); 446 snprintf(sc->card_sn_string, sizeof(sc->card_sn_string), 447 "%08X", sc->cid.psn); 448 snprintf(sc->card_id_string, sizeof(sc->card_id_string), 449 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 450 mmcp->card_features & CARD_FEATURE_MMC ? "MMC" : "SD", 451 mmcp->card_features & CARD_FEATURE_SDHC ? "HC" : "", 452 sc->cid.pnm, sc->cid.prv >> 4, sc->cid.prv & 0x0f, 453 sc->cid.psn, sc->cid.mdt_month, sc->cid.mdt_year, 454 sc->cid.mid, oidstr); 455 } 456 457 static int 458 sddaopen(struct disk *dp) 459 { 460 struct sdda_part *part; 461 struct cam_periph *periph; 462 struct sdda_softc *softc; 463 int error; 464 465 part = (struct sdda_part *)dp->d_drv1; 466 softc = part->sc; 467 periph = softc->periph; 468 if (cam_periph_acquire(periph) != 0) { 469 return(ENXIO); 470 } 471 472 cam_periph_lock(periph); 473 if ((error = cam_periph_hold(periph, PRIBIO|PCATCH)) != 0) { 474 cam_periph_unlock(periph); 475 cam_periph_release(periph); 476 return (error); 477 } 478 479 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaopen\n")); 480 481 part->flags |= SDDA_FLAG_OPEN; 482 483 cam_periph_unhold(periph); 484 cam_periph_unlock(periph); 485 return (0); 486 } 487 488 static int 489 sddaclose(struct disk *dp) 490 { 491 struct sdda_part *part; 492 struct cam_periph *periph; 493 struct sdda_softc *softc; 494 495 part = (struct sdda_part *)dp->d_drv1; 496 softc = part->sc; 497 periph = softc->periph; 498 part->flags &= ~SDDA_FLAG_OPEN; 499 500 cam_periph_lock(periph); 501 502 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaclose\n")); 503 504 while (softc->refcount != 0) 505 cam_periph_sleep(periph, &softc->refcount, PRIBIO, "sddaclose", 1); 506 cam_periph_unlock(periph); 507 cam_periph_release(periph); 508 return (0); 509 } 510 511 static void 512 sddaschedule(struct cam_periph *periph) 513 { 514 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 515 struct sdda_part *part; 516 struct bio *bp; 517 int i; 518 519 /* Check if we have more work to do. */ 520 /* Find partition that has outstanding commands. Prefer current partition. */ 521 bp = bioq_first(&softc->part[softc->part_curr]->bio_queue); 522 if (bp == NULL) { 523 for (i = 0; i < MMC_PART_MAX; i++) { 524 if ((part = softc->part[i]) != NULL && 525 (bp = bioq_first(&softc->part[i]->bio_queue)) != NULL) 526 break; 527 } 528 } 529 if (bp != NULL) { 530 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 531 } 532 } 533 534 /* 535 * Actually translate the requested transfer into one the physical driver 536 * can understand. The transfer is described by a buf and will include 537 * only one physical transfer. 538 */ 539 static void 540 sddastrategy(struct bio *bp) 541 { 542 struct cam_periph *periph; 543 struct sdda_part *part; 544 struct sdda_softc *softc; 545 546 part = (struct sdda_part *)bp->bio_disk->d_drv1; 547 softc = part->sc; 548 periph = softc->periph; 549 550 cam_periph_lock(periph); 551 552 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastrategy(%p)\n", bp)); 553 554 /* 555 * If the device has been made invalid, error out 556 */ 557 if ((periph->flags & CAM_PERIPH_INVALID) != 0) { 558 cam_periph_unlock(periph); 559 biofinish(bp, NULL, ENXIO); 560 return; 561 } 562 563 /* 564 * Place it in the queue of disk activities for this disk 565 */ 566 bioq_disksort(&part->bio_queue, bp); 567 568 /* 569 * Schedule ourselves for performing the work. 570 */ 571 sddaschedule(periph); 572 cam_periph_unlock(periph); 573 574 return; 575 } 576 577 static void 578 sddainit(void) 579 { 580 cam_status status; 581 582 /* 583 * Install a global async callback. This callback will 584 * receive async callbacks like "new device found". 585 */ 586 status = xpt_register_async(AC_FOUND_DEVICE, sddaasync, NULL, NULL); 587 588 if (status != CAM_REQ_CMP) { 589 printf("sdda: Failed to attach master async callback " 590 "due to status 0x%x!\n", status); 591 } 592 } 593 594 /* 595 * Callback from GEOM, called when it has finished cleaning up its 596 * resources. 597 */ 598 static void 599 sddadiskgonecb(struct disk *dp) 600 { 601 struct cam_periph *periph; 602 struct sdda_part *part; 603 604 part = (struct sdda_part *)dp->d_drv1; 605 periph = part->sc->periph; 606 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddadiskgonecb\n")); 607 608 cam_periph_release(periph); 609 } 610 611 static void 612 sddaoninvalidate(struct cam_periph *periph) 613 { 614 struct sdda_softc *softc; 615 struct sdda_part *part; 616 617 softc = (struct sdda_softc *)periph->softc; 618 619 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaoninvalidate\n")); 620 621 /* 622 * De-register any async callbacks. 623 */ 624 xpt_register_async(0, sddaasync, periph, periph->path); 625 626 /* 627 * Return all queued I/O with ENXIO. 628 * XXX Handle any transactions queued to the card 629 * with XPT_ABORT_CCB. 630 */ 631 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush start\n")); 632 for (int i = 0; i < MMC_PART_MAX; i++) { 633 if ((part = softc->part[i]) != NULL) { 634 bioq_flush(&part->bio_queue, NULL, ENXIO); 635 disk_gone(part->disk); 636 } 637 } 638 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush end\n")); 639 640 } 641 642 static void 643 sddacleanup(struct cam_periph *periph) 644 { 645 struct sdda_softc *softc; 646 struct sdda_part *part; 647 int i; 648 649 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddacleanup\n")); 650 softc = (struct sdda_softc *)periph->softc; 651 652 cam_periph_unlock(periph); 653 654 for (i = 0; i < MMC_PART_MAX; i++) { 655 if ((part = softc->part[i]) != NULL) { 656 disk_destroy(part->disk); 657 free(part, M_DEVBUF); 658 softc->part[i] = NULL; 659 } 660 } 661 free(softc, M_DEVBUF); 662 cam_periph_lock(periph); 663 } 664 665 static void 666 sddaasync(void *callback_arg, u_int32_t code, 667 struct cam_path *path, void *arg) 668 { 669 struct ccb_getdev cgd; 670 struct cam_periph *periph; 671 struct sdda_softc *softc; 672 673 periph = (struct cam_periph *)callback_arg; 674 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddaasync(code=%d)\n", code)); 675 switch (code) { 676 case AC_FOUND_DEVICE: 677 { 678 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_FOUND_DEVICE\n")); 679 struct ccb_getdev *cgd; 680 cam_status status; 681 682 cgd = (struct ccb_getdev *)arg; 683 if (cgd == NULL) 684 break; 685 686 if (cgd->protocol != PROTO_MMCSD) 687 break; 688 689 if (!(path->device->mmc_ident_data.card_features & CARD_FEATURE_MEMORY)) { 690 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("No memory on the card!\n")); 691 break; 692 } 693 694 /* 695 * Allocate a peripheral instance for 696 * this device and start the probe 697 * process. 698 */ 699 status = cam_periph_alloc(sddaregister, sddaoninvalidate, 700 sddacleanup, sddastart, 701 "sdda", CAM_PERIPH_BIO, 702 path, sddaasync, 703 AC_FOUND_DEVICE, cgd); 704 705 if (status != CAM_REQ_CMP 706 && status != CAM_REQ_INPROG) 707 printf("sddaasync: Unable to attach to new device " 708 "due to status 0x%x\n", status); 709 break; 710 } 711 case AC_GETDEV_CHANGED: 712 { 713 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_GETDEV_CHANGED\n")); 714 softc = (struct sdda_softc *)periph->softc; 715 memset(&cgd, 0, sizeof(cgd)); 716 xpt_setup_ccb(&cgd.ccb_h, periph->path, CAM_PRIORITY_NORMAL); 717 cgd.ccb_h.func_code = XPT_GDEV_TYPE; 718 xpt_action((union ccb *)&cgd); 719 cam_periph_async(periph, code, path, arg); 720 break; 721 } 722 case AC_ADVINFO_CHANGED: 723 { 724 uintptr_t buftype; 725 int i; 726 727 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_ADVINFO_CHANGED\n")); 728 buftype = (uintptr_t)arg; 729 if (buftype == CDAI_TYPE_PHYS_PATH) { 730 struct sdda_softc *softc; 731 struct sdda_part *part; 732 733 softc = periph->softc; 734 for (i = 0; i < MMC_PART_MAX; i++) { 735 if ((part = softc->part[i]) != NULL) { 736 disk_attr_changed(part->disk, "GEOM::physpath", 737 M_NOWAIT); 738 } 739 } 740 } 741 break; 742 } 743 default: 744 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> default?!\n")); 745 cam_periph_async(periph, code, path, arg); 746 break; 747 } 748 } 749 750 static int 751 sddagetattr(struct bio *bp) 752 { 753 struct cam_periph *periph; 754 struct sdda_softc *softc; 755 struct sdda_part *part; 756 int ret; 757 758 part = (struct sdda_part *)bp->bio_disk->d_drv1; 759 softc = part->sc; 760 periph = softc->periph; 761 cam_periph_lock(periph); 762 ret = xpt_getattr(bp->bio_data, bp->bio_length, bp->bio_attribute, 763 periph->path); 764 cam_periph_unlock(periph); 765 if (ret == 0) 766 bp->bio_completed = bp->bio_length; 767 return (ret); 768 } 769 770 static cam_status 771 sddaregister(struct cam_periph *periph, void *arg) 772 { 773 struct sdda_softc *softc; 774 struct ccb_getdev *cgd; 775 union ccb *request_ccb; /* CCB representing the probe request */ 776 777 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaregister\n")); 778 cgd = (struct ccb_getdev *)arg; 779 if (cgd == NULL) { 780 printf("sddaregister: no getdev CCB, can't register device\n"); 781 return (CAM_REQ_CMP_ERR); 782 } 783 784 softc = (struct sdda_softc *)malloc(sizeof(*softc), M_DEVBUF, 785 M_NOWAIT|M_ZERO); 786 if (softc == NULL) { 787 printf("sddaregister: Unable to probe new device. " 788 "Unable to allocate softc\n"); 789 return (CAM_REQ_CMP_ERR); 790 } 791 792 softc->state = SDDA_STATE_INIT; 793 softc->mmcdata = 794 (struct mmc_data *)malloc(sizeof(struct mmc_data), M_DEVBUF, M_NOWAIT|M_ZERO); 795 if (softc->mmcdata == NULL) { 796 printf("sddaregister: Unable to probe new device. " 797 "Unable to allocate mmcdata\n"); 798 free(softc, M_DEVBUF); 799 return (CAM_REQ_CMP_ERR); 800 } 801 periph->softc = softc; 802 softc->periph = periph; 803 804 request_ccb = (union ccb*) arg; 805 xpt_schedule(periph, CAM_PRIORITY_XPT); 806 TASK_INIT(&softc->start_init_task, 0, sdda_start_init_task, periph); 807 taskqueue_enqueue(taskqueue_thread, &softc->start_init_task); 808 809 return (CAM_REQ_CMP); 810 } 811 812 static int 813 mmc_exec_app_cmd(struct cam_periph *periph, union ccb *ccb, 814 struct mmc_command *cmd) { 815 int err; 816 817 /* Send APP_CMD first */ 818 memset(&ccb->mmcio.cmd, 0, sizeof(struct mmc_command)); 819 memset(&ccb->mmcio.stop, 0, sizeof(struct mmc_command)); 820 cam_fill_mmcio(&ccb->mmcio, 821 /*retries*/ 0, 822 /*cbfcnp*/ NULL, 823 /*flags*/ CAM_DIR_NONE, 824 /*mmc_opcode*/ MMC_APP_CMD, 825 /*mmc_arg*/ get_rca(periph) << 16, 826 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_AC, 827 /*mmc_data*/ NULL, 828 /*timeout*/ 0); 829 830 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 831 err = mmc_handle_reply(ccb); 832 if (err != 0) 833 return (err); 834 if (!(ccb->mmcio.cmd.resp[0] & R1_APP_CMD)) 835 return (EIO); 836 837 /* Now exec actual command */ 838 int flags = 0; 839 if (cmd->data != NULL) { 840 ccb->mmcio.cmd.data = cmd->data; 841 if (cmd->data->flags & MMC_DATA_READ) 842 flags |= CAM_DIR_IN; 843 if (cmd->data->flags & MMC_DATA_WRITE) 844 flags |= CAM_DIR_OUT; 845 } else flags = CAM_DIR_NONE; 846 847 cam_fill_mmcio(&ccb->mmcio, 848 /*retries*/ 0, 849 /*cbfcnp*/ NULL, 850 /*flags*/ flags, 851 /*mmc_opcode*/ cmd->opcode, 852 /*mmc_arg*/ cmd->arg, 853 /*mmc_flags*/ cmd->flags, 854 /*mmc_data*/ cmd->data, 855 /*timeout*/ 0); 856 857 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 858 err = mmc_handle_reply(ccb); 859 if (err != 0) 860 return (err); 861 memcpy(cmd->resp, ccb->mmcio.cmd.resp, sizeof(cmd->resp)); 862 cmd->error = ccb->mmcio.cmd.error; 863 864 return (0); 865 } 866 867 static int 868 mmc_app_get_scr(struct cam_periph *periph, union ccb *ccb, uint32_t *rawscr) { 869 int err; 870 struct mmc_command cmd; 871 struct mmc_data d; 872 873 memset(&cmd, 0, sizeof(cmd)); 874 memset(&d, 0, sizeof(d)); 875 876 memset(rawscr, 0, 8); 877 cmd.opcode = ACMD_SEND_SCR; 878 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 879 cmd.arg = 0; 880 881 d.data = rawscr; 882 d.len = 8; 883 d.flags = MMC_DATA_READ; 884 cmd.data = &d; 885 886 err = mmc_exec_app_cmd(periph, ccb, &cmd); 887 rawscr[0] = be32toh(rawscr[0]); 888 rawscr[1] = be32toh(rawscr[1]); 889 return (err); 890 } 891 892 static int 893 mmc_send_ext_csd(struct cam_periph *periph, union ccb *ccb, 894 uint8_t *rawextcsd, size_t buf_len) { 895 int err; 896 struct mmc_data d; 897 898 KASSERT(buf_len == 512, ("Buffer for ext csd must be 512 bytes")); 899 memset(&d, 0, sizeof(d)); 900 d.data = rawextcsd; 901 d.len = buf_len; 902 d.flags = MMC_DATA_READ; 903 memset(d.data, 0, d.len); 904 905 cam_fill_mmcio(&ccb->mmcio, 906 /*retries*/ 0, 907 /*cbfcnp*/ NULL, 908 /*flags*/ CAM_DIR_IN, 909 /*mmc_opcode*/ MMC_SEND_EXT_CSD, 910 /*mmc_arg*/ 0, 911 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC, 912 /*mmc_data*/ &d, 913 /*timeout*/ 0); 914 915 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 916 err = mmc_handle_reply(ccb); 917 return (err); 918 } 919 920 static void 921 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 922 { 923 unsigned int scr_struct; 924 925 memset(scr, 0, sizeof(*scr)); 926 927 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 928 if (scr_struct != 0) { 929 printf("Unrecognised SCR structure version %d\n", 930 scr_struct); 931 return; 932 } 933 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 934 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 935 } 936 937 static inline void 938 mmc_switch_fill_mmcio(union ccb *ccb, 939 uint8_t set, uint8_t index, uint8_t value, u_int timeout) 940 { 941 int arg = (MMC_SWITCH_FUNC_WR << 24) | 942 (index << 16) | 943 (value << 8) | 944 set; 945 946 cam_fill_mmcio(&ccb->mmcio, 947 /*retries*/ 0, 948 /*cbfcnp*/ NULL, 949 /*flags*/ CAM_DIR_NONE, 950 /*mmc_opcode*/ MMC_SWITCH_FUNC, 951 /*mmc_arg*/ arg, 952 /*mmc_flags*/ MMC_RSP_R1B | MMC_CMD_AC, 953 /*mmc_data*/ NULL, 954 /*timeout*/ timeout); 955 } 956 957 static int 958 mmc_select_card(struct cam_periph *periph, union ccb *ccb, uint32_t rca) 959 { 960 int flags, err; 961 962 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 963 cam_fill_mmcio(&ccb->mmcio, 964 /*retries*/ 0, 965 /*cbfcnp*/ NULL, 966 /*flags*/ CAM_DIR_IN, 967 /*mmc_opcode*/ MMC_SELECT_CARD, 968 /*mmc_arg*/ rca << 16, 969 /*mmc_flags*/ flags, 970 /*mmc_data*/ NULL, 971 /*timeout*/ 0); 972 973 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 974 err = mmc_handle_reply(ccb); 975 return (err); 976 } 977 978 static int 979 mmc_switch(struct cam_periph *periph, union ccb *ccb, 980 uint8_t set, uint8_t index, uint8_t value, u_int timeout) 981 { 982 int err; 983 984 mmc_switch_fill_mmcio(ccb, set, index, value, timeout); 985 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 986 err = mmc_handle_reply(ccb); 987 return (err); 988 } 989 990 static uint32_t 991 mmc_get_spec_vers(struct cam_periph *periph) { 992 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 993 994 return (softc->csd.spec_vers); 995 } 996 997 static uint64_t 998 mmc_get_media_size(struct cam_periph *periph) { 999 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1000 1001 return (softc->mediasize); 1002 } 1003 1004 static uint32_t 1005 mmc_get_cmd6_timeout(struct cam_periph *periph) 1006 { 1007 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1008 1009 if (mmc_get_spec_vers(periph) >= 6) 1010 return (softc->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME] * 10); 1011 return (500 * 1000); 1012 } 1013 1014 static int 1015 mmc_sd_switch(struct cam_periph *periph, union ccb *ccb, 1016 uint8_t mode, uint8_t grp, uint8_t value, 1017 uint8_t *res) { 1018 struct mmc_data mmc_d; 1019 uint32_t arg; 1020 int err; 1021 1022 memset(res, 0, 64); 1023 memset(&mmc_d, 0, sizeof(mmc_d)); 1024 mmc_d.len = 64; 1025 mmc_d.data = res; 1026 mmc_d.flags = MMC_DATA_READ; 1027 1028 arg = mode << 31; /* 0 - check, 1 - set */ 1029 arg |= 0x00FFFFFF; 1030 arg &= ~(0xF << (grp * 4)); 1031 arg |= value << (grp * 4); 1032 1033 cam_fill_mmcio(&ccb->mmcio, 1034 /*retries*/ 0, 1035 /*cbfcnp*/ NULL, 1036 /*flags*/ CAM_DIR_IN, 1037 /*mmc_opcode*/ SD_SWITCH_FUNC, 1038 /*mmc_arg*/ arg, 1039 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC, 1040 /*mmc_data*/ &mmc_d, 1041 /*timeout*/ 0); 1042 1043 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 1044 err = mmc_handle_reply(ccb); 1045 return (err); 1046 } 1047 1048 static int 1049 mmc_set_timing(struct cam_periph *periph, 1050 union ccb *ccb, 1051 enum mmc_bus_timing timing) 1052 { 1053 u_char switch_res[64]; 1054 int err; 1055 uint8_t value; 1056 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1057 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1058 1059 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, 1060 ("mmc_set_timing(timing=%d)", timing)); 1061 switch (timing) { 1062 case bus_timing_normal: 1063 value = 0; 1064 break; 1065 case bus_timing_hs: 1066 value = 1; 1067 break; 1068 default: 1069 return (MMC_ERR_INVALID); 1070 } 1071 if (mmcp->card_features & CARD_FEATURE_MMC) { 1072 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL, 1073 EXT_CSD_HS_TIMING, value, softc->cmd6_time); 1074 } else { 1075 err = mmc_sd_switch(periph, ccb, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, value, switch_res); 1076 } 1077 1078 /* Set high-speed timing on the host */ 1079 struct ccb_trans_settings_mmc *cts; 1080 cts = &ccb->cts.proto_specific.mmc; 1081 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1082 ccb->ccb_h.flags = CAM_DIR_NONE; 1083 ccb->ccb_h.retry_count = 0; 1084 ccb->ccb_h.timeout = 100; 1085 ccb->ccb_h.cbfcnp = NULL; 1086 cts->ios.timing = timing; 1087 cts->ios_valid = MMC_BT; 1088 xpt_action(ccb); 1089 1090 return (err); 1091 } 1092 1093 static void 1094 sdda_start_init_task(void *context, int pending) { 1095 union ccb *new_ccb; 1096 struct cam_periph *periph; 1097 1098 periph = (struct cam_periph *)context; 1099 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init_task\n")); 1100 new_ccb = xpt_alloc_ccb(); 1101 xpt_setup_ccb(&new_ccb->ccb_h, periph->path, 1102 CAM_PRIORITY_NONE); 1103 1104 cam_periph_lock(periph); 1105 cam_periph_hold(periph, PRIBIO|PCATCH); 1106 sdda_start_init(context, new_ccb); 1107 cam_periph_unhold(periph); 1108 cam_periph_unlock(periph); 1109 xpt_free_ccb(new_ccb); 1110 } 1111 1112 static void 1113 sdda_set_bus_width(struct cam_periph *periph, union ccb *ccb, int width) { 1114 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1115 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1116 int err; 1117 1118 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_set_bus_width\n")); 1119 1120 /* First set for the card, then for the host */ 1121 if (mmcp->card_features & CARD_FEATURE_MMC) { 1122 uint8_t value; 1123 switch (width) { 1124 case bus_width_1: 1125 value = EXT_CSD_BUS_WIDTH_1; 1126 break; 1127 case bus_width_4: 1128 value = EXT_CSD_BUS_WIDTH_4; 1129 break; 1130 case bus_width_8: 1131 value = EXT_CSD_BUS_WIDTH_8; 1132 break; 1133 default: 1134 panic("Invalid bus width %d", width); 1135 } 1136 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL, 1137 EXT_CSD_BUS_WIDTH, value, softc->cmd6_time); 1138 } else { 1139 /* For SD cards we send ACMD6 with the required bus width in arg */ 1140 struct mmc_command cmd; 1141 memset(&cmd, 0, sizeof(struct mmc_command)); 1142 cmd.opcode = ACMD_SET_BUS_WIDTH; 1143 cmd.arg = width; 1144 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1145 err = mmc_exec_app_cmd(periph, ccb, &cmd); 1146 } 1147 1148 if (err != MMC_ERR_NONE) { 1149 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Error %d when setting bus width on the card\n", err)); 1150 return; 1151 } 1152 /* Now card is done, set the host to the same width */ 1153 struct ccb_trans_settings_mmc *cts; 1154 cts = &ccb->cts.proto_specific.mmc; 1155 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1156 ccb->ccb_h.flags = CAM_DIR_NONE; 1157 ccb->ccb_h.retry_count = 0; 1158 ccb->ccb_h.timeout = 100; 1159 ccb->ccb_h.cbfcnp = NULL; 1160 cts->ios.bus_width = width; 1161 cts->ios_valid = MMC_BW; 1162 xpt_action(ccb); 1163 } 1164 1165 static inline const char 1166 *part_type(u_int type) 1167 { 1168 1169 switch (type) { 1170 case EXT_CSD_PART_CONFIG_ACC_RPMB: 1171 return ("RPMB"); 1172 case EXT_CSD_PART_CONFIG_ACC_DEFAULT: 1173 return ("default"); 1174 case EXT_CSD_PART_CONFIG_ACC_BOOT0: 1175 return ("boot0"); 1176 case EXT_CSD_PART_CONFIG_ACC_BOOT1: 1177 return ("boot1"); 1178 case EXT_CSD_PART_CONFIG_ACC_GP0: 1179 case EXT_CSD_PART_CONFIG_ACC_GP1: 1180 case EXT_CSD_PART_CONFIG_ACC_GP2: 1181 case EXT_CSD_PART_CONFIG_ACC_GP3: 1182 return ("general purpose"); 1183 default: 1184 return ("(unknown type)"); 1185 } 1186 } 1187 1188 static inline const char 1189 *bus_width_str(enum mmc_bus_width w) 1190 { 1191 1192 switch (w) { 1193 case bus_width_1: 1194 return ("1-bit"); 1195 case bus_width_4: 1196 return ("4-bit"); 1197 case bus_width_8: 1198 return ("8-bit"); 1199 } 1200 } 1201 1202 static uint32_t 1203 sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb) 1204 { 1205 struct ccb_trans_settings_mmc *cts; 1206 1207 cts = &ccb->cts.proto_specific.mmc; 1208 1209 ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1210 ccb->ccb_h.flags = CAM_DIR_NONE; 1211 ccb->ccb_h.retry_count = 0; 1212 ccb->ccb_h.timeout = 100; 1213 ccb->ccb_h.cbfcnp = NULL; 1214 xpt_action(ccb); 1215 1216 if (ccb->ccb_h.status != CAM_REQ_CMP) 1217 panic("Cannot get host caps"); 1218 return (cts->host_caps); 1219 } 1220 1221 static uint32_t 1222 sdda_get_max_data(struct cam_periph *periph, union ccb *ccb) 1223 { 1224 struct ccb_trans_settings_mmc *cts; 1225 1226 cts = &ccb->cts.proto_specific.mmc; 1227 memset(cts, 0, sizeof(struct ccb_trans_settings_mmc)); 1228 1229 ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1230 ccb->ccb_h.flags = CAM_DIR_NONE; 1231 ccb->ccb_h.retry_count = 0; 1232 ccb->ccb_h.timeout = 100; 1233 ccb->ccb_h.cbfcnp = NULL; 1234 xpt_action(ccb); 1235 1236 if (ccb->ccb_h.status != CAM_REQ_CMP) 1237 panic("Cannot get host max data"); 1238 KASSERT(cts->host_max_data != 0, ("host_max_data == 0?!")); 1239 return (cts->host_max_data); 1240 } 1241 1242 static void 1243 sdda_start_init(void *context, union ccb *start_ccb) 1244 { 1245 struct cam_periph *periph = (struct cam_periph *)context; 1246 struct ccb_trans_settings_mmc *cts; 1247 uint32_t host_caps; 1248 uint32_t sec_count; 1249 int err; 1250 int host_f_max; 1251 uint8_t card_type; 1252 1253 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init\n")); 1254 /* periph was held for us when this task was enqueued */ 1255 if ((periph->flags & CAM_PERIPH_INVALID) != 0) { 1256 cam_periph_release(periph); 1257 return; 1258 } 1259 1260 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1261 //struct ccb_mmcio *mmcio = &start_ccb->mmcio; 1262 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1263 struct cam_ed *device = periph->path->device; 1264 1265 if (mmcp->card_features & CARD_FEATURE_MMC) { 1266 mmc_decode_csd_mmc(mmcp->card_csd, &softc->csd); 1267 mmc_decode_cid_mmc(mmcp->card_cid, &softc->cid); 1268 if (mmc_get_spec_vers(periph) >= 4) { 1269 err = mmc_send_ext_csd(periph, start_ccb, 1270 (uint8_t *)&softc->raw_ext_csd, 1271 sizeof(softc->raw_ext_csd)); 1272 if (err != 0) { 1273 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1274 ("Cannot read EXT_CSD, err %d", err)); 1275 return; 1276 } 1277 } 1278 } else { 1279 mmc_decode_csd_sd(mmcp->card_csd, &softc->csd); 1280 mmc_decode_cid_sd(mmcp->card_cid, &softc->cid); 1281 } 1282 1283 softc->sector_count = softc->csd.capacity / 512; 1284 softc->mediasize = softc->csd.capacity; 1285 softc->cmd6_time = mmc_get_cmd6_timeout(periph); 1286 1287 /* MMC >= 4.x have EXT_CSD that has its own opinion about capacity */ 1288 if (mmc_get_spec_vers(periph) >= 4) { 1289 sec_count = softc->raw_ext_csd[EXT_CSD_SEC_CNT] + 1290 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1291 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1292 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1293 if (sec_count != 0) { 1294 softc->sector_count = sec_count; 1295 softc->mediasize = softc->sector_count * 512; 1296 /* FIXME: there should be a better name for this option...*/ 1297 mmcp->card_features |= CARD_FEATURE_SDHC; 1298 } 1299 } 1300 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1301 ("Capacity: %"PRIu64", sectors: %"PRIu64"\n", 1302 softc->mediasize, 1303 softc->sector_count)); 1304 mmc_format_card_id_string(softc, mmcp); 1305 1306 /* Update info for CAM */ 1307 device->serial_num_len = strlen(softc->card_sn_string); 1308 device->serial_num = (u_int8_t *)malloc((device->serial_num_len + 1), 1309 M_CAMXPT, M_NOWAIT); 1310 strlcpy(device->serial_num, softc->card_sn_string, device->serial_num_len + 1); 1311 1312 device->device_id_len = strlen(softc->card_id_string); 1313 device->device_id = (u_int8_t *)malloc((device->device_id_len + 1), 1314 M_CAMXPT, M_NOWAIT); 1315 strlcpy(device->device_id, softc->card_id_string, device->device_id_len + 1); 1316 1317 strlcpy(mmcp->model, softc->card_id_string, sizeof(mmcp->model)); 1318 1319 /* Set the clock frequency that the card can handle */ 1320 cts = &start_ccb->cts.proto_specific.mmc; 1321 1322 /* First, get the host's max freq */ 1323 start_ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1324 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1325 start_ccb->ccb_h.retry_count = 0; 1326 start_ccb->ccb_h.timeout = 100; 1327 start_ccb->ccb_h.cbfcnp = NULL; 1328 xpt_action(start_ccb); 1329 1330 if (start_ccb->ccb_h.status != CAM_REQ_CMP) 1331 panic("Cannot get max host freq"); 1332 host_f_max = cts->host_f_max; 1333 host_caps = cts->host_caps; 1334 if (cts->ios.bus_width != bus_width_1) 1335 panic("Bus width in ios is not 1-bit"); 1336 1337 /* Now check if the card supports High-speed */ 1338 softc->card_f_max = softc->csd.tran_speed; 1339 1340 if (host_caps & MMC_CAP_HSPEED) { 1341 /* Find out if the card supports High speed timing */ 1342 if (mmcp->card_features & CARD_FEATURE_SD20) { 1343 /* Get and decode SCR */ 1344 uint32_t rawscr[2]; 1345 uint8_t res[64]; 1346 if (mmc_app_get_scr(periph, start_ccb, rawscr)) { 1347 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Cannot get SCR\n")); 1348 goto finish_hs_tests; 1349 } 1350 mmc_app_decode_scr(rawscr, &softc->scr); 1351 1352 if ((softc->scr.sda_vsn >= 1) && (softc->csd.ccc & (1<<10))) { 1353 mmc_sd_switch(periph, start_ccb, SD_SWITCH_MODE_CHECK, 1354 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, res); 1355 if (res[13] & 2) { 1356 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS\n")); 1357 softc->card_f_max = SD_HS_MAX; 1358 } 1359 1360 /* 1361 * We deselect then reselect the card here. Some cards 1362 * become unselected and timeout with the above two 1363 * commands, although the state tables / diagrams in the 1364 * standard suggest they go back to the transfer state. 1365 * Other cards don't become deselected, and if we 1366 * attempt to blindly re-select them, we get timeout 1367 * errors from some controllers. So we deselect then 1368 * reselect to handle all situations. 1369 */ 1370 mmc_select_card(periph, start_ccb, 0); 1371 mmc_select_card(periph, start_ccb, get_rca(periph)); 1372 } else { 1373 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Not trying the switch\n")); 1374 goto finish_hs_tests; 1375 } 1376 } 1377 1378 if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) { 1379 card_type = softc->raw_ext_csd[EXT_CSD_CARD_TYPE]; 1380 if (card_type & EXT_CSD_CARD_TYPE_HS_52) 1381 softc->card_f_max = MMC_TYPE_HS_52_MAX; 1382 else if (card_type & EXT_CSD_CARD_TYPE_HS_26) 1383 softc->card_f_max = MMC_TYPE_HS_26_MAX; 1384 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 && 1385 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1386 setbit(&softc->timings, bus_timing_mmc_ddr52); 1387 setbit(&softc->vccq_120, bus_timing_mmc_ddr52); 1388 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports DDR52 at 1.2V\n")); 1389 } 1390 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 && 1391 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1392 setbit(&softc->timings, bus_timing_mmc_ddr52); 1393 setbit(&softc->vccq_180, bus_timing_mmc_ddr52); 1394 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports DDR52 at 1.8V\n")); 1395 } 1396 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 && 1397 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1398 setbit(&softc->timings, bus_timing_mmc_hs200); 1399 setbit(&softc->vccq_120, bus_timing_mmc_hs200); 1400 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS200 at 1.2V\n")); 1401 } 1402 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 && 1403 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1404 setbit(&softc->timings, bus_timing_mmc_hs200); 1405 setbit(&softc->vccq_180, bus_timing_mmc_hs200); 1406 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS200 at 1.8V\n")); 1407 } 1408 } 1409 } 1410 int f_max; 1411 finish_hs_tests: 1412 f_max = min(host_f_max, softc->card_f_max); 1413 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Set SD freq to %d MHz (min out of host f=%d MHz and card f=%d MHz)\n", f_max / 1000000, host_f_max / 1000000, softc->card_f_max / 1000000)); 1414 1415 /* Enable high-speed timing on the card */ 1416 if (f_max > 25000000) { 1417 err = mmc_set_timing(periph, start_ccb, bus_timing_hs); 1418 if (err != MMC_ERR_NONE) { 1419 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("Cannot switch card to high-speed mode")); 1420 f_max = 25000000; 1421 } 1422 } 1423 /* If possible, set lower-level signaling */ 1424 enum mmc_bus_timing timing; 1425 /* FIXME: MMCCAM supports max. bus_timing_mmc_ddr52 at the moment. */ 1426 for (timing = bus_timing_mmc_ddr52; timing > bus_timing_normal; timing--) { 1427 if (isset(&softc->vccq_120, timing)) { 1428 /* Set VCCQ = 1.2V */ 1429 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1430 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1431 start_ccb->ccb_h.retry_count = 0; 1432 start_ccb->ccb_h.timeout = 100; 1433 start_ccb->ccb_h.cbfcnp = NULL; 1434 cts->ios.vccq = vccq_120; 1435 cts->ios_valid = MMC_VCCQ; 1436 xpt_action(start_ccb); 1437 break; 1438 } else if (isset(&softc->vccq_180, timing)) { 1439 /* Set VCCQ = 1.8V */ 1440 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1441 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1442 start_ccb->ccb_h.retry_count = 0; 1443 start_ccb->ccb_h.timeout = 100; 1444 start_ccb->ccb_h.cbfcnp = NULL; 1445 cts->ios.vccq = vccq_180; 1446 cts->ios_valid = MMC_VCCQ; 1447 xpt_action(start_ccb); 1448 break; 1449 } else { 1450 /* Set VCCQ = 3.3V */ 1451 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1452 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1453 start_ccb->ccb_h.retry_count = 0; 1454 start_ccb->ccb_h.timeout = 100; 1455 start_ccb->ccb_h.cbfcnp = NULL; 1456 cts->ios.vccq = vccq_330; 1457 cts->ios_valid = MMC_VCCQ; 1458 xpt_action(start_ccb); 1459 break; 1460 } 1461 } 1462 1463 /* Set frequency on the controller */ 1464 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1465 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1466 start_ccb->ccb_h.retry_count = 0; 1467 start_ccb->ccb_h.timeout = 100; 1468 start_ccb->ccb_h.cbfcnp = NULL; 1469 cts->ios.clock = f_max; 1470 cts->ios_valid = MMC_CLK; 1471 xpt_action(start_ccb); 1472 1473 /* Set bus width */ 1474 enum mmc_bus_width desired_bus_width = bus_width_1; 1475 enum mmc_bus_width max_host_bus_width = 1476 (host_caps & MMC_CAP_8_BIT_DATA ? bus_width_8 : 1477 host_caps & MMC_CAP_4_BIT_DATA ? bus_width_4 : bus_width_1); 1478 enum mmc_bus_width max_card_bus_width = bus_width_1; 1479 if (mmcp->card_features & CARD_FEATURE_SD20 && 1480 softc->scr.bus_widths & SD_SCR_BUS_WIDTH_4) 1481 max_card_bus_width = bus_width_4; 1482 /* 1483 * Unlike SD, MMC cards don't have any information about supported bus width... 1484 * So we need to perform read/write test to find out the width. 1485 */ 1486 /* TODO: figure out bus width for MMC; use 8-bit for now (to test on BBB) */ 1487 if (mmcp->card_features & CARD_FEATURE_MMC) 1488 max_card_bus_width = bus_width_8; 1489 1490 desired_bus_width = min(max_host_bus_width, max_card_bus_width); 1491 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1492 ("Set bus width to %s (min of host %s and card %s)\n", 1493 bus_width_str(desired_bus_width), 1494 bus_width_str(max_host_bus_width), 1495 bus_width_str(max_card_bus_width))); 1496 sdda_set_bus_width(periph, start_ccb, desired_bus_width); 1497 1498 softc->state = SDDA_STATE_NORMAL; 1499 1500 cam_periph_unhold(periph); 1501 /* MMC partitions support */ 1502 if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) { 1503 sdda_process_mmc_partitions(periph, start_ccb); 1504 } else if (mmcp->card_features & CARD_FEATURE_SD20) { 1505 /* For SD[HC] cards, just add one partition that is the whole card */ 1506 if (sdda_add_part(periph, 0, "sdda", 1507 periph->unit_number, 1508 mmc_get_media_size(periph), 1509 sdda_get_read_only(periph, start_ccb)) == false) 1510 return; 1511 softc->part_curr = 0; 1512 } 1513 cam_periph_hold(periph, PRIBIO|PCATCH); 1514 1515 xpt_announce_periph(periph, softc->card_id_string); 1516 /* 1517 * Add async callbacks for bus reset and bus device reset calls. 1518 * I don't bother checking if this fails as, in most cases, 1519 * the system will function just fine without them and the only 1520 * alternative would be to not attach the device on failure. 1521 */ 1522 xpt_register_async(AC_LOST_DEVICE | AC_GETDEV_CHANGED | 1523 AC_ADVINFO_CHANGED, sddaasync, periph, periph->path); 1524 } 1525 1526 static bool 1527 sdda_add_part(struct cam_periph *periph, u_int type, const char *name, 1528 u_int cnt, off_t media_size, bool ro) 1529 { 1530 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1531 struct sdda_part *part; 1532 struct ccb_pathinq cpi; 1533 1534 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1535 ("Partition type '%s', size %ju %s\n", 1536 part_type(type), 1537 media_size, 1538 ro ? "(read-only)" : "")); 1539 1540 part = sc->part[type] = malloc(sizeof(*part), M_DEVBUF, 1541 M_NOWAIT | M_ZERO); 1542 if (part == NULL) { 1543 printf("Cannot add partition for sdda\n"); 1544 return (false); 1545 } 1546 1547 part->cnt = cnt; 1548 part->type = type; 1549 part->ro = ro; 1550 part->sc = sc; 1551 snprintf(part->name, sizeof(part->name), name, periph->unit_number); 1552 1553 /* 1554 * Due to the nature of RPMB partition it doesn't make much sense 1555 * to add it as a disk. It would be more appropriate to create a 1556 * userland tool to operate on the partition or leverage the existing 1557 * tools from sysutils/mmc-utils. 1558 */ 1559 if (type == EXT_CSD_PART_CONFIG_ACC_RPMB) { 1560 /* TODO: Create device, assign IOCTL handler */ 1561 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1562 ("Don't know what to do with RPMB partitions yet\n")); 1563 return (false); 1564 } 1565 1566 bioq_init(&part->bio_queue); 1567 1568 bzero(&cpi, sizeof(cpi)); 1569 xpt_setup_ccb(&cpi.ccb_h, periph->path, CAM_PRIORITY_NONE); 1570 cpi.ccb_h.func_code = XPT_PATH_INQ; 1571 xpt_action((union ccb *)&cpi); 1572 1573 /* 1574 * Register this media as a disk 1575 */ 1576 (void)cam_periph_hold(periph, PRIBIO); 1577 cam_periph_unlock(periph); 1578 1579 part->disk = disk_alloc(); 1580 part->disk->d_rotation_rate = DISK_RR_NON_ROTATING; 1581 part->disk->d_devstat = devstat_new_entry(part->name, 1582 cnt, 512, 1583 DEVSTAT_ALL_SUPPORTED, 1584 DEVSTAT_TYPE_DIRECT | XPORT_DEVSTAT_TYPE(cpi.transport), 1585 DEVSTAT_PRIORITY_DISK); 1586 1587 part->disk->d_open = sddaopen; 1588 part->disk->d_close = sddaclose; 1589 part->disk->d_strategy = sddastrategy; 1590 part->disk->d_getattr = sddagetattr; 1591 // sc->disk->d_dump = sddadump; 1592 part->disk->d_gone = sddadiskgonecb; 1593 part->disk->d_name = part->name; 1594 part->disk->d_drv1 = part; 1595 part->disk->d_maxsize = 1596 MIN(maxphys, sdda_get_max_data(periph, 1597 (union ccb *)&cpi) * mmc_get_sector_size(periph)); 1598 part->disk->d_unit = cnt; 1599 part->disk->d_flags = 0; 1600 strlcpy(part->disk->d_descr, sc->card_id_string, 1601 MIN(sizeof(part->disk->d_descr), sizeof(sc->card_id_string))); 1602 strlcpy(part->disk->d_ident, sc->card_sn_string, 1603 MIN(sizeof(part->disk->d_ident), sizeof(sc->card_sn_string))); 1604 part->disk->d_hba_vendor = cpi.hba_vendor; 1605 part->disk->d_hba_device = cpi.hba_device; 1606 part->disk->d_hba_subvendor = cpi.hba_subvendor; 1607 part->disk->d_hba_subdevice = cpi.hba_subdevice; 1608 snprintf(part->disk->d_attachment, sizeof(part->disk->d_attachment), 1609 "%s%d", cpi.dev_name, cpi.unit_number); 1610 1611 part->disk->d_sectorsize = mmc_get_sector_size(periph); 1612 part->disk->d_mediasize = media_size; 1613 part->disk->d_stripesize = 0; 1614 part->disk->d_fwsectors = 0; 1615 part->disk->d_fwheads = 0; 1616 1617 if (sdda_mmcsd_compat) 1618 disk_add_alias(part->disk, "mmcsd"); 1619 1620 /* 1621 * Acquire a reference to the periph before we register with GEOM. 1622 * We'll release this reference once GEOM calls us back (via 1623 * sddadiskgonecb()) telling us that our provider has been freed. 1624 */ 1625 if (cam_periph_acquire(periph) != 0) { 1626 xpt_print(periph->path, "%s: lost periph during " 1627 "registration!\n", __func__); 1628 cam_periph_lock(periph); 1629 return (false); 1630 } 1631 disk_create(part->disk, DISK_VERSION); 1632 cam_periph_lock(periph); 1633 cam_periph_unhold(periph); 1634 1635 return (true); 1636 } 1637 1638 /* 1639 * For MMC cards, process EXT_CSD and add partitions that are supported by 1640 * this device. 1641 */ 1642 static void 1643 sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *ccb) 1644 { 1645 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1646 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1647 off_t erase_size, sector_size, size, wp_size; 1648 int i; 1649 const uint8_t *ext_csd; 1650 uint8_t rev; 1651 bool comp, ro; 1652 1653 ext_csd = sc->raw_ext_csd; 1654 1655 /* 1656 * Enhanced user data area and general purpose partitions are only 1657 * supported in revision 1.4 (EXT_CSD_REV == 4) and later, the RPMB 1658 * partition in revision 1.5 (MMC v4.41, EXT_CSD_REV == 5) and later. 1659 */ 1660 rev = ext_csd[EXT_CSD_REV]; 1661 1662 /* 1663 * Ignore user-creatable enhanced user data area and general purpose 1664 * partitions partitions as long as partitioning hasn't been finished. 1665 */ 1666 comp = (ext_csd[EXT_CSD_PART_SET] & EXT_CSD_PART_SET_COMPLETED) != 0; 1667 1668 /* 1669 * Add enhanced user data area slice, unless it spans the entirety of 1670 * the user data area. The enhanced area is of a multiple of high 1671 * capacity write protect groups ((ERASE_GRP_SIZE + HC_WP_GRP_SIZE) * 1672 * 512 KB) and its offset given in either sectors or bytes, depending 1673 * on whether it's a high capacity device or not. 1674 * NB: The slicer and its slices need to be registered before adding 1675 * the disk for the corresponding user data area as re-tasting is 1676 * racy. 1677 */ 1678 sector_size = mmc_get_sector_size(periph); 1679 size = ext_csd[EXT_CSD_ENH_SIZE_MULT] + 1680 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) + 1681 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16); 1682 if (rev >= 4 && comp == TRUE && size > 0 && 1683 (ext_csd[EXT_CSD_PART_SUPPORT] & 1684 EXT_CSD_PART_SUPPORT_ENH_ATTR_EN) != 0 && 1685 (ext_csd[EXT_CSD_PART_ATTR] & (EXT_CSD_PART_ATTR_ENH_USR)) != 0) { 1686 erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 * 1687 MMC_SECTOR_SIZE; 1688 wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1689 size *= erase_size * wp_size; 1690 if (size != mmc_get_media_size(periph) * sector_size) { 1691 sc->enh_size = size; 1692 sc->enh_base = (ext_csd[EXT_CSD_ENH_START_ADDR] + 1693 (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) + 1694 (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) + 1695 (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24)) * 1696 ((mmcp->card_features & CARD_FEATURE_SDHC) ? 1: MMC_SECTOR_SIZE); 1697 } else 1698 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1699 ("enhanced user data area spans entire device")); 1700 } 1701 1702 /* 1703 * Add default partition. This may be the only one or the user 1704 * data area in case partitions are supported. 1705 */ 1706 ro = sdda_get_read_only(periph, ccb); 1707 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_DEFAULT, "sdda", 1708 periph->unit_number, mmc_get_media_size(periph), ro); 1709 sc->part_curr = EXT_CSD_PART_CONFIG_ACC_DEFAULT; 1710 1711 if (mmc_get_spec_vers(periph) < 3) 1712 return; 1713 1714 /* Belatedly announce enhanced user data slice. */ 1715 if (sc->enh_size != 0) { 1716 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1717 ("enhanced user data area off 0x%jx size %ju bytes\n", 1718 sc->enh_base, sc->enh_size)); 1719 } 1720 1721 /* 1722 * Determine partition switch timeout (provided in units of 10 ms) 1723 * and ensure it's at least 300 ms as some eMMC chips lie. 1724 */ 1725 sc->part_time = max(ext_csd[EXT_CSD_PART_SWITCH_TO] * 10 * 1000, 1726 300 * 1000); 1727 1728 /* Add boot partitions, which are of a fixed multiple of 128 KB. */ 1729 size = ext_csd[EXT_CSD_BOOT_SIZE_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE; 1730 if (size > 0 && (sdda_get_host_caps(periph, ccb) & MMC_CAP_BOOT_NOACC) == 0) { 1731 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT0, 1732 SDDA_FMT_BOOT, 0, size, 1733 ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] & 1734 EXT_CSD_BOOT_WP_STATUS_BOOT0_MASK) != 0)); 1735 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT1, 1736 SDDA_FMT_BOOT, 1, size, 1737 ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] & 1738 EXT_CSD_BOOT_WP_STATUS_BOOT1_MASK) != 0)); 1739 } 1740 1741 /* Add RPMB partition, which also is of a fixed multiple of 128 KB. */ 1742 size = ext_csd[EXT_CSD_RPMB_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE; 1743 if (rev >= 5 && size > 0) 1744 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_RPMB, 1745 SDDA_FMT_RPMB, 0, size, ro); 1746 1747 if (rev <= 3 || comp == FALSE) 1748 return; 1749 1750 /* 1751 * Add general purpose partitions, which are of a multiple of high 1752 * capacity write protect groups, too. 1753 */ 1754 if ((ext_csd[EXT_CSD_PART_SUPPORT] & EXT_CSD_PART_SUPPORT_EN) != 0) { 1755 erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 * 1756 MMC_SECTOR_SIZE; 1757 wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1758 for (i = 0; i < MMC_PART_GP_MAX; i++) { 1759 size = ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3] + 1760 (ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 1] << 8) + 1761 (ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 2] << 16); 1762 if (size == 0) 1763 continue; 1764 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_GP0 + i, 1765 SDDA_FMT_GP, i, size * erase_size * wp_size, ro); 1766 } 1767 } 1768 } 1769 1770 /* 1771 * We cannot just call mmc_switch() since it will sleep, and we are in 1772 * GEOM context and cannot sleep. Instead, create an MMCIO request to switch 1773 * partitions and send it to h/w, and upon completion resume processing 1774 * the I/O queue. 1775 * This function cannot fail, instead check switch errors in sddadone(). 1776 */ 1777 static void 1778 sdda_init_switch_part(struct cam_periph *periph, union ccb *start_ccb, 1779 uint8_t part) 1780 { 1781 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1782 uint8_t value; 1783 1784 KASSERT(part < MMC_PART_MAX, ("%s: invalid partition index", __func__)); 1785 sc->part_requested = part; 1786 1787 value = (sc->raw_ext_csd[EXT_CSD_PART_CONFIG] & 1788 ~EXT_CSD_PART_CONFIG_ACC_MASK) | part; 1789 1790 mmc_switch_fill_mmcio(start_ccb, EXT_CSD_CMD_SET_NORMAL, 1791 EXT_CSD_PART_CONFIG, value, sc->part_time); 1792 start_ccb->ccb_h.cbfcnp = sddadone; 1793 1794 sc->outstanding_cmds++; 1795 cam_periph_unlock(periph); 1796 xpt_action(start_ccb); 1797 cam_periph_lock(periph); 1798 } 1799 1800 /* Called with periph lock held! */ 1801 static void 1802 sddastart(struct cam_periph *periph, union ccb *start_ccb) 1803 { 1804 struct bio *bp; 1805 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1806 struct sdda_part *part; 1807 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1808 uint8_t part_index; 1809 1810 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastart\n")); 1811 1812 if (softc->state != SDDA_STATE_NORMAL) { 1813 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("device is not in SDDA_STATE_NORMAL yet\n")); 1814 xpt_release_ccb(start_ccb); 1815 return; 1816 } 1817 1818 /* Find partition that has outstanding commands. Prefer current partition. */ 1819 part_index = softc->part_curr; 1820 part = softc->part[softc->part_curr]; 1821 bp = bioq_first(&part->bio_queue); 1822 if (bp == NULL) { 1823 for (part_index = 0; part_index < MMC_PART_MAX; part_index++) { 1824 if ((part = softc->part[part_index]) != NULL && 1825 (bp = bioq_first(&softc->part[part_index]->bio_queue)) != NULL) 1826 break; 1827 } 1828 } 1829 if (bp == NULL) { 1830 xpt_release_ccb(start_ccb); 1831 return; 1832 } 1833 if (part_index != softc->part_curr) { 1834 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1835 ("Partition %d -> %d\n", softc->part_curr, part_index)); 1836 /* 1837 * According to section "6.2.2 Command restrictions" of the eMMC 1838 * specification v5.1, CMD19/CMD21 aren't allowed to be used with 1839 * RPMB partitions. So we pause re-tuning along with triggering 1840 * it up-front to decrease the likelihood of re-tuning becoming 1841 * necessary while accessing an RPMB partition. Consequently, an 1842 * RPMB partition should immediately be switched away from again 1843 * after an access in order to allow for re-tuning to take place 1844 * anew. 1845 */ 1846 /* TODO: pause retune if switching to RPMB partition */ 1847 softc->state = SDDA_STATE_PART_SWITCH; 1848 sdda_init_switch_part(periph, start_ccb, part_index); 1849 return; 1850 } 1851 1852 bioq_remove(&part->bio_queue, bp); 1853 1854 switch (bp->bio_cmd) { 1855 case BIO_WRITE: 1856 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_WRITE\n")); 1857 part->flags |= SDDA_FLAG_DIRTY; 1858 /* FALLTHROUGH */ 1859 case BIO_READ: 1860 { 1861 struct ccb_mmcio *mmcio; 1862 uint64_t blockno = bp->bio_pblkno; 1863 uint16_t count = bp->bio_bcount / 512; 1864 uint16_t opcode; 1865 1866 if (bp->bio_cmd == BIO_READ) 1867 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_READ\n")); 1868 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, 1869 ("Block %"PRIu64" cnt %u\n", blockno, count)); 1870 1871 /* Construct new MMC command */ 1872 if (bp->bio_cmd == BIO_READ) { 1873 if (count > 1) 1874 opcode = MMC_READ_MULTIPLE_BLOCK; 1875 else 1876 opcode = MMC_READ_SINGLE_BLOCK; 1877 } else { 1878 if (count > 1) 1879 opcode = MMC_WRITE_MULTIPLE_BLOCK; 1880 else 1881 opcode = MMC_WRITE_BLOCK; 1882 } 1883 1884 start_ccb->ccb_h.func_code = XPT_MMC_IO; 1885 start_ccb->ccb_h.flags = (bp->bio_cmd == BIO_READ ? CAM_DIR_IN : CAM_DIR_OUT); 1886 start_ccb->ccb_h.retry_count = 0; 1887 start_ccb->ccb_h.timeout = 15 * 1000; 1888 start_ccb->ccb_h.cbfcnp = sddadone; 1889 1890 mmcio = &start_ccb->mmcio; 1891 mmcio->cmd.opcode = opcode; 1892 mmcio->cmd.arg = blockno; 1893 if (!(mmcp->card_features & CARD_FEATURE_SDHC)) 1894 mmcio->cmd.arg <<= 9; 1895 1896 mmcio->cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1897 mmcio->cmd.data = softc->mmcdata; 1898 memset(mmcio->cmd.data, 0, sizeof(struct mmc_data)); 1899 mmcio->cmd.data->data = bp->bio_data; 1900 mmcio->cmd.data->len = 512 * count; 1901 mmcio->cmd.data->flags = (bp->bio_cmd == BIO_READ ? MMC_DATA_READ : MMC_DATA_WRITE); 1902 /* Direct h/w to issue CMD12 upon completion */ 1903 if (count > 1) { 1904 mmcio->cmd.data->flags |= MMC_DATA_MULTI; 1905 mmcio->stop.opcode = MMC_STOP_TRANSMISSION; 1906 mmcio->stop.flags = MMC_RSP_R1B | MMC_CMD_AC; 1907 mmcio->stop.arg = 0; 1908 } 1909 1910 break; 1911 } 1912 case BIO_FLUSH: 1913 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_FLUSH\n")); 1914 sddaschedule(periph); 1915 break; 1916 case BIO_DELETE: 1917 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_DELETE\n")); 1918 sddaschedule(periph); 1919 break; 1920 default: 1921 biofinish(bp, NULL, EOPNOTSUPP); 1922 xpt_release_ccb(start_ccb); 1923 return; 1924 } 1925 start_ccb->ccb_h.ccb_bp = bp; 1926 softc->outstanding_cmds++; 1927 softc->refcount++; 1928 cam_periph_unlock(periph); 1929 xpt_action(start_ccb); 1930 cam_periph_lock(periph); 1931 1932 /* May have more work to do, so ensure we stay scheduled */ 1933 sddaschedule(periph); 1934 } 1935 1936 static void 1937 sddadone(struct cam_periph *periph, union ccb *done_ccb) 1938 { 1939 struct bio *bp; 1940 struct sdda_softc *softc; 1941 struct ccb_mmcio *mmcio; 1942 struct cam_path *path; 1943 uint32_t card_status; 1944 int error = 0; 1945 1946 softc = (struct sdda_softc *)periph->softc; 1947 mmcio = &done_ccb->mmcio; 1948 path = done_ccb->ccb_h.path; 1949 1950 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddadone\n")); 1951 // cam_periph_lock(periph); 1952 if ((done_ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) { 1953 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("Error!!!\n")); 1954 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0) 1955 cam_release_devq(path, 1956 /*relsim_flags*/0, 1957 /*reduction*/0, 1958 /*timeout*/0, 1959 /*getcount_only*/0); 1960 error = 5; /* EIO */ 1961 } else { 1962 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0) 1963 panic("REQ_CMP with QFRZN"); 1964 error = 0; 1965 } 1966 1967 card_status = mmcio->cmd.resp[0]; 1968 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1969 ("Card status: %08x\n", R1_STATUS(card_status))); 1970 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1971 ("Current state: %d\n", R1_CURRENT_STATE(card_status))); 1972 1973 /* Process result of switching MMC partitions */ 1974 if (softc->state == SDDA_STATE_PART_SWITCH) { 1975 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1976 ("Completing partition switch to %d\n", 1977 softc->part_requested)); 1978 softc->outstanding_cmds--; 1979 /* Complete partition switch */ 1980 softc->state = SDDA_STATE_NORMAL; 1981 if (error != MMC_ERR_NONE) { 1982 /* TODO: Unpause retune if accessing RPMB */ 1983 xpt_release_ccb(done_ccb); 1984 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 1985 return; 1986 } 1987 1988 softc->raw_ext_csd[EXT_CSD_PART_CONFIG] = 1989 (softc->raw_ext_csd[EXT_CSD_PART_CONFIG] & 1990 ~EXT_CSD_PART_CONFIG_ACC_MASK) | softc->part_requested; 1991 /* TODO: Unpause retune if accessing RPMB */ 1992 softc->part_curr = softc->part_requested; 1993 xpt_release_ccb(done_ccb); 1994 1995 /* Return to processing BIO requests */ 1996 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 1997 return; 1998 } 1999 2000 bp = (struct bio *)done_ccb->ccb_h.ccb_bp; 2001 bp->bio_error = error; 2002 if (error != 0) { 2003 bp->bio_resid = bp->bio_bcount; 2004 bp->bio_flags |= BIO_ERROR; 2005 } else { 2006 /* XXX: How many bytes remaining? */ 2007 bp->bio_resid = 0; 2008 if (bp->bio_resid > 0) 2009 bp->bio_flags |= BIO_ERROR; 2010 } 2011 2012 softc->outstanding_cmds--; 2013 xpt_release_ccb(done_ccb); 2014 /* 2015 * Release the periph refcount taken in sddastart() for each CCB. 2016 */ 2017 KASSERT(softc->refcount >= 1, ("sddadone softc %p refcount %d", softc, softc->refcount)); 2018 softc->refcount--; 2019 biodone(bp); 2020 } 2021 2022 static int 2023 sddaerror(union ccb *ccb, u_int32_t cam_flags, u_int32_t sense_flags) 2024 { 2025 return(cam_periph_error(ccb, cam_flags, sense_flags)); 2026 } 2027 #endif /* _KERNEL */ 2028