1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006 Bernd Walter <tisco@FreeBSD.org> All rights reserved. 5 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> All rights reserved. 6 * Copyright (c) 2015-2017 Ilya Bakulin <kibab@FreeBSD.org> All rights reserved. 7 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org> 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer, 14 * without modification, immediately at the beginning of the file. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * Some code derived from the sys/dev/mmc and sys/cam/ata 31 * Thanks to Warner Losh <imp@FreeBSD.org>, Alexander Motin <mav@FreeBSD.org> 32 * Bernd Walter <tisco@FreeBSD.org>, and other authors. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 //#include "opt_sdda.h" 39 40 #include <sys/param.h> 41 42 #ifdef _KERNEL 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/bio.h> 46 #include <sys/sysctl.h> 47 #include <sys/endian.h> 48 #include <sys/taskqueue.h> 49 #include <sys/lock.h> 50 #include <sys/mutex.h> 51 #include <sys/conf.h> 52 #include <sys/devicestat.h> 53 #include <sys/eventhandler.h> 54 #include <sys/malloc.h> 55 #include <sys/cons.h> 56 #include <sys/proc.h> 57 #include <sys/reboot.h> 58 #include <geom/geom_disk.h> 59 #include <machine/_inttypes.h> /* for PRIu64 */ 60 #endif /* _KERNEL */ 61 62 #ifndef _KERNEL 63 #include <stdio.h> 64 #include <string.h> 65 #endif /* _KERNEL */ 66 67 #include <cam/cam.h> 68 #include <cam/cam_ccb.h> 69 #include <cam/cam_queue.h> 70 #include <cam/cam_periph.h> 71 #include <cam/cam_sim.h> 72 #include <cam/cam_xpt.h> 73 #include <cam/cam_xpt_sim.h> 74 #include <cam/cam_xpt_periph.h> 75 #include <cam/cam_xpt_internal.h> 76 #include <cam/cam_debug.h> 77 78 #include <cam/mmc/mmc_all.h> 79 80 #ifdef _KERNEL 81 82 typedef enum { 83 SDDA_FLAG_OPEN = 0x0002, 84 SDDA_FLAG_DIRTY = 0x0004 85 } sdda_flags; 86 87 typedef enum { 88 SDDA_STATE_INIT, 89 SDDA_STATE_INVALID, 90 SDDA_STATE_NORMAL, 91 SDDA_STATE_PART_SWITCH, 92 } sdda_state; 93 94 #define SDDA_FMT_BOOT "sdda%dboot" 95 #define SDDA_FMT_GP "sdda%dgp" 96 #define SDDA_FMT_RPMB "sdda%drpmb" 97 #define SDDA_LABEL_ENH "enh" 98 99 #define SDDA_PART_NAMELEN (16 + 1) 100 101 struct sdda_softc; 102 103 struct sdda_part { 104 struct disk *disk; 105 struct bio_queue_head bio_queue; 106 sdda_flags flags; 107 struct sdda_softc *sc; 108 u_int cnt; 109 u_int type; 110 bool ro; 111 char name[SDDA_PART_NAMELEN]; 112 }; 113 114 struct sdda_softc { 115 int outstanding_cmds; /* Number of active commands */ 116 int refcount; /* Active xpt_action() calls */ 117 sdda_state state; 118 struct mmc_data *mmcdata; 119 struct cam_periph *periph; 120 // sdda_quirks quirks; 121 struct task start_init_task; 122 uint32_t raw_csd[4]; 123 uint8_t raw_ext_csd[512]; /* MMC only? */ 124 struct mmc_csd csd; 125 struct mmc_cid cid; 126 struct mmc_scr scr; 127 /* Calculated from CSD */ 128 uint64_t sector_count; 129 uint64_t mediasize; 130 131 /* Calculated from CID */ 132 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 133 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 134 /* Determined from CSD + is highspeed card*/ 135 uint32_t card_f_max; 136 137 /* Generic switch timeout */ 138 uint32_t cmd6_time; 139 uint32_t timings; /* Mask of bus timings supported */ 140 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */ 141 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */ 142 /* MMC partitions support */ 143 struct sdda_part *part[MMC_PART_MAX]; 144 uint8_t part_curr; /* Partition currently switched to */ 145 uint8_t part_requested; /* What partition we're currently switching to */ 146 uint32_t part_time; /* Partition switch timeout [us] */ 147 off_t enh_base; /* Enhanced user data area slice base ... */ 148 off_t enh_size; /* ... and size [bytes] */ 149 int log_count; 150 struct timeval log_time; 151 }; 152 153 static const char *mmc_errmsg[] = 154 { 155 "None", 156 "Timeout", 157 "Bad CRC", 158 "Fifo", 159 "Failed", 160 "Invalid", 161 "NO MEMORY" 162 }; 163 164 #define ccb_bp ppriv_ptr1 165 166 static disk_strategy_t sddastrategy; 167 static dumper_t sddadump; 168 static periph_init_t sddainit; 169 static void sddaasync(void *callback_arg, u_int32_t code, 170 struct cam_path *path, void *arg); 171 static periph_ctor_t sddaregister; 172 static periph_dtor_t sddacleanup; 173 static periph_start_t sddastart; 174 static periph_oninv_t sddaoninvalidate; 175 static void sddadone(struct cam_periph *periph, 176 union ccb *done_ccb); 177 static int sddaerror(union ccb *ccb, u_int32_t cam_flags, 178 u_int32_t sense_flags); 179 180 static int mmc_handle_reply(union ccb *ccb); 181 static uint16_t get_rca(struct cam_periph *periph); 182 static void sdda_start_init(void *context, union ccb *start_ccb); 183 static void sdda_start_init_task(void *context, int pending); 184 static void sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *start_ccb); 185 static uint32_t sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb); 186 static int mmc_select_card(struct cam_periph *periph, union ccb *ccb, uint32_t rca); 187 static inline uint32_t mmc_get_sector_size(struct cam_periph *periph) {return MMC_SECTOR_SIZE;} 188 189 static SYSCTL_NODE(_kern_cam, OID_AUTO, sdda, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 190 "CAM Direct Access Disk driver"); 191 192 static int sdda_mmcsd_compat = 1; 193 SYSCTL_INT(_kern_cam_sdda, OID_AUTO, mmcsd_compat, CTLFLAG_RDTUN, 194 &sdda_mmcsd_compat, 1, "Enable creation of mmcsd aliases."); 195 196 /* TODO: actually issue GET_TRAN_SETTINGS to get R/O status */ 197 static inline bool sdda_get_read_only(struct cam_periph *periph, union ccb *start_ccb) 198 { 199 200 return (false); 201 } 202 203 static uint32_t mmc_get_spec_vers(struct cam_periph *periph); 204 static uint64_t mmc_get_media_size(struct cam_periph *periph); 205 static uint32_t mmc_get_cmd6_timeout(struct cam_periph *periph); 206 static bool sdda_add_part(struct cam_periph *periph, u_int type, 207 const char *name, u_int cnt, off_t media_size, bool ro); 208 209 static struct periph_driver sddadriver = 210 { 211 sddainit, "sdda", 212 TAILQ_HEAD_INITIALIZER(sddadriver.units), /* generation */ 0 213 }; 214 215 PERIPHDRIVER_DECLARE(sdda, sddadriver); 216 217 static MALLOC_DEFINE(M_SDDA, "sd_da", "sd_da buffers"); 218 219 static const int exp[8] = { 220 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 221 }; 222 223 static const int mant[16] = { 224 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 225 }; 226 227 static const int cur_min[8] = { 228 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 229 }; 230 231 static const int cur_max[8] = { 232 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 233 }; 234 235 static uint16_t 236 get_rca(struct cam_periph *periph) { 237 return periph->path->device->mmc_ident_data.card_rca; 238 } 239 240 /* 241 * Figure out if CCB execution resulted in error. 242 * Look at both CAM-level errors and on MMC protocol errors. 243 * 244 * Return value is always MMC error. 245 */ 246 static int 247 mmc_handle_reply(union ccb *ccb) 248 { 249 KASSERT(ccb->ccb_h.func_code == XPT_MMC_IO, 250 ("ccb %p: cannot handle non-XPT_MMC_IO errors, got func_code=%d", 251 ccb, ccb->ccb_h.func_code)); 252 253 /* CAM-level error should always correspond to MMC-level error */ 254 if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) && 255 (ccb->mmcio.cmd.error != MMC_ERR_NONE)) 256 panic("CCB status is OK but MMC error != MMC_ERR_NONE"); 257 258 if (ccb->mmcio.cmd.error != MMC_ERR_NONE) { 259 xpt_print_path(ccb->ccb_h.path); 260 printf("CMD%d failed, err %d (%s)\n", 261 ccb->mmcio.cmd.opcode, 262 ccb->mmcio.cmd.error, 263 mmc_errmsg[ccb->mmcio.cmd.error]); 264 } 265 return (ccb->mmcio.cmd.error); 266 } 267 268 static uint32_t 269 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 270 { 271 const int i = (bit_len / 32) - (start / 32) - 1; 272 const int shift = start & 31; 273 uint32_t retval = bits[i] >> shift; 274 if (size + shift > 32) 275 retval |= bits[i - 1] << (32 - shift); 276 return (retval & ((1llu << size) - 1)); 277 } 278 279 static void 280 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 281 { 282 int v; 283 int m; 284 int e; 285 286 memset(csd, 0, sizeof(*csd)); 287 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 288 289 /* Common members between 1.0 and 2.0 */ 290 m = mmc_get_bits(raw_csd, 128, 115, 4); 291 e = mmc_get_bits(raw_csd, 128, 112, 3); 292 csd->tacc = (exp[e] * mant[m] + 9) / 10; 293 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 294 m = mmc_get_bits(raw_csd, 128, 99, 4); 295 e = mmc_get_bits(raw_csd, 128, 96, 3); 296 csd->tran_speed = exp[e] * 10000 * mant[m]; 297 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 298 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 299 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 300 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 301 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 302 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 303 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 304 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 305 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 306 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 307 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 308 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 309 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 310 311 if (v == 0) { 312 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 313 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 314 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 315 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 316 m = mmc_get_bits(raw_csd, 128, 62, 12); 317 e = mmc_get_bits(raw_csd, 128, 47, 3); 318 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 319 } else if (v == 1) { 320 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) * 321 512 * 1024; 322 } else 323 panic("unknown SD CSD version"); 324 } 325 326 static void 327 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 328 { 329 int m; 330 int e; 331 332 memset(csd, 0, sizeof(*csd)); 333 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 334 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 335 m = mmc_get_bits(raw_csd, 128, 115, 4); 336 e = mmc_get_bits(raw_csd, 128, 112, 3); 337 csd->tacc = exp[e] * mant[m] + 9 / 10; 338 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 339 m = mmc_get_bits(raw_csd, 128, 99, 4); 340 e = mmc_get_bits(raw_csd, 128, 96, 3); 341 csd->tran_speed = exp[e] * 10000 * mant[m]; 342 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 343 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 344 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 345 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 346 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 347 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 348 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 349 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 350 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 351 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 352 m = mmc_get_bits(raw_csd, 128, 62, 12); 353 e = mmc_get_bits(raw_csd, 128, 47, 3); 354 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 355 csd->erase_blk_en = 0; 356 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 357 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 358 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 359 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 360 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 361 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 362 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 363 } 364 365 static void 366 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 367 { 368 int i; 369 370 /* There's no version info, so we take it on faith */ 371 memset(cid, 0, sizeof(*cid)); 372 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 373 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 374 for (i = 0; i < 5; i++) 375 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 376 cid->pnm[5] = 0; 377 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 378 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 379 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 380 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 381 } 382 383 static void 384 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid) 385 { 386 int i; 387 388 /* There's no version info, so we take it on faith */ 389 memset(cid, 0, sizeof(*cid)); 390 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 391 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 392 for (i = 0; i < 6; i++) 393 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 394 cid->pnm[6] = 0; 395 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 396 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 397 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 398 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997; 399 } 400 401 static void 402 mmc_format_card_id_string(struct sdda_softc *sc, struct mmc_params *mmcp) 403 { 404 char oidstr[8]; 405 uint8_t c1; 406 uint8_t c2; 407 408 /* 409 * Format a card ID string for use by the mmcsd driver, it's what 410 * appears between the <> in the following: 411 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0 412 * 22.5MHz/4bit/128-block 413 * 414 * Also format just the card serial number, which the mmcsd driver will 415 * use as the disk->d_ident string. 416 * 417 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 418 * and our max formatted length is currently 55 bytes if every field 419 * contains the largest value. 420 * 421 * Sometimes the oid is two printable ascii chars; when it's not, 422 * format it as 0xnnnn instead. 423 */ 424 c1 = (sc->cid.oid >> 8) & 0x0ff; 425 c2 = sc->cid.oid & 0x0ff; 426 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 427 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 428 else 429 snprintf(oidstr, sizeof(oidstr), "0x%04x", sc->cid.oid); 430 snprintf(sc->card_sn_string, sizeof(sc->card_sn_string), 431 "%08X", sc->cid.psn); 432 snprintf(sc->card_id_string, sizeof(sc->card_id_string), 433 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 434 mmcp->card_features & CARD_FEATURE_MMC ? "MMC" : "SD", 435 mmcp->card_features & CARD_FEATURE_SDHC ? "HC" : "", 436 sc->cid.pnm, sc->cid.prv >> 4, sc->cid.prv & 0x0f, 437 sc->cid.psn, sc->cid.mdt_month, sc->cid.mdt_year, 438 sc->cid.mid, oidstr); 439 } 440 441 static int 442 sddaopen(struct disk *dp) 443 { 444 struct sdda_part *part; 445 struct cam_periph *periph; 446 struct sdda_softc *softc; 447 int error; 448 449 part = (struct sdda_part *)dp->d_drv1; 450 softc = part->sc; 451 periph = softc->periph; 452 if (cam_periph_acquire(periph) != 0) { 453 return(ENXIO); 454 } 455 456 cam_periph_lock(periph); 457 if ((error = cam_periph_hold(periph, PRIBIO|PCATCH)) != 0) { 458 cam_periph_unlock(periph); 459 cam_periph_release(periph); 460 return (error); 461 } 462 463 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaopen\n")); 464 465 part->flags |= SDDA_FLAG_OPEN; 466 467 cam_periph_unhold(periph); 468 cam_periph_unlock(periph); 469 return (0); 470 } 471 472 static int 473 sddaclose(struct disk *dp) 474 { 475 struct sdda_part *part; 476 struct cam_periph *periph; 477 struct sdda_softc *softc; 478 479 part = (struct sdda_part *)dp->d_drv1; 480 softc = part->sc; 481 periph = softc->periph; 482 part->flags &= ~SDDA_FLAG_OPEN; 483 484 cam_periph_lock(periph); 485 486 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaclose\n")); 487 488 while (softc->refcount != 0) 489 cam_periph_sleep(periph, &softc->refcount, PRIBIO, "sddaclose", 1); 490 cam_periph_unlock(periph); 491 cam_periph_release(periph); 492 return (0); 493 } 494 495 static void 496 sddaschedule(struct cam_periph *periph) 497 { 498 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 499 struct sdda_part *part; 500 struct bio *bp; 501 int i; 502 503 /* Check if we have more work to do. */ 504 /* Find partition that has outstanding commands. Prefer current partition. */ 505 bp = bioq_first(&softc->part[softc->part_curr]->bio_queue); 506 if (bp == NULL) { 507 for (i = 0; i < MMC_PART_MAX; i++) { 508 if ((part = softc->part[i]) != NULL && 509 (bp = bioq_first(&softc->part[i]->bio_queue)) != NULL) 510 break; 511 } 512 } 513 if (bp != NULL) { 514 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 515 } 516 } 517 518 /* 519 * Actually translate the requested transfer into one the physical driver 520 * can understand. The transfer is described by a buf and will include 521 * only one physical transfer. 522 */ 523 static void 524 sddastrategy(struct bio *bp) 525 { 526 struct cam_periph *periph; 527 struct sdda_part *part; 528 struct sdda_softc *softc; 529 530 part = (struct sdda_part *)bp->bio_disk->d_drv1; 531 softc = part->sc; 532 periph = softc->periph; 533 534 cam_periph_lock(periph); 535 536 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastrategy(%p)\n", bp)); 537 538 /* 539 * If the device has been made invalid, error out 540 */ 541 if ((periph->flags & CAM_PERIPH_INVALID) != 0) { 542 cam_periph_unlock(periph); 543 biofinish(bp, NULL, ENXIO); 544 return; 545 } 546 547 /* 548 * Place it in the queue of disk activities for this disk 549 */ 550 bioq_disksort(&part->bio_queue, bp); 551 552 /* 553 * Schedule ourselves for performing the work. 554 */ 555 sddaschedule(periph); 556 cam_periph_unlock(periph); 557 558 return; 559 } 560 561 static void 562 sddainit(void) 563 { 564 cam_status status; 565 566 /* 567 * Install a global async callback. This callback will 568 * receive async callbacks like "new device found". 569 */ 570 status = xpt_register_async(AC_FOUND_DEVICE, sddaasync, NULL, NULL); 571 572 if (status != CAM_REQ_CMP) { 573 printf("sdda: Failed to attach master async callback " 574 "due to status 0x%x!\n", status); 575 } 576 } 577 578 /* 579 * Callback from GEOM, called when it has finished cleaning up its 580 * resources. 581 */ 582 static void 583 sddadiskgonecb(struct disk *dp) 584 { 585 struct cam_periph *periph; 586 struct sdda_part *part; 587 588 part = (struct sdda_part *)dp->d_drv1; 589 periph = part->sc->periph; 590 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddadiskgonecb\n")); 591 592 cam_periph_release(periph); 593 } 594 595 static void 596 sddaoninvalidate(struct cam_periph *periph) 597 { 598 struct sdda_softc *softc; 599 struct sdda_part *part; 600 601 softc = (struct sdda_softc *)periph->softc; 602 603 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaoninvalidate\n")); 604 605 /* 606 * De-register any async callbacks. 607 */ 608 xpt_register_async(0, sddaasync, periph, periph->path); 609 610 /* 611 * Return all queued I/O with ENXIO. 612 * XXX Handle any transactions queued to the card 613 * with XPT_ABORT_CCB. 614 */ 615 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush start\n")); 616 for (int i = 0; i < MMC_PART_MAX; i++) { 617 if ((part = softc->part[i]) != NULL) { 618 bioq_flush(&part->bio_queue, NULL, ENXIO); 619 disk_gone(part->disk); 620 } 621 } 622 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush end\n")); 623 } 624 625 static void 626 sddacleanup(struct cam_periph *periph) 627 { 628 struct sdda_softc *softc; 629 struct sdda_part *part; 630 int i; 631 632 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddacleanup\n")); 633 softc = (struct sdda_softc *)periph->softc; 634 635 cam_periph_unlock(periph); 636 637 for (i = 0; i < MMC_PART_MAX; i++) { 638 if ((part = softc->part[i]) != NULL) { 639 disk_destroy(part->disk); 640 free(part, M_DEVBUF); 641 softc->part[i] = NULL; 642 } 643 } 644 free(softc, M_DEVBUF); 645 cam_periph_lock(periph); 646 } 647 648 static void 649 sddaasync(void *callback_arg, u_int32_t code, 650 struct cam_path *path, void *arg) 651 { 652 struct ccb_getdev cgd; 653 struct cam_periph *periph; 654 struct sdda_softc *softc; 655 656 periph = (struct cam_periph *)callback_arg; 657 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddaasync(code=%d)\n", code)); 658 switch (code) { 659 case AC_FOUND_DEVICE: 660 { 661 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_FOUND_DEVICE\n")); 662 struct ccb_getdev *cgd; 663 cam_status status; 664 665 cgd = (struct ccb_getdev *)arg; 666 if (cgd == NULL) 667 break; 668 669 if (cgd->protocol != PROTO_MMCSD) 670 break; 671 672 if (!(path->device->mmc_ident_data.card_features & CARD_FEATURE_MEMORY)) { 673 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("No memory on the card!\n")); 674 break; 675 } 676 677 /* 678 * Allocate a peripheral instance for 679 * this device and start the probe 680 * process. 681 */ 682 status = cam_periph_alloc(sddaregister, sddaoninvalidate, 683 sddacleanup, sddastart, 684 "sdda", CAM_PERIPH_BIO, 685 path, sddaasync, 686 AC_FOUND_DEVICE, cgd); 687 688 if (status != CAM_REQ_CMP 689 && status != CAM_REQ_INPROG) 690 printf("sddaasync: Unable to attach to new device " 691 "due to status 0x%x\n", status); 692 break; 693 } 694 case AC_GETDEV_CHANGED: 695 { 696 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_GETDEV_CHANGED\n")); 697 softc = (struct sdda_softc *)periph->softc; 698 memset(&cgd, 0, sizeof(cgd)); 699 xpt_setup_ccb(&cgd.ccb_h, periph->path, CAM_PRIORITY_NORMAL); 700 cgd.ccb_h.func_code = XPT_GDEV_TYPE; 701 xpt_action((union ccb *)&cgd); 702 cam_periph_async(periph, code, path, arg); 703 break; 704 } 705 case AC_ADVINFO_CHANGED: 706 { 707 uintptr_t buftype; 708 int i; 709 710 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_ADVINFO_CHANGED\n")); 711 buftype = (uintptr_t)arg; 712 if (buftype == CDAI_TYPE_PHYS_PATH) { 713 struct sdda_softc *softc; 714 struct sdda_part *part; 715 716 softc = periph->softc; 717 for (i = 0; i < MMC_PART_MAX; i++) { 718 if ((part = softc->part[i]) != NULL) { 719 disk_attr_changed(part->disk, "GEOM::physpath", 720 M_NOWAIT); 721 } 722 } 723 } 724 break; 725 } 726 default: 727 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> default?!\n")); 728 cam_periph_async(periph, code, path, arg); 729 break; 730 } 731 } 732 733 static int 734 sddagetattr(struct bio *bp) 735 { 736 struct cam_periph *periph; 737 struct sdda_softc *softc; 738 struct sdda_part *part; 739 int ret; 740 741 part = (struct sdda_part *)bp->bio_disk->d_drv1; 742 softc = part->sc; 743 periph = softc->periph; 744 cam_periph_lock(periph); 745 ret = xpt_getattr(bp->bio_data, bp->bio_length, bp->bio_attribute, 746 periph->path); 747 cam_periph_unlock(periph); 748 if (ret == 0) 749 bp->bio_completed = bp->bio_length; 750 return (ret); 751 } 752 753 static cam_status 754 sddaregister(struct cam_periph *periph, void *arg) 755 { 756 struct sdda_softc *softc; 757 struct ccb_getdev *cgd; 758 union ccb *request_ccb; /* CCB representing the probe request */ 759 760 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaregister\n")); 761 cgd = (struct ccb_getdev *)arg; 762 if (cgd == NULL) { 763 printf("sddaregister: no getdev CCB, can't register device\n"); 764 return (CAM_REQ_CMP_ERR); 765 } 766 767 softc = (struct sdda_softc *)malloc(sizeof(*softc), M_DEVBUF, 768 M_NOWAIT|M_ZERO); 769 if (softc == NULL) { 770 printf("sddaregister: Unable to probe new device. " 771 "Unable to allocate softc\n"); 772 return (CAM_REQ_CMP_ERR); 773 } 774 775 softc->state = SDDA_STATE_INIT; 776 softc->mmcdata = 777 (struct mmc_data *)malloc(sizeof(struct mmc_data), M_DEVBUF, M_NOWAIT|M_ZERO); 778 if (softc->mmcdata == NULL) { 779 printf("sddaregister: Unable to probe new device. " 780 "Unable to allocate mmcdata\n"); 781 free(softc, M_DEVBUF); 782 return (CAM_REQ_CMP_ERR); 783 } 784 periph->softc = softc; 785 softc->periph = periph; 786 787 request_ccb = (union ccb*) arg; 788 xpt_schedule(periph, CAM_PRIORITY_XPT); 789 TASK_INIT(&softc->start_init_task, 0, sdda_start_init_task, periph); 790 taskqueue_enqueue(taskqueue_thread, &softc->start_init_task); 791 792 return (CAM_REQ_CMP); 793 } 794 795 static int 796 mmc_exec_app_cmd(struct cam_periph *periph, union ccb *ccb, 797 struct mmc_command *cmd) { 798 int err; 799 800 /* Send APP_CMD first */ 801 memset(&ccb->mmcio.cmd, 0, sizeof(struct mmc_command)); 802 memset(&ccb->mmcio.stop, 0, sizeof(struct mmc_command)); 803 cam_fill_mmcio(&ccb->mmcio, 804 /*retries*/ 0, 805 /*cbfcnp*/ NULL, 806 /*flags*/ CAM_DIR_NONE, 807 /*mmc_opcode*/ MMC_APP_CMD, 808 /*mmc_arg*/ get_rca(periph) << 16, 809 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_AC, 810 /*mmc_data*/ NULL, 811 /*timeout*/ 0); 812 813 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 814 err = mmc_handle_reply(ccb); 815 if (err != 0) 816 return (err); 817 if (!(ccb->mmcio.cmd.resp[0] & R1_APP_CMD)) 818 return (EIO); 819 820 /* Now exec actual command */ 821 int flags = 0; 822 if (cmd->data != NULL) { 823 ccb->mmcio.cmd.data = cmd->data; 824 if (cmd->data->flags & MMC_DATA_READ) 825 flags |= CAM_DIR_IN; 826 if (cmd->data->flags & MMC_DATA_WRITE) 827 flags |= CAM_DIR_OUT; 828 } else flags = CAM_DIR_NONE; 829 830 cam_fill_mmcio(&ccb->mmcio, 831 /*retries*/ 0, 832 /*cbfcnp*/ NULL, 833 /*flags*/ flags, 834 /*mmc_opcode*/ cmd->opcode, 835 /*mmc_arg*/ cmd->arg, 836 /*mmc_flags*/ cmd->flags, 837 /*mmc_data*/ cmd->data, 838 /*timeout*/ 0); 839 840 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 841 err = mmc_handle_reply(ccb); 842 if (err != 0) 843 return (err); 844 memcpy(cmd->resp, ccb->mmcio.cmd.resp, sizeof(cmd->resp)); 845 cmd->error = ccb->mmcio.cmd.error; 846 847 return (0); 848 } 849 850 static int 851 mmc_app_get_scr(struct cam_periph *periph, union ccb *ccb, uint32_t *rawscr) { 852 int err; 853 struct mmc_command cmd; 854 struct mmc_data d; 855 856 memset(&cmd, 0, sizeof(cmd)); 857 memset(&d, 0, sizeof(d)); 858 859 memset(rawscr, 0, 8); 860 cmd.opcode = ACMD_SEND_SCR; 861 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 862 cmd.arg = 0; 863 864 d.data = rawscr; 865 d.len = 8; 866 d.flags = MMC_DATA_READ; 867 cmd.data = &d; 868 869 err = mmc_exec_app_cmd(periph, ccb, &cmd); 870 rawscr[0] = be32toh(rawscr[0]); 871 rawscr[1] = be32toh(rawscr[1]); 872 return (err); 873 } 874 875 static int 876 mmc_send_ext_csd(struct cam_periph *periph, union ccb *ccb, 877 uint8_t *rawextcsd, size_t buf_len) { 878 int err; 879 struct mmc_data d; 880 881 KASSERT(buf_len == 512, ("Buffer for ext csd must be 512 bytes")); 882 memset(&d, 0, sizeof(d)); 883 d.data = rawextcsd; 884 d.len = buf_len; 885 d.flags = MMC_DATA_READ; 886 memset(d.data, 0, d.len); 887 888 cam_fill_mmcio(&ccb->mmcio, 889 /*retries*/ 0, 890 /*cbfcnp*/ NULL, 891 /*flags*/ CAM_DIR_IN, 892 /*mmc_opcode*/ MMC_SEND_EXT_CSD, 893 /*mmc_arg*/ 0, 894 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC, 895 /*mmc_data*/ &d, 896 /*timeout*/ 0); 897 898 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 899 err = mmc_handle_reply(ccb); 900 return (err); 901 } 902 903 static void 904 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 905 { 906 unsigned int scr_struct; 907 908 memset(scr, 0, sizeof(*scr)); 909 910 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 911 if (scr_struct != 0) { 912 printf("Unrecognised SCR structure version %d\n", 913 scr_struct); 914 return; 915 } 916 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 917 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 918 } 919 920 static inline void 921 mmc_switch_fill_mmcio(union ccb *ccb, 922 uint8_t set, uint8_t index, uint8_t value, u_int timeout) 923 { 924 int arg = (MMC_SWITCH_FUNC_WR << 24) | 925 (index << 16) | 926 (value << 8) | 927 set; 928 929 cam_fill_mmcio(&ccb->mmcio, 930 /*retries*/ 0, 931 /*cbfcnp*/ NULL, 932 /*flags*/ CAM_DIR_NONE, 933 /*mmc_opcode*/ MMC_SWITCH_FUNC, 934 /*mmc_arg*/ arg, 935 /*mmc_flags*/ MMC_RSP_R1B | MMC_CMD_AC, 936 /*mmc_data*/ NULL, 937 /*timeout*/ timeout); 938 } 939 940 static int 941 mmc_select_card(struct cam_periph *periph, union ccb *ccb, uint32_t rca) 942 { 943 int flags, err; 944 945 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 946 cam_fill_mmcio(&ccb->mmcio, 947 /*retries*/ 0, 948 /*cbfcnp*/ NULL, 949 /*flags*/ CAM_DIR_IN, 950 /*mmc_opcode*/ MMC_SELECT_CARD, 951 /*mmc_arg*/ rca << 16, 952 /*mmc_flags*/ flags, 953 /*mmc_data*/ NULL, 954 /*timeout*/ 0); 955 956 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 957 err = mmc_handle_reply(ccb); 958 return (err); 959 } 960 961 static int 962 mmc_switch(struct cam_periph *periph, union ccb *ccb, 963 uint8_t set, uint8_t index, uint8_t value, u_int timeout) 964 { 965 int err; 966 967 mmc_switch_fill_mmcio(ccb, set, index, value, timeout); 968 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 969 err = mmc_handle_reply(ccb); 970 return (err); 971 } 972 973 static uint32_t 974 mmc_get_spec_vers(struct cam_periph *periph) { 975 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 976 977 return (softc->csd.spec_vers); 978 } 979 980 static uint64_t 981 mmc_get_media_size(struct cam_periph *periph) { 982 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 983 984 return (softc->mediasize); 985 } 986 987 static uint32_t 988 mmc_get_cmd6_timeout(struct cam_periph *periph) 989 { 990 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 991 992 if (mmc_get_spec_vers(periph) >= 6) 993 return (softc->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME] * 10); 994 return (500 * 1000); 995 } 996 997 static int 998 mmc_sd_switch(struct cam_periph *periph, union ccb *ccb, 999 uint8_t mode, uint8_t grp, uint8_t value, 1000 uint8_t *res) { 1001 struct mmc_data mmc_d; 1002 uint32_t arg; 1003 int err; 1004 1005 memset(res, 0, 64); 1006 memset(&mmc_d, 0, sizeof(mmc_d)); 1007 mmc_d.len = 64; 1008 mmc_d.data = res; 1009 mmc_d.flags = MMC_DATA_READ; 1010 1011 arg = mode << 31; /* 0 - check, 1 - set */ 1012 arg |= 0x00FFFFFF; 1013 arg &= ~(0xF << (grp * 4)); 1014 arg |= value << (grp * 4); 1015 1016 cam_fill_mmcio(&ccb->mmcio, 1017 /*retries*/ 0, 1018 /*cbfcnp*/ NULL, 1019 /*flags*/ CAM_DIR_IN, 1020 /*mmc_opcode*/ SD_SWITCH_FUNC, 1021 /*mmc_arg*/ arg, 1022 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC, 1023 /*mmc_data*/ &mmc_d, 1024 /*timeout*/ 0); 1025 1026 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 1027 err = mmc_handle_reply(ccb); 1028 return (err); 1029 } 1030 1031 static int 1032 mmc_set_timing(struct cam_periph *periph, 1033 union ccb *ccb, 1034 enum mmc_bus_timing timing) 1035 { 1036 u_char switch_res[64]; 1037 int err; 1038 uint8_t value; 1039 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1040 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1041 1042 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, 1043 ("mmc_set_timing(timing=%d)", timing)); 1044 switch (timing) { 1045 case bus_timing_normal: 1046 value = 0; 1047 break; 1048 case bus_timing_hs: 1049 value = 1; 1050 break; 1051 default: 1052 return (MMC_ERR_INVALID); 1053 } 1054 if (mmcp->card_features & CARD_FEATURE_MMC) { 1055 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL, 1056 EXT_CSD_HS_TIMING, value, softc->cmd6_time); 1057 } else { 1058 err = mmc_sd_switch(periph, ccb, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, value, switch_res); 1059 } 1060 1061 /* Set high-speed timing on the host */ 1062 struct ccb_trans_settings_mmc *cts; 1063 cts = &ccb->cts.proto_specific.mmc; 1064 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1065 ccb->ccb_h.flags = CAM_DIR_NONE; 1066 ccb->ccb_h.retry_count = 0; 1067 ccb->ccb_h.timeout = 100; 1068 ccb->ccb_h.cbfcnp = NULL; 1069 cts->ios.timing = timing; 1070 cts->ios_valid = MMC_BT; 1071 xpt_action(ccb); 1072 1073 return (err); 1074 } 1075 1076 static void 1077 sdda_start_init_task(void *context, int pending) { 1078 union ccb *new_ccb; 1079 struct cam_periph *periph; 1080 1081 periph = (struct cam_periph *)context; 1082 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init_task\n")); 1083 new_ccb = xpt_alloc_ccb(); 1084 xpt_setup_ccb(&new_ccb->ccb_h, periph->path, 1085 CAM_PRIORITY_NONE); 1086 1087 cam_periph_lock(periph); 1088 cam_periph_hold(periph, PRIBIO|PCATCH); 1089 sdda_start_init(context, new_ccb); 1090 cam_periph_unhold(periph); 1091 cam_periph_unlock(periph); 1092 xpt_free_ccb(new_ccb); 1093 } 1094 1095 static void 1096 sdda_set_bus_width(struct cam_periph *periph, union ccb *ccb, int width) { 1097 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1098 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1099 int err; 1100 1101 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_set_bus_width\n")); 1102 1103 /* First set for the card, then for the host */ 1104 if (mmcp->card_features & CARD_FEATURE_MMC) { 1105 uint8_t value; 1106 switch (width) { 1107 case bus_width_1: 1108 value = EXT_CSD_BUS_WIDTH_1; 1109 break; 1110 case bus_width_4: 1111 value = EXT_CSD_BUS_WIDTH_4; 1112 break; 1113 case bus_width_8: 1114 value = EXT_CSD_BUS_WIDTH_8; 1115 break; 1116 default: 1117 panic("Invalid bus width %d", width); 1118 } 1119 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL, 1120 EXT_CSD_BUS_WIDTH, value, softc->cmd6_time); 1121 } else { 1122 /* For SD cards we send ACMD6 with the required bus width in arg */ 1123 struct mmc_command cmd; 1124 memset(&cmd, 0, sizeof(struct mmc_command)); 1125 cmd.opcode = ACMD_SET_BUS_WIDTH; 1126 cmd.arg = width; 1127 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1128 err = mmc_exec_app_cmd(periph, ccb, &cmd); 1129 } 1130 1131 if (err != MMC_ERR_NONE) { 1132 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Error %d when setting bus width on the card\n", err)); 1133 return; 1134 } 1135 /* Now card is done, set the host to the same width */ 1136 struct ccb_trans_settings_mmc *cts; 1137 cts = &ccb->cts.proto_specific.mmc; 1138 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1139 ccb->ccb_h.flags = CAM_DIR_NONE; 1140 ccb->ccb_h.retry_count = 0; 1141 ccb->ccb_h.timeout = 100; 1142 ccb->ccb_h.cbfcnp = NULL; 1143 cts->ios.bus_width = width; 1144 cts->ios_valid = MMC_BW; 1145 xpt_action(ccb); 1146 } 1147 1148 static inline const char 1149 *part_type(u_int type) 1150 { 1151 1152 switch (type) { 1153 case EXT_CSD_PART_CONFIG_ACC_RPMB: 1154 return ("RPMB"); 1155 case EXT_CSD_PART_CONFIG_ACC_DEFAULT: 1156 return ("default"); 1157 case EXT_CSD_PART_CONFIG_ACC_BOOT0: 1158 return ("boot0"); 1159 case EXT_CSD_PART_CONFIG_ACC_BOOT1: 1160 return ("boot1"); 1161 case EXT_CSD_PART_CONFIG_ACC_GP0: 1162 case EXT_CSD_PART_CONFIG_ACC_GP1: 1163 case EXT_CSD_PART_CONFIG_ACC_GP2: 1164 case EXT_CSD_PART_CONFIG_ACC_GP3: 1165 return ("general purpose"); 1166 default: 1167 return ("(unknown type)"); 1168 } 1169 } 1170 1171 static inline const char 1172 *bus_width_str(enum mmc_bus_width w) 1173 { 1174 1175 switch (w) { 1176 case bus_width_1: 1177 return ("1-bit"); 1178 case bus_width_4: 1179 return ("4-bit"); 1180 case bus_width_8: 1181 return ("8-bit"); 1182 default: 1183 __assert_unreachable(); 1184 } 1185 } 1186 1187 static uint32_t 1188 sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb) 1189 { 1190 struct ccb_trans_settings_mmc *cts; 1191 1192 cts = &ccb->cts.proto_specific.mmc; 1193 1194 ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1195 ccb->ccb_h.flags = CAM_DIR_NONE; 1196 ccb->ccb_h.retry_count = 0; 1197 ccb->ccb_h.timeout = 100; 1198 ccb->ccb_h.cbfcnp = NULL; 1199 xpt_action(ccb); 1200 1201 if (ccb->ccb_h.status != CAM_REQ_CMP) 1202 panic("Cannot get host caps"); 1203 return (cts->host_caps); 1204 } 1205 1206 static uint32_t 1207 sdda_get_max_data(struct cam_periph *periph, union ccb *ccb) 1208 { 1209 struct ccb_trans_settings_mmc *cts; 1210 1211 cts = &ccb->cts.proto_specific.mmc; 1212 memset(cts, 0, sizeof(struct ccb_trans_settings_mmc)); 1213 1214 ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1215 ccb->ccb_h.flags = CAM_DIR_NONE; 1216 ccb->ccb_h.retry_count = 0; 1217 ccb->ccb_h.timeout = 100; 1218 ccb->ccb_h.cbfcnp = NULL; 1219 xpt_action(ccb); 1220 1221 if (ccb->ccb_h.status != CAM_REQ_CMP) 1222 panic("Cannot get host max data"); 1223 KASSERT(cts->host_max_data != 0, ("host_max_data == 0?!")); 1224 return (cts->host_max_data); 1225 } 1226 1227 static void 1228 sdda_start_init(void *context, union ccb *start_ccb) 1229 { 1230 struct cam_periph *periph = (struct cam_periph *)context; 1231 struct ccb_trans_settings_mmc *cts; 1232 uint32_t host_caps; 1233 uint32_t sec_count; 1234 int err; 1235 int host_f_max; 1236 uint8_t card_type; 1237 1238 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init\n")); 1239 /* periph was held for us when this task was enqueued */ 1240 if ((periph->flags & CAM_PERIPH_INVALID) != 0) { 1241 cam_periph_release(periph); 1242 return; 1243 } 1244 1245 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1246 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1247 struct cam_ed *device = periph->path->device; 1248 1249 if (mmcp->card_features & CARD_FEATURE_MMC) { 1250 mmc_decode_csd_mmc(mmcp->card_csd, &softc->csd); 1251 mmc_decode_cid_mmc(mmcp->card_cid, &softc->cid); 1252 if (mmc_get_spec_vers(periph) >= 4) { 1253 err = mmc_send_ext_csd(periph, start_ccb, 1254 (uint8_t *)&softc->raw_ext_csd, 1255 sizeof(softc->raw_ext_csd)); 1256 if (err != 0) { 1257 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1258 ("Cannot read EXT_CSD, err %d", err)); 1259 return; 1260 } 1261 } 1262 } else { 1263 mmc_decode_csd_sd(mmcp->card_csd, &softc->csd); 1264 mmc_decode_cid_sd(mmcp->card_cid, &softc->cid); 1265 } 1266 1267 softc->sector_count = softc->csd.capacity / MMC_SECTOR_SIZE; 1268 softc->mediasize = softc->csd.capacity; 1269 softc->cmd6_time = mmc_get_cmd6_timeout(periph); 1270 1271 /* MMC >= 4.x have EXT_CSD that has its own opinion about capacity */ 1272 if (mmc_get_spec_vers(periph) >= 4) { 1273 sec_count = softc->raw_ext_csd[EXT_CSD_SEC_CNT] + 1274 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1275 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1276 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1277 if (sec_count != 0) { 1278 softc->sector_count = sec_count; 1279 softc->mediasize = softc->sector_count * MMC_SECTOR_SIZE; 1280 /* FIXME: there should be a better name for this option...*/ 1281 mmcp->card_features |= CARD_FEATURE_SDHC; 1282 } 1283 } 1284 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1285 ("Capacity: %"PRIu64", sectors: %"PRIu64"\n", 1286 softc->mediasize, 1287 softc->sector_count)); 1288 mmc_format_card_id_string(softc, mmcp); 1289 1290 /* Update info for CAM */ 1291 device->serial_num_len = strlen(softc->card_sn_string); 1292 device->serial_num = (u_int8_t *)malloc((device->serial_num_len + 1), 1293 M_CAMXPT, M_NOWAIT); 1294 strlcpy(device->serial_num, softc->card_sn_string, device->serial_num_len + 1); 1295 1296 device->device_id_len = strlen(softc->card_id_string); 1297 device->device_id = (u_int8_t *)malloc((device->device_id_len + 1), 1298 M_CAMXPT, M_NOWAIT); 1299 strlcpy(device->device_id, softc->card_id_string, device->device_id_len + 1); 1300 1301 strlcpy(mmcp->model, softc->card_id_string, sizeof(mmcp->model)); 1302 1303 /* Set the clock frequency that the card can handle */ 1304 cts = &start_ccb->cts.proto_specific.mmc; 1305 1306 /* First, get the host's max freq */ 1307 start_ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1308 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1309 start_ccb->ccb_h.retry_count = 0; 1310 start_ccb->ccb_h.timeout = 100; 1311 start_ccb->ccb_h.cbfcnp = NULL; 1312 xpt_action(start_ccb); 1313 1314 if (start_ccb->ccb_h.status != CAM_REQ_CMP) 1315 panic("Cannot get max host freq"); 1316 host_f_max = cts->host_f_max; 1317 host_caps = cts->host_caps; 1318 if (cts->ios.bus_width != bus_width_1) 1319 panic("Bus width in ios is not 1-bit"); 1320 1321 /* Now check if the card supports High-speed */ 1322 softc->card_f_max = softc->csd.tran_speed; 1323 1324 if (host_caps & MMC_CAP_HSPEED) { 1325 /* Find out if the card supports High speed timing */ 1326 if (mmcp->card_features & CARD_FEATURE_SD20) { 1327 /* Get and decode SCR */ 1328 uint32_t rawscr[2]; 1329 uint8_t res[64]; 1330 if (mmc_app_get_scr(periph, start_ccb, rawscr)) { 1331 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Cannot get SCR\n")); 1332 goto finish_hs_tests; 1333 } 1334 mmc_app_decode_scr(rawscr, &softc->scr); 1335 1336 if ((softc->scr.sda_vsn >= 1) && (softc->csd.ccc & (1<<10))) { 1337 mmc_sd_switch(periph, start_ccb, SD_SWITCH_MODE_CHECK, 1338 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, res); 1339 if (res[13] & 2) { 1340 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS\n")); 1341 softc->card_f_max = SD_HS_MAX; 1342 } 1343 1344 /* 1345 * We deselect then reselect the card here. Some cards 1346 * become unselected and timeout with the above two 1347 * commands, although the state tables / diagrams in the 1348 * standard suggest they go back to the transfer state. 1349 * Other cards don't become deselected, and if we 1350 * attempt to blindly re-select them, we get timeout 1351 * errors from some controllers. So we deselect then 1352 * reselect to handle all situations. 1353 */ 1354 mmc_select_card(periph, start_ccb, 0); 1355 mmc_select_card(periph, start_ccb, get_rca(periph)); 1356 } else { 1357 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Not trying the switch\n")); 1358 goto finish_hs_tests; 1359 } 1360 } 1361 1362 if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) { 1363 card_type = softc->raw_ext_csd[EXT_CSD_CARD_TYPE]; 1364 if (card_type & EXT_CSD_CARD_TYPE_HS_52) 1365 softc->card_f_max = MMC_TYPE_HS_52_MAX; 1366 else if (card_type & EXT_CSD_CARD_TYPE_HS_26) 1367 softc->card_f_max = MMC_TYPE_HS_26_MAX; 1368 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 && 1369 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1370 setbit(&softc->timings, bus_timing_mmc_ddr52); 1371 setbit(&softc->vccq_120, bus_timing_mmc_ddr52); 1372 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports DDR52 at 1.2V\n")); 1373 } 1374 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 && 1375 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1376 setbit(&softc->timings, bus_timing_mmc_ddr52); 1377 setbit(&softc->vccq_180, bus_timing_mmc_ddr52); 1378 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports DDR52 at 1.8V\n")); 1379 } 1380 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 && 1381 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1382 setbit(&softc->timings, bus_timing_mmc_hs200); 1383 setbit(&softc->vccq_120, bus_timing_mmc_hs200); 1384 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS200 at 1.2V\n")); 1385 } 1386 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 && 1387 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1388 setbit(&softc->timings, bus_timing_mmc_hs200); 1389 setbit(&softc->vccq_180, bus_timing_mmc_hs200); 1390 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS200 at 1.8V\n")); 1391 } 1392 } 1393 } 1394 int f_max; 1395 finish_hs_tests: 1396 f_max = min(host_f_max, softc->card_f_max); 1397 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Set SD freq to %d MHz (min out of host f=%d MHz and card f=%d MHz)\n", f_max / 1000000, host_f_max / 1000000, softc->card_f_max / 1000000)); 1398 1399 /* Enable high-speed timing on the card */ 1400 if (f_max > 25000000) { 1401 err = mmc_set_timing(periph, start_ccb, bus_timing_hs); 1402 if (err != MMC_ERR_NONE) { 1403 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("Cannot switch card to high-speed mode")); 1404 f_max = 25000000; 1405 } 1406 } 1407 /* If possible, set lower-level signaling */ 1408 enum mmc_bus_timing timing; 1409 /* FIXME: MMCCAM supports max. bus_timing_mmc_ddr52 at the moment. */ 1410 for (timing = bus_timing_mmc_ddr52; timing > bus_timing_normal; timing--) { 1411 if (isset(&softc->vccq_120, timing)) { 1412 /* Set VCCQ = 1.2V */ 1413 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1414 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1415 start_ccb->ccb_h.retry_count = 0; 1416 start_ccb->ccb_h.timeout = 100; 1417 start_ccb->ccb_h.cbfcnp = NULL; 1418 cts->ios.vccq = vccq_120; 1419 cts->ios_valid = MMC_VCCQ; 1420 xpt_action(start_ccb); 1421 break; 1422 } else if (isset(&softc->vccq_180, timing)) { 1423 /* Set VCCQ = 1.8V */ 1424 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1425 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1426 start_ccb->ccb_h.retry_count = 0; 1427 start_ccb->ccb_h.timeout = 100; 1428 start_ccb->ccb_h.cbfcnp = NULL; 1429 cts->ios.vccq = vccq_180; 1430 cts->ios_valid = MMC_VCCQ; 1431 xpt_action(start_ccb); 1432 break; 1433 } else { 1434 /* Set VCCQ = 3.3V */ 1435 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1436 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1437 start_ccb->ccb_h.retry_count = 0; 1438 start_ccb->ccb_h.timeout = 100; 1439 start_ccb->ccb_h.cbfcnp = NULL; 1440 cts->ios.vccq = vccq_330; 1441 cts->ios_valid = MMC_VCCQ; 1442 xpt_action(start_ccb); 1443 break; 1444 } 1445 } 1446 1447 /* Set frequency on the controller */ 1448 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1449 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1450 start_ccb->ccb_h.retry_count = 0; 1451 start_ccb->ccb_h.timeout = 100; 1452 start_ccb->ccb_h.cbfcnp = NULL; 1453 cts->ios.clock = f_max; 1454 cts->ios_valid = MMC_CLK; 1455 xpt_action(start_ccb); 1456 1457 /* Set bus width */ 1458 enum mmc_bus_width desired_bus_width = bus_width_1; 1459 enum mmc_bus_width max_host_bus_width = 1460 (host_caps & MMC_CAP_8_BIT_DATA ? bus_width_8 : 1461 host_caps & MMC_CAP_4_BIT_DATA ? bus_width_4 : bus_width_1); 1462 enum mmc_bus_width max_card_bus_width = bus_width_1; 1463 if (mmcp->card_features & CARD_FEATURE_SD20 && 1464 softc->scr.bus_widths & SD_SCR_BUS_WIDTH_4) 1465 max_card_bus_width = bus_width_4; 1466 /* 1467 * Unlike SD, MMC cards don't have any information about supported bus width... 1468 * So we need to perform read/write test to find out the width. 1469 */ 1470 /* TODO: figure out bus width for MMC; use 8-bit for now (to test on BBB) */ 1471 if (mmcp->card_features & CARD_FEATURE_MMC) 1472 max_card_bus_width = bus_width_8; 1473 1474 desired_bus_width = min(max_host_bus_width, max_card_bus_width); 1475 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1476 ("Set bus width to %s (min of host %s and card %s)\n", 1477 bus_width_str(desired_bus_width), 1478 bus_width_str(max_host_bus_width), 1479 bus_width_str(max_card_bus_width))); 1480 sdda_set_bus_width(periph, start_ccb, desired_bus_width); 1481 1482 softc->state = SDDA_STATE_NORMAL; 1483 1484 cam_periph_unhold(periph); 1485 /* MMC partitions support */ 1486 if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) { 1487 sdda_process_mmc_partitions(periph, start_ccb); 1488 } else if (mmcp->card_features & CARD_FEATURE_SD20) { 1489 /* For SD[HC] cards, just add one partition that is the whole card */ 1490 if (sdda_add_part(periph, 0, "sdda", 1491 periph->unit_number, 1492 mmc_get_media_size(periph), 1493 sdda_get_read_only(periph, start_ccb)) == false) 1494 return; 1495 softc->part_curr = 0; 1496 } 1497 cam_periph_hold(periph, PRIBIO|PCATCH); 1498 1499 xpt_announce_periph(periph, softc->card_id_string); 1500 /* 1501 * Add async callbacks for bus reset and bus device reset calls. 1502 * I don't bother checking if this fails as, in most cases, 1503 * the system will function just fine without them and the only 1504 * alternative would be to not attach the device on failure. 1505 */ 1506 xpt_register_async(AC_LOST_DEVICE | AC_GETDEV_CHANGED | 1507 AC_ADVINFO_CHANGED, sddaasync, periph, periph->path); 1508 } 1509 1510 static bool 1511 sdda_add_part(struct cam_periph *periph, u_int type, const char *name, 1512 u_int cnt, off_t media_size, bool ro) 1513 { 1514 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1515 struct sdda_part *part; 1516 struct ccb_pathinq cpi; 1517 1518 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1519 ("Partition type '%s', size %ju %s\n", 1520 part_type(type), 1521 media_size, 1522 ro ? "(read-only)" : "")); 1523 1524 part = sc->part[type] = malloc(sizeof(*part), M_DEVBUF, 1525 M_NOWAIT | M_ZERO); 1526 if (part == NULL) { 1527 printf("Cannot add partition for sdda\n"); 1528 return (false); 1529 } 1530 1531 part->cnt = cnt; 1532 part->type = type; 1533 part->ro = ro; 1534 part->sc = sc; 1535 snprintf(part->name, sizeof(part->name), name, periph->unit_number); 1536 1537 /* 1538 * Due to the nature of RPMB partition it doesn't make much sense 1539 * to add it as a disk. It would be more appropriate to create a 1540 * userland tool to operate on the partition or leverage the existing 1541 * tools from sysutils/mmc-utils. 1542 */ 1543 if (type == EXT_CSD_PART_CONFIG_ACC_RPMB) { 1544 /* TODO: Create device, assign IOCTL handler */ 1545 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1546 ("Don't know what to do with RPMB partitions yet\n")); 1547 return (false); 1548 } 1549 1550 bioq_init(&part->bio_queue); 1551 1552 bzero(&cpi, sizeof(cpi)); 1553 xpt_setup_ccb(&cpi.ccb_h, periph->path, CAM_PRIORITY_NONE); 1554 cpi.ccb_h.func_code = XPT_PATH_INQ; 1555 xpt_action((union ccb *)&cpi); 1556 1557 /* 1558 * Register this media as a disk 1559 */ 1560 (void)cam_periph_hold(periph, PRIBIO); 1561 cam_periph_unlock(periph); 1562 1563 part->disk = disk_alloc(); 1564 part->disk->d_rotation_rate = DISK_RR_NON_ROTATING; 1565 part->disk->d_devstat = devstat_new_entry(part->name, 1566 cnt, MMC_SECTOR_SIZE, 1567 DEVSTAT_ALL_SUPPORTED, 1568 DEVSTAT_TYPE_DIRECT | XPORT_DEVSTAT_TYPE(cpi.transport), 1569 DEVSTAT_PRIORITY_DISK); 1570 1571 part->disk->d_open = sddaopen; 1572 part->disk->d_close = sddaclose; 1573 part->disk->d_strategy = sddastrategy; 1574 if (cam_sim_pollable(periph->sim)) 1575 part->disk->d_dump = sddadump; 1576 part->disk->d_getattr = sddagetattr; 1577 part->disk->d_gone = sddadiskgonecb; 1578 part->disk->d_name = part->name; 1579 part->disk->d_drv1 = part; 1580 part->disk->d_maxsize = 1581 MIN(maxphys, sdda_get_max_data(periph, 1582 (union ccb *)&cpi) * mmc_get_sector_size(periph)); 1583 part->disk->d_unit = cnt; 1584 part->disk->d_flags = 0; 1585 strlcpy(part->disk->d_descr, sc->card_id_string, 1586 MIN(sizeof(part->disk->d_descr), sizeof(sc->card_id_string))); 1587 strlcpy(part->disk->d_ident, sc->card_sn_string, 1588 MIN(sizeof(part->disk->d_ident), sizeof(sc->card_sn_string))); 1589 part->disk->d_hba_vendor = cpi.hba_vendor; 1590 part->disk->d_hba_device = cpi.hba_device; 1591 part->disk->d_hba_subvendor = cpi.hba_subvendor; 1592 part->disk->d_hba_subdevice = cpi.hba_subdevice; 1593 snprintf(part->disk->d_attachment, sizeof(part->disk->d_attachment), 1594 "%s%d", cpi.dev_name, cpi.unit_number); 1595 1596 part->disk->d_sectorsize = mmc_get_sector_size(periph); 1597 part->disk->d_mediasize = media_size; 1598 part->disk->d_stripesize = 0; 1599 part->disk->d_fwsectors = 0; 1600 part->disk->d_fwheads = 0; 1601 1602 if (sdda_mmcsd_compat) 1603 disk_add_alias(part->disk, "mmcsd"); 1604 1605 /* 1606 * Acquire a reference to the periph before we register with GEOM. 1607 * We'll release this reference once GEOM calls us back (via 1608 * sddadiskgonecb()) telling us that our provider has been freed. 1609 */ 1610 if (cam_periph_acquire(periph) != 0) { 1611 xpt_print(periph->path, "%s: lost periph during " 1612 "registration!\n", __func__); 1613 cam_periph_lock(periph); 1614 return (false); 1615 } 1616 disk_create(part->disk, DISK_VERSION); 1617 cam_periph_lock(periph); 1618 cam_periph_unhold(periph); 1619 1620 return (true); 1621 } 1622 1623 /* 1624 * For MMC cards, process EXT_CSD and add partitions that are supported by 1625 * this device. 1626 */ 1627 static void 1628 sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *ccb) 1629 { 1630 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1631 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1632 off_t erase_size, sector_size, size, wp_size; 1633 int i; 1634 const uint8_t *ext_csd; 1635 uint8_t rev; 1636 bool comp, ro; 1637 1638 ext_csd = sc->raw_ext_csd; 1639 1640 /* 1641 * Enhanced user data area and general purpose partitions are only 1642 * supported in revision 1.4 (EXT_CSD_REV == 4) and later, the RPMB 1643 * partition in revision 1.5 (MMC v4.41, EXT_CSD_REV == 5) and later. 1644 */ 1645 rev = ext_csd[EXT_CSD_REV]; 1646 1647 /* 1648 * Ignore user-creatable enhanced user data area and general purpose 1649 * partitions partitions as long as partitioning hasn't been finished. 1650 */ 1651 comp = (ext_csd[EXT_CSD_PART_SET] & EXT_CSD_PART_SET_COMPLETED) != 0; 1652 1653 /* 1654 * Add enhanced user data area slice, unless it spans the entirety of 1655 * the user data area. The enhanced area is of a multiple of high 1656 * capacity write protect groups ((ERASE_GRP_SIZE + HC_WP_GRP_SIZE) * 1657 * 512 KB) and its offset given in either sectors or bytes, depending 1658 * on whether it's a high capacity device or not. 1659 * NB: The slicer and its slices need to be registered before adding 1660 * the disk for the corresponding user data area as re-tasting is 1661 * racy. 1662 */ 1663 sector_size = mmc_get_sector_size(periph); 1664 size = ext_csd[EXT_CSD_ENH_SIZE_MULT] + 1665 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) + 1666 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16); 1667 if (rev >= 4 && comp == TRUE && size > 0 && 1668 (ext_csd[EXT_CSD_PART_SUPPORT] & 1669 EXT_CSD_PART_SUPPORT_ENH_ATTR_EN) != 0 && 1670 (ext_csd[EXT_CSD_PART_ATTR] & (EXT_CSD_PART_ATTR_ENH_USR)) != 0) { 1671 erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 * 1672 MMC_SECTOR_SIZE; 1673 wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1674 size *= erase_size * wp_size; 1675 if (size != mmc_get_media_size(periph) * sector_size) { 1676 sc->enh_size = size; 1677 sc->enh_base = (ext_csd[EXT_CSD_ENH_START_ADDR] + 1678 (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) + 1679 (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) + 1680 (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24)) * 1681 ((mmcp->card_features & CARD_FEATURE_SDHC) ? 1: MMC_SECTOR_SIZE); 1682 } else 1683 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1684 ("enhanced user data area spans entire device")); 1685 } 1686 1687 /* 1688 * Add default partition. This may be the only one or the user 1689 * data area in case partitions are supported. 1690 */ 1691 ro = sdda_get_read_only(periph, ccb); 1692 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_DEFAULT, "sdda", 1693 periph->unit_number, mmc_get_media_size(periph), ro); 1694 sc->part_curr = EXT_CSD_PART_CONFIG_ACC_DEFAULT; 1695 1696 if (mmc_get_spec_vers(periph) < 3) 1697 return; 1698 1699 /* Belatedly announce enhanced user data slice. */ 1700 if (sc->enh_size != 0) { 1701 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1702 ("enhanced user data area off 0x%jx size %ju bytes\n", 1703 sc->enh_base, sc->enh_size)); 1704 } 1705 1706 /* 1707 * Determine partition switch timeout (provided in units of 10 ms) 1708 * and ensure it's at least 300 ms as some eMMC chips lie. 1709 */ 1710 sc->part_time = max(ext_csd[EXT_CSD_PART_SWITCH_TO] * 10 * 1000, 1711 300 * 1000); 1712 1713 /* Add boot partitions, which are of a fixed multiple of 128 KB. */ 1714 size = ext_csd[EXT_CSD_BOOT_SIZE_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE; 1715 if (size > 0 && (sdda_get_host_caps(periph, ccb) & MMC_CAP_BOOT_NOACC) == 0) { 1716 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT0, 1717 SDDA_FMT_BOOT, 0, size, 1718 ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] & 1719 EXT_CSD_BOOT_WP_STATUS_BOOT0_MASK) != 0)); 1720 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT1, 1721 SDDA_FMT_BOOT, 1, size, 1722 ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] & 1723 EXT_CSD_BOOT_WP_STATUS_BOOT1_MASK) != 0)); 1724 } 1725 1726 /* Add RPMB partition, which also is of a fixed multiple of 128 KB. */ 1727 size = ext_csd[EXT_CSD_RPMB_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE; 1728 if (rev >= 5 && size > 0) 1729 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_RPMB, 1730 SDDA_FMT_RPMB, 0, size, ro); 1731 1732 if (rev <= 3 || comp == FALSE) 1733 return; 1734 1735 /* 1736 * Add general purpose partitions, which are of a multiple of high 1737 * capacity write protect groups, too. 1738 */ 1739 if ((ext_csd[EXT_CSD_PART_SUPPORT] & EXT_CSD_PART_SUPPORT_EN) != 0) { 1740 erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 * 1741 MMC_SECTOR_SIZE; 1742 wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1743 for (i = 0; i < MMC_PART_GP_MAX; i++) { 1744 size = ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3] + 1745 (ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 1] << 8) + 1746 (ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 2] << 16); 1747 if (size == 0) 1748 continue; 1749 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_GP0 + i, 1750 SDDA_FMT_GP, i, size * erase_size * wp_size, ro); 1751 } 1752 } 1753 } 1754 1755 /* 1756 * We cannot just call mmc_switch() since it will sleep, and we are in 1757 * GEOM context and cannot sleep. Instead, create an MMCIO request to switch 1758 * partitions and send it to h/w, and upon completion resume processing 1759 * the I/O queue. 1760 * This function cannot fail, instead check switch errors in sddadone(). 1761 */ 1762 static void 1763 sdda_init_switch_part(struct cam_periph *periph, union ccb *start_ccb, 1764 uint8_t part) 1765 { 1766 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1767 uint8_t value; 1768 1769 KASSERT(part < MMC_PART_MAX, ("%s: invalid partition index", __func__)); 1770 sc->part_requested = part; 1771 1772 value = (sc->raw_ext_csd[EXT_CSD_PART_CONFIG] & 1773 ~EXT_CSD_PART_CONFIG_ACC_MASK) | part; 1774 1775 mmc_switch_fill_mmcio(start_ccb, EXT_CSD_CMD_SET_NORMAL, 1776 EXT_CSD_PART_CONFIG, value, sc->part_time); 1777 start_ccb->ccb_h.cbfcnp = sddadone; 1778 1779 sc->outstanding_cmds++; 1780 cam_periph_unlock(periph); 1781 xpt_action(start_ccb); 1782 cam_periph_lock(periph); 1783 } 1784 1785 /* Called with periph lock held! */ 1786 static void 1787 sddastart(struct cam_periph *periph, union ccb *start_ccb) 1788 { 1789 struct bio *bp; 1790 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1791 struct sdda_part *part; 1792 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1793 uint8_t part_index; 1794 1795 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastart\n")); 1796 1797 if (softc->state != SDDA_STATE_NORMAL) { 1798 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("device is not in SDDA_STATE_NORMAL yet\n")); 1799 xpt_release_ccb(start_ccb); 1800 return; 1801 } 1802 1803 /* Find partition that has outstanding commands. Prefer current partition. */ 1804 part_index = softc->part_curr; 1805 part = softc->part[softc->part_curr]; 1806 bp = bioq_first(&part->bio_queue); 1807 if (bp == NULL) { 1808 for (part_index = 0; part_index < MMC_PART_MAX; part_index++) { 1809 if ((part = softc->part[part_index]) != NULL && 1810 (bp = bioq_first(&softc->part[part_index]->bio_queue)) != NULL) 1811 break; 1812 } 1813 } 1814 if (bp == NULL) { 1815 xpt_release_ccb(start_ccb); 1816 return; 1817 } 1818 if (part_index != softc->part_curr) { 1819 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1820 ("Partition %d -> %d\n", softc->part_curr, part_index)); 1821 /* 1822 * According to section "6.2.2 Command restrictions" of the eMMC 1823 * specification v5.1, CMD19/CMD21 aren't allowed to be used with 1824 * RPMB partitions. So we pause re-tuning along with triggering 1825 * it up-front to decrease the likelihood of re-tuning becoming 1826 * necessary while accessing an RPMB partition. Consequently, an 1827 * RPMB partition should immediately be switched away from again 1828 * after an access in order to allow for re-tuning to take place 1829 * anew. 1830 */ 1831 /* TODO: pause retune if switching to RPMB partition */ 1832 softc->state = SDDA_STATE_PART_SWITCH; 1833 sdda_init_switch_part(periph, start_ccb, part_index); 1834 return; 1835 } 1836 1837 bioq_remove(&part->bio_queue, bp); 1838 1839 switch (bp->bio_cmd) { 1840 case BIO_WRITE: 1841 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_WRITE\n")); 1842 part->flags |= SDDA_FLAG_DIRTY; 1843 /* FALLTHROUGH */ 1844 case BIO_READ: 1845 { 1846 struct ccb_mmcio *mmcio; 1847 uint64_t blockno = bp->bio_pblkno; 1848 uint16_t count = bp->bio_bcount / MMC_SECTOR_SIZE; 1849 uint16_t opcode; 1850 1851 if (bp->bio_cmd == BIO_READ) 1852 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_READ\n")); 1853 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, 1854 ("Block %"PRIu64" cnt %u\n", blockno, count)); 1855 1856 /* Construct new MMC command */ 1857 if (bp->bio_cmd == BIO_READ) { 1858 if (count > 1) 1859 opcode = MMC_READ_MULTIPLE_BLOCK; 1860 else 1861 opcode = MMC_READ_SINGLE_BLOCK; 1862 } else { 1863 if (count > 1) 1864 opcode = MMC_WRITE_MULTIPLE_BLOCK; 1865 else 1866 opcode = MMC_WRITE_BLOCK; 1867 } 1868 1869 start_ccb->ccb_h.func_code = XPT_MMC_IO; 1870 start_ccb->ccb_h.flags = (bp->bio_cmd == BIO_READ ? CAM_DIR_IN : CAM_DIR_OUT); 1871 start_ccb->ccb_h.retry_count = 0; 1872 start_ccb->ccb_h.timeout = 15 * 1000; 1873 start_ccb->ccb_h.cbfcnp = sddadone; 1874 1875 mmcio = &start_ccb->mmcio; 1876 mmcio->cmd.opcode = opcode; 1877 mmcio->cmd.arg = blockno; 1878 if (!(mmcp->card_features & CARD_FEATURE_SDHC)) 1879 mmcio->cmd.arg <<= 9; 1880 1881 mmcio->cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1882 mmcio->cmd.data = softc->mmcdata; 1883 memset(mmcio->cmd.data, 0, sizeof(struct mmc_data)); 1884 mmcio->cmd.data->data = bp->bio_data; 1885 mmcio->cmd.data->len = MMC_SECTOR_SIZE * count; 1886 mmcio->cmd.data->flags = (bp->bio_cmd == BIO_READ ? MMC_DATA_READ : MMC_DATA_WRITE); 1887 /* Direct h/w to issue CMD12 upon completion */ 1888 if (count > 1) { 1889 mmcio->cmd.data->flags |= MMC_DATA_MULTI; 1890 mmcio->stop.opcode = MMC_STOP_TRANSMISSION; 1891 mmcio->stop.flags = MMC_RSP_R1B | MMC_CMD_AC; 1892 mmcio->stop.arg = 0; 1893 } 1894 1895 break; 1896 } 1897 case BIO_FLUSH: 1898 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_FLUSH\n")); 1899 sddaschedule(periph); 1900 break; 1901 case BIO_DELETE: 1902 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_DELETE\n")); 1903 sddaschedule(periph); 1904 break; 1905 default: 1906 biofinish(bp, NULL, EOPNOTSUPP); 1907 xpt_release_ccb(start_ccb); 1908 return; 1909 } 1910 start_ccb->ccb_h.ccb_bp = bp; 1911 softc->outstanding_cmds++; 1912 softc->refcount++; 1913 cam_periph_unlock(periph); 1914 xpt_action(start_ccb); 1915 cam_periph_lock(periph); 1916 1917 /* May have more work to do, so ensure we stay scheduled */ 1918 sddaschedule(periph); 1919 } 1920 1921 static void 1922 sddadone(struct cam_periph *periph, union ccb *done_ccb) 1923 { 1924 struct bio *bp; 1925 struct sdda_softc *softc; 1926 struct ccb_mmcio *mmcio; 1927 struct cam_path *path; 1928 uint32_t card_status; 1929 int error = 0; 1930 1931 softc = (struct sdda_softc *)periph->softc; 1932 mmcio = &done_ccb->mmcio; 1933 path = done_ccb->ccb_h.path; 1934 1935 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddadone\n")); 1936 if ((done_ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) { 1937 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("Error!!!\n")); 1938 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0) 1939 cam_release_devq(path, 1940 /*relsim_flags*/0, 1941 /*reduction*/0, 1942 /*timeout*/0, 1943 /*getcount_only*/0); 1944 error = EIO; 1945 } else { 1946 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0) 1947 panic("REQ_CMP with QFRZN"); 1948 error = 0; 1949 } 1950 1951 card_status = mmcio->cmd.resp[0]; 1952 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1953 ("Card status: %08x\n", R1_STATUS(card_status))); 1954 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1955 ("Current state: %d\n", R1_CURRENT_STATE(card_status))); 1956 1957 /* Process result of switching MMC partitions */ 1958 if (softc->state == SDDA_STATE_PART_SWITCH) { 1959 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1960 ("Completing partition switch to %d\n", 1961 softc->part_requested)); 1962 softc->outstanding_cmds--; 1963 /* Complete partition switch */ 1964 softc->state = SDDA_STATE_NORMAL; 1965 if (error != 0) { 1966 /* TODO: Unpause retune if accessing RPMB */ 1967 xpt_release_ccb(done_ccb); 1968 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 1969 return; 1970 } 1971 1972 softc->raw_ext_csd[EXT_CSD_PART_CONFIG] = 1973 (softc->raw_ext_csd[EXT_CSD_PART_CONFIG] & 1974 ~EXT_CSD_PART_CONFIG_ACC_MASK) | softc->part_requested; 1975 /* TODO: Unpause retune if accessing RPMB */ 1976 softc->part_curr = softc->part_requested; 1977 xpt_release_ccb(done_ccb); 1978 1979 /* Return to processing BIO requests */ 1980 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 1981 return; 1982 } 1983 1984 bp = (struct bio *)done_ccb->ccb_h.ccb_bp; 1985 bp->bio_error = error; 1986 if (error != 0) { 1987 bp->bio_resid = bp->bio_bcount; 1988 bp->bio_flags |= BIO_ERROR; 1989 } else { 1990 /* XXX: How many bytes remaining? */ 1991 bp->bio_resid = 0; 1992 if (bp->bio_resid > 0) 1993 bp->bio_flags |= BIO_ERROR; 1994 } 1995 1996 softc->outstanding_cmds--; 1997 xpt_release_ccb(done_ccb); 1998 /* 1999 * Release the periph refcount taken in sddastart() for each CCB. 2000 */ 2001 KASSERT(softc->refcount >= 1, ("sddadone softc %p refcount %d", softc, softc->refcount)); 2002 softc->refcount--; 2003 biodone(bp); 2004 } 2005 2006 static int 2007 sddaerror(union ccb *ccb, u_int32_t cam_flags, u_int32_t sense_flags) 2008 { 2009 return(cam_periph_error(ccb, cam_flags, sense_flags)); 2010 } 2011 2012 static int 2013 sddadump(void *arg, void *virtual, vm_offset_t physical, off_t offset, 2014 size_t length) 2015 { 2016 struct ccb_mmcio mmcio; 2017 struct disk *dp; 2018 struct sdda_part *part; 2019 struct sdda_softc *softc; 2020 struct cam_periph *periph; 2021 struct mmc_params *mmcp; 2022 uint16_t count; 2023 uint16_t opcode; 2024 int error; 2025 2026 dp = arg; 2027 part = dp->d_drv1; 2028 softc = part->sc; 2029 periph = softc->periph; 2030 mmcp = &periph->path->device->mmc_ident_data; 2031 2032 if (softc->state != SDDA_STATE_NORMAL) 2033 return (ENXIO); 2034 2035 count = length / MMC_SECTOR_SIZE; 2036 if (count == 0) 2037 return (0); 2038 2039 if (softc->part[softc->part_curr] != part) 2040 return (EIO); /* TODO implement polled partition switch */ 2041 2042 memset(&mmcio, 0, sizeof(mmcio)); 2043 xpt_setup_ccb(&mmcio.ccb_h, periph->path, CAM_PRIORITY_NORMAL); /* XXX needed? */ 2044 2045 mmcio.ccb_h.func_code = XPT_MMC_IO; 2046 mmcio.ccb_h.flags = CAM_DIR_OUT; 2047 mmcio.ccb_h.retry_count = 0; 2048 mmcio.ccb_h.timeout = 15 * 1000; 2049 2050 if (count > 1) 2051 opcode = MMC_WRITE_MULTIPLE_BLOCK; 2052 else 2053 opcode = MMC_WRITE_BLOCK; 2054 mmcio.cmd.opcode = opcode; 2055 mmcio.cmd.arg = offset / MMC_SECTOR_SIZE; 2056 if (!(mmcp->card_features & CARD_FEATURE_SDHC)) 2057 mmcio.cmd.arg <<= 9; 2058 2059 mmcio.cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 2060 mmcio.cmd.data = softc->mmcdata; 2061 memset(mmcio.cmd.data, 0, sizeof(struct mmc_data)); 2062 mmcio.cmd.data->data = virtual; 2063 mmcio.cmd.data->len = MMC_SECTOR_SIZE * count; 2064 mmcio.cmd.data->flags = MMC_DATA_WRITE; 2065 2066 /* Direct h/w to issue CMD12 upon completion */ 2067 if (count > 1) { 2068 mmcio.cmd.data->flags |= MMC_DATA_MULTI; 2069 mmcio.stop.opcode = MMC_STOP_TRANSMISSION; 2070 mmcio.stop.flags = MMC_RSP_R1B | MMC_CMD_AC; 2071 mmcio.stop.arg = 0; 2072 } 2073 2074 error = cam_periph_runccb((union ccb *)&mmcio, cam_periph_error, 2075 0, SF_NO_RECOVERY | SF_NO_RETRY, NULL); 2076 if (error != 0) 2077 printf("Aborting dump due to I/O error.\n"); 2078 return (error); 2079 } 2080 2081 #endif /* _KERNEL */ 2082