1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2006 Bernd Walter <tisco@FreeBSD.org> All rights reserved. 5 * Copyright (c) 2009 Alexander Motin <mav@FreeBSD.org> All rights reserved. 6 * Copyright (c) 2015-2017 Ilya Bakulin <kibab@FreeBSD.org> All rights reserved. 7 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org> 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer, 14 * without modification, immediately at the beginning of the file. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * Some code derived from the sys/dev/mmc and sys/cam/ata 31 * Thanks to Warner Losh <imp@FreeBSD.org>, Alexander Motin <mav@FreeBSD.org> 32 * Bernd Walter <tisco@FreeBSD.org>, and other authors. 33 */ 34 35 //#include "opt_sdda.h" 36 37 #include <sys/param.h> 38 39 #ifdef _KERNEL 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/bio.h> 43 #include <sys/sysctl.h> 44 #include <sys/endian.h> 45 #include <sys/taskqueue.h> 46 #include <sys/lock.h> 47 #include <sys/mutex.h> 48 #include <sys/conf.h> 49 #include <sys/devicestat.h> 50 #include <sys/eventhandler.h> 51 #include <sys/malloc.h> 52 #include <sys/cons.h> 53 #include <sys/proc.h> 54 #include <sys/reboot.h> 55 #include <geom/geom_disk.h> 56 #include <machine/_inttypes.h> /* for PRIu64 */ 57 #endif /* _KERNEL */ 58 59 #ifndef _KERNEL 60 #include <stdio.h> 61 #include <string.h> 62 #endif /* _KERNEL */ 63 64 #include <cam/cam.h> 65 #include <cam/cam_ccb.h> 66 #include <cam/cam_queue.h> 67 #include <cam/cam_periph.h> 68 #include <cam/cam_sim.h> 69 #include <cam/cam_xpt.h> 70 #include <cam/cam_xpt_sim.h> 71 #include <cam/cam_xpt_periph.h> 72 #include <cam/cam_xpt_internal.h> 73 #include <cam/cam_debug.h> 74 75 #include <cam/mmc/mmc_all.h> 76 77 #ifdef _KERNEL 78 79 typedef enum { 80 SDDA_FLAG_OPEN = 0x0002, 81 SDDA_FLAG_DIRTY = 0x0004 82 } sdda_flags; 83 84 typedef enum { 85 SDDA_STATE_INIT, 86 SDDA_STATE_INVALID, 87 SDDA_STATE_NORMAL, 88 SDDA_STATE_PART_SWITCH, 89 } sdda_state; 90 91 /* Purposefully ignore a '%d' argument to snprintf in SDDA_FMT! */ 92 #define SDDA_FMT "%s" 93 #define SDDA_FMT_BOOT "%s%dboot" 94 #define SDDA_FMT_GP "%s%dgp" 95 #define SDDA_FMT_RPMB "%s%drpmb" 96 #define SDDA_LABEL_ENH "enh" 97 98 #define SDDA_PART_NAMELEN (16 + 1) 99 100 struct sdda_softc; 101 102 struct sdda_part { 103 struct disk *disk; 104 struct bio_queue_head bio_queue; 105 sdda_flags flags; 106 struct sdda_softc *sc; 107 u_int cnt; 108 u_int type; 109 bool ro; 110 char name[SDDA_PART_NAMELEN]; 111 }; 112 113 struct sdda_softc { 114 int outstanding_cmds; /* Number of active commands */ 115 int refcount; /* Active xpt_action() calls */ 116 sdda_state state; 117 struct mmc_data *mmcdata; 118 struct cam_periph *periph; 119 // sdda_quirks quirks; 120 struct task start_init_task; 121 uint32_t raw_csd[4]; 122 uint8_t raw_ext_csd[512]; /* MMC only? */ 123 struct mmc_csd csd; 124 struct mmc_cid cid; 125 struct mmc_scr scr; 126 /* Calculated from CSD */ 127 uint64_t sector_count; 128 uint64_t mediasize; 129 130 /* Calculated from CID */ 131 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ 132 char card_sn_string[16];/* Formatted serial # for disk->d_ident */ 133 /* Determined from CSD + is highspeed card*/ 134 uint32_t card_f_max; 135 136 /* Generic switch timeout */ 137 uint32_t cmd6_time; 138 uint32_t timings; /* Mask of bus timings supported */ 139 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */ 140 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */ 141 /* MMC partitions support */ 142 struct sdda_part *part[MMC_PART_MAX]; 143 uint8_t part_curr; /* Partition currently switched to */ 144 uint8_t part_requested; /* What partition we're currently switching to */ 145 uint32_t part_time; /* Partition switch timeout [us] */ 146 off_t enh_base; /* Enhanced user data area slice base ... */ 147 off_t enh_size; /* ... and size [bytes] */ 148 int log_count; 149 struct timeval log_time; 150 }; 151 152 static const char *mmc_errmsg[] = 153 { 154 "None", 155 "Timeout", 156 "Bad CRC", 157 "Fifo", 158 "Failed", 159 "Invalid", 160 "NO MEMORY" 161 }; 162 163 #define ccb_bp ppriv_ptr1 164 165 static disk_strategy_t sddastrategy; 166 static dumper_t sddadump; 167 static periph_init_t sddainit; 168 static void sddaasync(void *callback_arg, uint32_t code, 169 struct cam_path *path, void *arg); 170 static periph_ctor_t sddaregister; 171 static periph_dtor_t sddacleanup; 172 static periph_start_t sddastart; 173 static periph_oninv_t sddaoninvalidate; 174 static void sddadone(struct cam_periph *periph, 175 union ccb *done_ccb); 176 static int sddaerror(union ccb *ccb, uint32_t cam_flags, 177 uint32_t sense_flags); 178 179 static int mmc_handle_reply(union ccb *ccb); 180 static uint16_t get_rca(struct cam_periph *periph); 181 static void sdda_start_init(void *context, union ccb *start_ccb); 182 static void sdda_start_init_task(void *context, int pending); 183 static void sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *start_ccb); 184 static uint32_t sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb); 185 static int mmc_select_card(struct cam_periph *periph, union ccb *ccb, uint32_t rca); 186 static inline uint32_t mmc_get_sector_size(struct cam_periph *periph) {return MMC_SECTOR_SIZE;} 187 188 static SYSCTL_NODE(_kern_cam, OID_AUTO, sdda, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, 189 "CAM Direct Access Disk driver"); 190 191 static int sdda_mmcsd_compat = 1; 192 SYSCTL_INT(_kern_cam_sdda, OID_AUTO, mmcsd_compat, CTLFLAG_RDTUN, 193 &sdda_mmcsd_compat, 1, "Enable creation of mmcsd aliases."); 194 195 /* TODO: actually issue GET_TRAN_SETTINGS to get R/O status */ 196 static inline bool sdda_get_read_only(struct cam_periph *periph, union ccb *start_ccb) 197 { 198 199 return (false); 200 } 201 202 static uint32_t mmc_get_spec_vers(struct cam_periph *periph); 203 static uint64_t mmc_get_media_size(struct cam_periph *periph); 204 static uint32_t mmc_get_cmd6_timeout(struct cam_periph *periph); 205 static bool sdda_add_part(struct cam_periph *periph, u_int type, 206 const char *name, u_int cnt, off_t media_size, bool ro); 207 208 static struct periph_driver sddadriver = 209 { 210 sddainit, "sdda", 211 TAILQ_HEAD_INITIALIZER(sddadriver.units), /* generation */ 0 212 }; 213 214 PERIPHDRIVER_DECLARE(sdda, sddadriver); 215 216 static MALLOC_DEFINE(M_SDDA, "sd_da", "sd_da buffers"); 217 218 static const int exp[8] = { 219 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 220 }; 221 222 static const int mant[16] = { 223 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 224 }; 225 226 static const int cur_min[8] = { 227 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000 228 }; 229 230 static const int cur_max[8] = { 231 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000 232 }; 233 234 static uint16_t 235 get_rca(struct cam_periph *periph) { 236 return periph->path->device->mmc_ident_data.card_rca; 237 } 238 239 /* 240 * Figure out if CCB execution resulted in error. 241 * Look at both CAM-level errors and on MMC protocol errors. 242 * 243 * Return value is always MMC error. 244 */ 245 static int 246 mmc_handle_reply(union ccb *ccb) 247 { 248 KASSERT(ccb->ccb_h.func_code == XPT_MMC_IO, 249 ("ccb %p: cannot handle non-XPT_MMC_IO errors, got func_code=%d", 250 ccb, ccb->ccb_h.func_code)); 251 252 /* CAM-level error should always correspond to MMC-level error */ 253 if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) && 254 (ccb->mmcio.cmd.error != MMC_ERR_NONE)) 255 panic("CCB status is OK but MMC error != MMC_ERR_NONE"); 256 257 if (ccb->mmcio.cmd.error != MMC_ERR_NONE) { 258 xpt_print_path(ccb->ccb_h.path); 259 printf("CMD%d failed, err %d (%s)\n", 260 ccb->mmcio.cmd.opcode, 261 ccb->mmcio.cmd.error, 262 mmc_errmsg[ccb->mmcio.cmd.error]); 263 } 264 return (ccb->mmcio.cmd.error); 265 } 266 267 static uint32_t 268 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size) 269 { 270 const int i = (bit_len / 32) - (start / 32) - 1; 271 const int shift = start & 31; 272 uint32_t retval = bits[i] >> shift; 273 if (size + shift > 32) 274 retval |= bits[i - 1] << (32 - shift); 275 return (retval & ((1llu << size) - 1)); 276 } 277 278 static void 279 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd) 280 { 281 int v; 282 int m; 283 int e; 284 285 memset(csd, 0, sizeof(*csd)); 286 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2); 287 288 /* Common members between 1.0 and 2.0 */ 289 m = mmc_get_bits(raw_csd, 128, 115, 4); 290 e = mmc_get_bits(raw_csd, 128, 112, 3); 291 csd->tacc = (exp[e] * mant[m] + 9) / 10; 292 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 293 m = mmc_get_bits(raw_csd, 128, 99, 4); 294 e = mmc_get_bits(raw_csd, 128, 96, 3); 295 csd->tran_speed = exp[e] * 10000 * mant[m]; 296 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 297 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 298 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 299 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 300 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 301 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 302 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1); 303 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1; 304 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7); 305 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 306 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 307 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 308 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 309 310 if (v == 0) { 311 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 312 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 313 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 314 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 315 m = mmc_get_bits(raw_csd, 128, 62, 12); 316 e = mmc_get_bits(raw_csd, 128, 47, 3); 317 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 318 } else if (v == 1) { 319 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) * 320 512 * 1024; 321 } else 322 panic("unknown SD CSD version"); 323 } 324 325 static void 326 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd) 327 { 328 int m; 329 int e; 330 331 memset(csd, 0, sizeof(*csd)); 332 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2); 333 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4); 334 m = mmc_get_bits(raw_csd, 128, 115, 4); 335 e = mmc_get_bits(raw_csd, 128, 112, 3); 336 csd->tacc = exp[e] * mant[m] + 9 / 10; 337 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100; 338 m = mmc_get_bits(raw_csd, 128, 99, 4); 339 e = mmc_get_bits(raw_csd, 128, 96, 3); 340 csd->tran_speed = exp[e] * 10000 * mant[m]; 341 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12); 342 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4); 343 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1); 344 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1); 345 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1); 346 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1); 347 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)]; 348 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)]; 349 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)]; 350 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)]; 351 m = mmc_get_bits(raw_csd, 128, 62, 12); 352 e = mmc_get_bits(raw_csd, 128, 47, 3); 353 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len; 354 csd->erase_blk_en = 0; 355 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) * 356 (mmc_get_bits(raw_csd, 128, 37, 5) + 1); 357 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5); 358 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1); 359 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3); 360 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4); 361 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1); 362 } 363 364 static void 365 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid) 366 { 367 int i; 368 369 /* There's no version info, so we take it on faith */ 370 memset(cid, 0, sizeof(*cid)); 371 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 372 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16); 373 for (i = 0; i < 5; i++) 374 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 375 cid->pnm[5] = 0; 376 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8); 377 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32); 378 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000; 379 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4); 380 } 381 382 static void 383 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid) 384 { 385 int i; 386 387 /* There's no version info, so we take it on faith */ 388 memset(cid, 0, sizeof(*cid)); 389 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8); 390 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8); 391 for (i = 0; i < 6; i++) 392 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8); 393 cid->pnm[6] = 0; 394 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8); 395 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32); 396 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4); 397 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997; 398 } 399 400 static void 401 mmc_format_card_id_string(struct sdda_softc *sc, struct mmc_params *mmcp) 402 { 403 char oidstr[8]; 404 uint8_t c1; 405 uint8_t c2; 406 407 /* 408 * Format a card ID string for use by the mmcsd driver, it's what 409 * appears between the <> in the following: 410 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0 411 * 22.5MHz/4bit/128-block 412 * 413 * Also format just the card serial number, which the mmcsd driver will 414 * use as the disk->d_ident string. 415 * 416 * The card_id_string in mmc_ivars is currently allocated as 64 bytes, 417 * and our max formatted length is currently 55 bytes if every field 418 * contains the largest value. 419 * 420 * Sometimes the oid is two printable ascii chars; when it's not, 421 * format it as 0xnnnn instead. 422 */ 423 c1 = (sc->cid.oid >> 8) & 0x0ff; 424 c2 = sc->cid.oid & 0x0ff; 425 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f) 426 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2); 427 else 428 snprintf(oidstr, sizeof(oidstr), "0x%04x", sc->cid.oid); 429 snprintf(sc->card_sn_string, sizeof(sc->card_sn_string), 430 "%08X", sc->cid.psn); 431 snprintf(sc->card_id_string, sizeof(sc->card_id_string), 432 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s", 433 mmcp->card_features & CARD_FEATURE_MMC ? "MMC" : "SD", 434 mmcp->card_features & CARD_FEATURE_SDHC ? "HC" : "", 435 sc->cid.pnm, sc->cid.prv >> 4, sc->cid.prv & 0x0f, 436 sc->cid.psn, sc->cid.mdt_month, sc->cid.mdt_year, 437 sc->cid.mid, oidstr); 438 } 439 440 static int 441 sddaopen(struct disk *dp) 442 { 443 struct sdda_part *part; 444 struct cam_periph *periph; 445 struct sdda_softc *softc; 446 int error; 447 448 part = (struct sdda_part *)dp->d_drv1; 449 softc = part->sc; 450 periph = softc->periph; 451 if (cam_periph_acquire(periph) != 0) { 452 return(ENXIO); 453 } 454 455 cam_periph_lock(periph); 456 if ((error = cam_periph_hold(periph, PRIBIO|PCATCH)) != 0) { 457 cam_periph_unlock(periph); 458 cam_periph_release(periph); 459 return (error); 460 } 461 462 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaopen\n")); 463 464 part->flags |= SDDA_FLAG_OPEN; 465 466 cam_periph_unhold(periph); 467 cam_periph_unlock(periph); 468 return (0); 469 } 470 471 static int 472 sddaclose(struct disk *dp) 473 { 474 struct sdda_part *part; 475 struct cam_periph *periph; 476 struct sdda_softc *softc; 477 478 part = (struct sdda_part *)dp->d_drv1; 479 softc = part->sc; 480 periph = softc->periph; 481 part->flags &= ~SDDA_FLAG_OPEN; 482 483 cam_periph_lock(periph); 484 485 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaclose\n")); 486 487 while (softc->refcount != 0) 488 cam_periph_sleep(periph, &softc->refcount, PRIBIO, "sddaclose", 1); 489 cam_periph_unlock(periph); 490 cam_periph_release(periph); 491 return (0); 492 } 493 494 static void 495 sddaschedule(struct cam_periph *periph) 496 { 497 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 498 struct sdda_part *part; 499 struct bio *bp; 500 int i; 501 502 /* Check if we have more work to do. */ 503 /* Find partition that has outstanding commands. Prefer current partition. */ 504 bp = bioq_first(&softc->part[softc->part_curr]->bio_queue); 505 if (bp == NULL) { 506 for (i = 0; i < MMC_PART_MAX; i++) { 507 if ((part = softc->part[i]) != NULL && 508 (bp = bioq_first(&softc->part[i]->bio_queue)) != NULL) 509 break; 510 } 511 } 512 if (bp != NULL) { 513 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 514 } 515 } 516 517 /* 518 * Actually translate the requested transfer into one the physical driver 519 * can understand. The transfer is described by a buf and will include 520 * only one physical transfer. 521 */ 522 static void 523 sddastrategy(struct bio *bp) 524 { 525 struct cam_periph *periph; 526 struct sdda_part *part; 527 struct sdda_softc *softc; 528 529 part = (struct sdda_part *)bp->bio_disk->d_drv1; 530 softc = part->sc; 531 periph = softc->periph; 532 533 cam_periph_lock(periph); 534 535 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastrategy(%p)\n", bp)); 536 537 /* 538 * If the device has been made invalid, error out 539 */ 540 if ((periph->flags & CAM_PERIPH_INVALID) != 0) { 541 cam_periph_unlock(periph); 542 biofinish(bp, NULL, ENXIO); 543 return; 544 } 545 546 /* 547 * Place it in the queue of disk activities for this disk 548 */ 549 bioq_disksort(&part->bio_queue, bp); 550 551 /* 552 * Schedule ourselves for performing the work. 553 */ 554 sddaschedule(periph); 555 cam_periph_unlock(periph); 556 557 return; 558 } 559 560 static void 561 sddainit(void) 562 { 563 cam_status status; 564 565 /* 566 * Install a global async callback. This callback will 567 * receive async callbacks like "new device found". 568 */ 569 status = xpt_register_async(AC_FOUND_DEVICE, sddaasync, NULL, NULL); 570 571 if (status != CAM_REQ_CMP) { 572 printf("sdda: Failed to attach master async callback " 573 "due to status 0x%x!\n", status); 574 } 575 } 576 577 /* 578 * Callback from GEOM, called when it has finished cleaning up its 579 * resources. 580 */ 581 static void 582 sddadiskgonecb(struct disk *dp) 583 { 584 struct cam_periph *periph; 585 struct sdda_part *part; 586 587 part = (struct sdda_part *)dp->d_drv1; 588 periph = part->sc->periph; 589 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddadiskgonecb\n")); 590 591 cam_periph_release(periph); 592 } 593 594 static void 595 sddaoninvalidate(struct cam_periph *periph) 596 { 597 struct sdda_softc *softc; 598 struct sdda_part *part; 599 600 softc = (struct sdda_softc *)periph->softc; 601 602 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaoninvalidate\n")); 603 604 /* 605 * De-register any async callbacks. 606 */ 607 xpt_register_async(0, sddaasync, periph, periph->path); 608 609 /* 610 * Return all queued I/O with ENXIO. 611 * XXX Handle any transactions queued to the card 612 * with XPT_ABORT_CCB. 613 */ 614 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush start\n")); 615 for (int i = 0; i < MMC_PART_MAX; i++) { 616 if ((part = softc->part[i]) != NULL) { 617 bioq_flush(&part->bio_queue, NULL, ENXIO); 618 disk_gone(part->disk); 619 } 620 } 621 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush end\n")); 622 } 623 624 static void 625 sddacleanup(struct cam_periph *periph) 626 { 627 struct sdda_softc *softc; 628 struct sdda_part *part; 629 int i; 630 631 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddacleanup\n")); 632 softc = (struct sdda_softc *)periph->softc; 633 634 cam_periph_unlock(periph); 635 636 for (i = 0; i < MMC_PART_MAX; i++) { 637 if ((part = softc->part[i]) != NULL) { 638 disk_destroy(part->disk); 639 free(part, M_DEVBUF); 640 softc->part[i] = NULL; 641 } 642 } 643 free(softc, M_DEVBUF); 644 cam_periph_lock(periph); 645 } 646 647 static void 648 sddaasync(void *callback_arg, uint32_t code, 649 struct cam_path *path, void *arg) 650 { 651 struct ccb_getdev cgd; 652 struct cam_periph *periph; 653 654 periph = (struct cam_periph *)callback_arg; 655 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddaasync(code=%d)\n", code)); 656 switch (code) { 657 case AC_FOUND_DEVICE: 658 { 659 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_FOUND_DEVICE\n")); 660 struct ccb_getdev *cgd; 661 cam_status status; 662 663 cgd = (struct ccb_getdev *)arg; 664 if (cgd == NULL) 665 break; 666 667 if (cgd->protocol != PROTO_MMCSD) 668 break; 669 670 if (!(path->device->mmc_ident_data.card_features & CARD_FEATURE_MEMORY)) { 671 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("No memory on the card!\n")); 672 break; 673 } 674 675 /* 676 * Allocate a peripheral instance for 677 * this device and start the probe 678 * process. 679 */ 680 status = cam_periph_alloc(sddaregister, sddaoninvalidate, 681 sddacleanup, sddastart, 682 "sdda", CAM_PERIPH_BIO, 683 path, sddaasync, 684 AC_FOUND_DEVICE, cgd); 685 686 if (status != CAM_REQ_CMP 687 && status != CAM_REQ_INPROG) 688 printf("sddaasync: Unable to attach to new device " 689 "due to status 0x%x\n", status); 690 break; 691 } 692 case AC_GETDEV_CHANGED: 693 { 694 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_GETDEV_CHANGED\n")); 695 memset(&cgd, 0, sizeof(cgd)); 696 xpt_setup_ccb(&cgd.ccb_h, periph->path, CAM_PRIORITY_NORMAL); 697 cgd.ccb_h.func_code = XPT_GDEV_TYPE; 698 xpt_action((union ccb *)&cgd); 699 cam_periph_async(periph, code, path, arg); 700 break; 701 } 702 case AC_ADVINFO_CHANGED: 703 { 704 uintptr_t buftype; 705 int i; 706 707 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_ADVINFO_CHANGED\n")); 708 buftype = (uintptr_t)arg; 709 if (buftype == CDAI_TYPE_PHYS_PATH) { 710 struct sdda_softc *softc; 711 struct sdda_part *part; 712 713 softc = periph->softc; 714 for (i = 0; i < MMC_PART_MAX; i++) { 715 if ((part = softc->part[i]) != NULL) { 716 disk_attr_changed(part->disk, "GEOM::physpath", 717 M_NOWAIT); 718 } 719 } 720 } 721 break; 722 } 723 default: 724 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> default?!\n")); 725 cam_periph_async(periph, code, path, arg); 726 break; 727 } 728 } 729 730 static int 731 sddagetattr(struct bio *bp) 732 { 733 struct cam_periph *periph; 734 struct sdda_softc *softc; 735 struct sdda_part *part; 736 int ret; 737 738 part = (struct sdda_part *)bp->bio_disk->d_drv1; 739 softc = part->sc; 740 periph = softc->periph; 741 cam_periph_lock(periph); 742 ret = xpt_getattr(bp->bio_data, bp->bio_length, bp->bio_attribute, 743 periph->path); 744 cam_periph_unlock(periph); 745 if (ret == 0) 746 bp->bio_completed = bp->bio_length; 747 return (ret); 748 } 749 750 static cam_status 751 sddaregister(struct cam_periph *periph, void *arg) 752 { 753 struct sdda_softc *softc; 754 struct ccb_getdev *cgd; 755 756 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaregister\n")); 757 cgd = (struct ccb_getdev *)arg; 758 if (cgd == NULL) { 759 printf("sddaregister: no getdev CCB, can't register device\n"); 760 return (CAM_REQ_CMP_ERR); 761 } 762 763 softc = (struct sdda_softc *)malloc(sizeof(*softc), M_DEVBUF, 764 M_NOWAIT|M_ZERO); 765 if (softc == NULL) { 766 printf("sddaregister: Unable to probe new device. " 767 "Unable to allocate softc\n"); 768 return (CAM_REQ_CMP_ERR); 769 } 770 771 softc->state = SDDA_STATE_INIT; 772 softc->mmcdata = 773 (struct mmc_data *)malloc(sizeof(struct mmc_data), M_DEVBUF, M_NOWAIT|M_ZERO); 774 if (softc->mmcdata == NULL) { 775 printf("sddaregister: Unable to probe new device. " 776 "Unable to allocate mmcdata\n"); 777 free(softc, M_DEVBUF); 778 return (CAM_REQ_CMP_ERR); 779 } 780 periph->softc = softc; 781 softc->periph = periph; 782 783 xpt_schedule(periph, CAM_PRIORITY_XPT); 784 TASK_INIT(&softc->start_init_task, 0, sdda_start_init_task, periph); 785 taskqueue_enqueue(taskqueue_thread, &softc->start_init_task); 786 787 return (CAM_REQ_CMP); 788 } 789 790 static int 791 mmc_exec_app_cmd(struct cam_periph *periph, union ccb *ccb, 792 struct mmc_command *cmd) { 793 int err; 794 795 /* Send APP_CMD first */ 796 memset(&ccb->mmcio.cmd, 0, sizeof(struct mmc_command)); 797 memset(&ccb->mmcio.stop, 0, sizeof(struct mmc_command)); 798 cam_fill_mmcio(&ccb->mmcio, 799 /*retries*/ 0, 800 /*cbfcnp*/ NULL, 801 /*flags*/ CAM_DIR_NONE, 802 /*mmc_opcode*/ MMC_APP_CMD, 803 /*mmc_arg*/ get_rca(periph) << 16, 804 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_AC, 805 /*mmc_data*/ NULL, 806 /*timeout*/ 0); 807 808 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 809 err = mmc_handle_reply(ccb); 810 if (err != 0) 811 return (err); 812 if (!(ccb->mmcio.cmd.resp[0] & R1_APP_CMD)) 813 return (EIO); 814 815 /* Now exec actual command */ 816 int flags = 0; 817 if (cmd->data != NULL) { 818 ccb->mmcio.cmd.data = cmd->data; 819 if (cmd->data->flags & MMC_DATA_READ) 820 flags |= CAM_DIR_IN; 821 if (cmd->data->flags & MMC_DATA_WRITE) 822 flags |= CAM_DIR_OUT; 823 } else flags = CAM_DIR_NONE; 824 825 cam_fill_mmcio(&ccb->mmcio, 826 /*retries*/ 0, 827 /*cbfcnp*/ NULL, 828 /*flags*/ flags, 829 /*mmc_opcode*/ cmd->opcode, 830 /*mmc_arg*/ cmd->arg, 831 /*mmc_flags*/ cmd->flags, 832 /*mmc_data*/ cmd->data, 833 /*timeout*/ 0); 834 835 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 836 err = mmc_handle_reply(ccb); 837 if (err != 0) 838 return (err); 839 memcpy(cmd->resp, ccb->mmcio.cmd.resp, sizeof(cmd->resp)); 840 cmd->error = ccb->mmcio.cmd.error; 841 842 return (0); 843 } 844 845 static int 846 mmc_app_get_scr(struct cam_periph *periph, union ccb *ccb, uint32_t *rawscr) { 847 int err; 848 struct mmc_command cmd; 849 struct mmc_data d; 850 851 memset(&cmd, 0, sizeof(cmd)); 852 memset(&d, 0, sizeof(d)); 853 854 memset(rawscr, 0, 8); 855 cmd.opcode = ACMD_SEND_SCR; 856 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 857 cmd.arg = 0; 858 859 d.data = rawscr; 860 d.len = 8; 861 d.flags = MMC_DATA_READ; 862 cmd.data = &d; 863 864 err = mmc_exec_app_cmd(periph, ccb, &cmd); 865 rawscr[0] = be32toh(rawscr[0]); 866 rawscr[1] = be32toh(rawscr[1]); 867 return (err); 868 } 869 870 static int 871 mmc_send_ext_csd(struct cam_periph *periph, union ccb *ccb, 872 uint8_t *rawextcsd, size_t buf_len) { 873 int err; 874 struct mmc_data d; 875 876 KASSERT(buf_len == 512, ("Buffer for ext csd must be 512 bytes")); 877 memset(&d, 0, sizeof(d)); 878 d.data = rawextcsd; 879 d.len = buf_len; 880 d.flags = MMC_DATA_READ; 881 memset(d.data, 0, d.len); 882 883 cam_fill_mmcio(&ccb->mmcio, 884 /*retries*/ 0, 885 /*cbfcnp*/ NULL, 886 /*flags*/ CAM_DIR_IN, 887 /*mmc_opcode*/ MMC_SEND_EXT_CSD, 888 /*mmc_arg*/ 0, 889 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC, 890 /*mmc_data*/ &d, 891 /*timeout*/ 0); 892 893 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 894 err = mmc_handle_reply(ccb); 895 return (err); 896 } 897 898 static void 899 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr) 900 { 901 unsigned int scr_struct; 902 903 memset(scr, 0, sizeof(*scr)); 904 905 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4); 906 if (scr_struct != 0) { 907 printf("Unrecognised SCR structure version %d\n", 908 scr_struct); 909 return; 910 } 911 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4); 912 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4); 913 } 914 915 static inline void 916 mmc_switch_fill_mmcio(union ccb *ccb, 917 uint8_t set, uint8_t index, uint8_t value, u_int timeout) 918 { 919 int arg = (MMC_SWITCH_FUNC_WR << 24) | 920 (index << 16) | 921 (value << 8) | 922 set; 923 924 cam_fill_mmcio(&ccb->mmcio, 925 /*retries*/ 0, 926 /*cbfcnp*/ NULL, 927 /*flags*/ CAM_DIR_NONE, 928 /*mmc_opcode*/ MMC_SWITCH_FUNC, 929 /*mmc_arg*/ arg, 930 /*mmc_flags*/ MMC_RSP_R1B | MMC_CMD_AC, 931 /*mmc_data*/ NULL, 932 /*timeout*/ timeout); 933 } 934 935 static int 936 mmc_select_card(struct cam_periph *periph, union ccb *ccb, uint32_t rca) 937 { 938 int flags, err; 939 940 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC; 941 cam_fill_mmcio(&ccb->mmcio, 942 /*retries*/ 0, 943 /*cbfcnp*/ NULL, 944 /*flags*/ CAM_DIR_IN, 945 /*mmc_opcode*/ MMC_SELECT_CARD, 946 /*mmc_arg*/ rca << 16, 947 /*mmc_flags*/ flags, 948 /*mmc_data*/ NULL, 949 /*timeout*/ 0); 950 951 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 952 err = mmc_handle_reply(ccb); 953 return (err); 954 } 955 956 static int 957 mmc_switch(struct cam_periph *periph, union ccb *ccb, 958 uint8_t set, uint8_t index, uint8_t value, u_int timeout) 959 { 960 int err; 961 962 mmc_switch_fill_mmcio(ccb, set, index, value, timeout); 963 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 964 err = mmc_handle_reply(ccb); 965 return (err); 966 } 967 968 static uint32_t 969 mmc_get_spec_vers(struct cam_periph *periph) { 970 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 971 972 return (softc->csd.spec_vers); 973 } 974 975 static uint64_t 976 mmc_get_media_size(struct cam_periph *periph) { 977 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 978 979 return (softc->mediasize); 980 } 981 982 static uint32_t 983 mmc_get_cmd6_timeout(struct cam_periph *periph) 984 { 985 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 986 987 if (mmc_get_spec_vers(periph) >= 6) 988 return (softc->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME] * 10); 989 return (500 * 1000); 990 } 991 992 static int 993 mmc_sd_switch(struct cam_periph *periph, union ccb *ccb, 994 uint8_t mode, uint8_t grp, uint8_t value, 995 uint8_t *res) { 996 struct mmc_data mmc_d; 997 uint32_t arg; 998 int err; 999 1000 memset(res, 0, 64); 1001 memset(&mmc_d, 0, sizeof(mmc_d)); 1002 mmc_d.len = 64; 1003 mmc_d.data = res; 1004 mmc_d.flags = MMC_DATA_READ; 1005 1006 arg = mode << 31; /* 0 - check, 1 - set */ 1007 arg |= 0x00FFFFFF; 1008 arg &= ~(0xF << (grp * 4)); 1009 arg |= value << (grp * 4); 1010 1011 cam_fill_mmcio(&ccb->mmcio, 1012 /*retries*/ 0, 1013 /*cbfcnp*/ NULL, 1014 /*flags*/ CAM_DIR_IN, 1015 /*mmc_opcode*/ SD_SWITCH_FUNC, 1016 /*mmc_arg*/ arg, 1017 /*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC, 1018 /*mmc_data*/ &mmc_d, 1019 /*timeout*/ 0); 1020 1021 cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL); 1022 err = mmc_handle_reply(ccb); 1023 return (err); 1024 } 1025 1026 static int 1027 mmc_set_timing(struct cam_periph *periph, 1028 union ccb *ccb, 1029 enum mmc_bus_timing timing) 1030 { 1031 u_char switch_res[64]; 1032 int err; 1033 uint8_t value; 1034 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1035 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1036 1037 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, 1038 ("mmc_set_timing(timing=%d)", timing)); 1039 switch (timing) { 1040 case bus_timing_normal: 1041 value = 0; 1042 break; 1043 case bus_timing_hs: 1044 value = 1; 1045 break; 1046 default: 1047 return (MMC_ERR_INVALID); 1048 } 1049 if (mmcp->card_features & CARD_FEATURE_MMC) { 1050 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL, 1051 EXT_CSD_HS_TIMING, value, softc->cmd6_time); 1052 } else { 1053 err = mmc_sd_switch(periph, ccb, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, value, switch_res); 1054 } 1055 1056 /* Set high-speed timing on the host */ 1057 struct ccb_trans_settings_mmc *cts; 1058 cts = &ccb->cts.proto_specific.mmc; 1059 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1060 ccb->ccb_h.flags = CAM_DIR_NONE; 1061 ccb->ccb_h.retry_count = 0; 1062 ccb->ccb_h.timeout = 100; 1063 ccb->ccb_h.cbfcnp = NULL; 1064 cts->ios.timing = timing; 1065 cts->ios_valid = MMC_BT; 1066 xpt_action(ccb); 1067 1068 return (err); 1069 } 1070 1071 static void 1072 sdda_start_init_task(void *context, int pending) { 1073 union ccb *new_ccb; 1074 struct cam_periph *periph; 1075 1076 periph = (struct cam_periph *)context; 1077 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init_task\n")); 1078 new_ccb = xpt_alloc_ccb(); 1079 xpt_setup_ccb(&new_ccb->ccb_h, periph->path, 1080 CAM_PRIORITY_NONE); 1081 1082 cam_periph_lock(periph); 1083 cam_periph_hold(periph, PRIBIO|PCATCH); 1084 sdda_start_init(context, new_ccb); 1085 cam_periph_unhold(periph); 1086 cam_periph_unlock(periph); 1087 xpt_free_ccb(new_ccb); 1088 } 1089 1090 static void 1091 sdda_set_bus_width(struct cam_periph *periph, union ccb *ccb, int width) { 1092 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1093 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1094 int err; 1095 1096 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_set_bus_width\n")); 1097 1098 /* First set for the card, then for the host */ 1099 if (mmcp->card_features & CARD_FEATURE_MMC) { 1100 uint8_t value; 1101 switch (width) { 1102 case bus_width_1: 1103 value = EXT_CSD_BUS_WIDTH_1; 1104 break; 1105 case bus_width_4: 1106 value = EXT_CSD_BUS_WIDTH_4; 1107 break; 1108 case bus_width_8: 1109 value = EXT_CSD_BUS_WIDTH_8; 1110 break; 1111 default: 1112 panic("Invalid bus width %d", width); 1113 } 1114 err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL, 1115 EXT_CSD_BUS_WIDTH, value, softc->cmd6_time); 1116 } else { 1117 /* For SD cards we send ACMD6 with the required bus width in arg */ 1118 struct mmc_command cmd; 1119 memset(&cmd, 0, sizeof(struct mmc_command)); 1120 cmd.opcode = ACMD_SET_BUS_WIDTH; 1121 cmd.arg = width; 1122 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; 1123 err = mmc_exec_app_cmd(periph, ccb, &cmd); 1124 } 1125 1126 if (err != MMC_ERR_NONE) { 1127 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Error %d when setting bus width on the card\n", err)); 1128 return; 1129 } 1130 /* Now card is done, set the host to the same width */ 1131 struct ccb_trans_settings_mmc *cts; 1132 cts = &ccb->cts.proto_specific.mmc; 1133 ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1134 ccb->ccb_h.flags = CAM_DIR_NONE; 1135 ccb->ccb_h.retry_count = 0; 1136 ccb->ccb_h.timeout = 100; 1137 ccb->ccb_h.cbfcnp = NULL; 1138 cts->ios.bus_width = width; 1139 cts->ios_valid = MMC_BW; 1140 xpt_action(ccb); 1141 } 1142 1143 static inline const char 1144 *part_type(u_int type) 1145 { 1146 1147 switch (type) { 1148 case EXT_CSD_PART_CONFIG_ACC_RPMB: 1149 return ("RPMB"); 1150 case EXT_CSD_PART_CONFIG_ACC_DEFAULT: 1151 return ("default"); 1152 case EXT_CSD_PART_CONFIG_ACC_BOOT0: 1153 return ("boot0"); 1154 case EXT_CSD_PART_CONFIG_ACC_BOOT1: 1155 return ("boot1"); 1156 case EXT_CSD_PART_CONFIG_ACC_GP0: 1157 case EXT_CSD_PART_CONFIG_ACC_GP1: 1158 case EXT_CSD_PART_CONFIG_ACC_GP2: 1159 case EXT_CSD_PART_CONFIG_ACC_GP3: 1160 return ("general purpose"); 1161 default: 1162 return ("(unknown type)"); 1163 } 1164 } 1165 1166 static inline const char 1167 *bus_width_str(enum mmc_bus_width w) 1168 { 1169 1170 switch (w) { 1171 case bus_width_1: 1172 return ("1-bit"); 1173 case bus_width_4: 1174 return ("4-bit"); 1175 case bus_width_8: 1176 return ("8-bit"); 1177 default: 1178 __assert_unreachable(); 1179 } 1180 } 1181 1182 static uint32_t 1183 sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb) 1184 { 1185 struct ccb_trans_settings_mmc *cts; 1186 1187 cts = &ccb->cts.proto_specific.mmc; 1188 1189 ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1190 ccb->ccb_h.flags = CAM_DIR_NONE; 1191 ccb->ccb_h.retry_count = 0; 1192 ccb->ccb_h.timeout = 100; 1193 ccb->ccb_h.cbfcnp = NULL; 1194 xpt_action(ccb); 1195 1196 if (ccb->ccb_h.status != CAM_REQ_CMP) 1197 panic("Cannot get host caps"); 1198 return (cts->host_caps); 1199 } 1200 1201 static uint32_t 1202 sdda_get_max_data(struct cam_periph *periph, union ccb *ccb) 1203 { 1204 struct ccb_trans_settings_mmc *cts; 1205 1206 cts = &ccb->cts.proto_specific.mmc; 1207 memset(cts, 0, sizeof(struct ccb_trans_settings_mmc)); 1208 1209 ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1210 ccb->ccb_h.flags = CAM_DIR_NONE; 1211 ccb->ccb_h.retry_count = 0; 1212 ccb->ccb_h.timeout = 100; 1213 ccb->ccb_h.cbfcnp = NULL; 1214 xpt_action(ccb); 1215 1216 if (ccb->ccb_h.status != CAM_REQ_CMP) 1217 panic("Cannot get host max data"); 1218 KASSERT(cts->host_max_data != 0, ("host_max_data == 0?!")); 1219 return (cts->host_max_data); 1220 } 1221 1222 static void 1223 sdda_start_init(void *context, union ccb *start_ccb) 1224 { 1225 struct cam_periph *periph = (struct cam_periph *)context; 1226 struct ccb_trans_settings_mmc *cts; 1227 uint32_t host_caps; 1228 uint32_t sec_count; 1229 int err; 1230 int host_f_max; 1231 uint8_t card_type; 1232 1233 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init\n")); 1234 /* periph was held for us when this task was enqueued */ 1235 if ((periph->flags & CAM_PERIPH_INVALID) != 0) { 1236 cam_periph_release(periph); 1237 return; 1238 } 1239 1240 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1241 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1242 struct cam_ed *device = periph->path->device; 1243 1244 if (mmcp->card_features & CARD_FEATURE_MMC) { 1245 mmc_decode_csd_mmc(mmcp->card_csd, &softc->csd); 1246 mmc_decode_cid_mmc(mmcp->card_cid, &softc->cid); 1247 if (mmc_get_spec_vers(periph) >= 4) { 1248 err = mmc_send_ext_csd(periph, start_ccb, 1249 (uint8_t *)&softc->raw_ext_csd, 1250 sizeof(softc->raw_ext_csd)); 1251 if (err != 0) { 1252 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1253 ("Cannot read EXT_CSD, err %d", err)); 1254 return; 1255 } 1256 } 1257 } else { 1258 mmc_decode_csd_sd(mmcp->card_csd, &softc->csd); 1259 mmc_decode_cid_sd(mmcp->card_cid, &softc->cid); 1260 } 1261 1262 softc->sector_count = softc->csd.capacity / MMC_SECTOR_SIZE; 1263 softc->mediasize = softc->csd.capacity; 1264 softc->cmd6_time = mmc_get_cmd6_timeout(periph); 1265 1266 /* MMC >= 4.x have EXT_CSD that has its own opinion about capacity */ 1267 if (mmc_get_spec_vers(periph) >= 4) { 1268 sec_count = softc->raw_ext_csd[EXT_CSD_SEC_CNT] + 1269 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) + 1270 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) + 1271 (softc->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1272 if (sec_count != 0) { 1273 softc->sector_count = sec_count; 1274 softc->mediasize = softc->sector_count * MMC_SECTOR_SIZE; 1275 /* FIXME: there should be a better name for this option...*/ 1276 mmcp->card_features |= CARD_FEATURE_SDHC; 1277 } 1278 } 1279 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1280 ("Capacity: %"PRIu64", sectors: %"PRIu64"\n", 1281 softc->mediasize, 1282 softc->sector_count)); 1283 mmc_format_card_id_string(softc, mmcp); 1284 1285 /* Update info for CAM */ 1286 device->serial_num_len = strlen(softc->card_sn_string); 1287 device->serial_num = (uint8_t *)malloc((device->serial_num_len + 1), 1288 M_CAMXPT, M_NOWAIT); 1289 strlcpy(device->serial_num, softc->card_sn_string, device->serial_num_len + 1); 1290 1291 device->device_id_len = strlen(softc->card_id_string); 1292 device->device_id = (uint8_t *)malloc((device->device_id_len + 1), 1293 M_CAMXPT, M_NOWAIT); 1294 strlcpy(device->device_id, softc->card_id_string, device->device_id_len + 1); 1295 1296 strlcpy(mmcp->model, softc->card_id_string, sizeof(mmcp->model)); 1297 1298 /* Set the clock frequency that the card can handle */ 1299 cts = &start_ccb->cts.proto_specific.mmc; 1300 1301 /* First, get the host's max freq */ 1302 start_ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS; 1303 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1304 start_ccb->ccb_h.retry_count = 0; 1305 start_ccb->ccb_h.timeout = 100; 1306 start_ccb->ccb_h.cbfcnp = NULL; 1307 xpt_action(start_ccb); 1308 1309 if (start_ccb->ccb_h.status != CAM_REQ_CMP) 1310 panic("Cannot get max host freq"); 1311 host_f_max = cts->host_f_max; 1312 host_caps = cts->host_caps; 1313 if (cts->ios.bus_width != bus_width_1) 1314 panic("Bus width in ios is not 1-bit"); 1315 1316 /* Now check if the card supports High-speed */ 1317 softc->card_f_max = softc->csd.tran_speed; 1318 1319 if (host_caps & MMC_CAP_HSPEED) { 1320 /* Find out if the card supports High speed timing */ 1321 if (mmcp->card_features & CARD_FEATURE_SD20) { 1322 /* Get and decode SCR */ 1323 uint32_t rawscr[2]; 1324 uint8_t res[64]; 1325 if (mmc_app_get_scr(periph, start_ccb, rawscr)) { 1326 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Cannot get SCR\n")); 1327 goto finish_hs_tests; 1328 } 1329 mmc_app_decode_scr(rawscr, &softc->scr); 1330 1331 if ((softc->scr.sda_vsn >= 1) && (softc->csd.ccc & (1<<10))) { 1332 mmc_sd_switch(periph, start_ccb, SD_SWITCH_MODE_CHECK, 1333 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, res); 1334 if (res[13] & 2) { 1335 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS\n")); 1336 softc->card_f_max = SD_HS_MAX; 1337 } 1338 1339 /* 1340 * We deselect then reselect the card here. Some cards 1341 * become unselected and timeout with the above two 1342 * commands, although the state tables / diagrams in the 1343 * standard suggest they go back to the transfer state. 1344 * Other cards don't become deselected, and if we 1345 * attempt to blindly re-select them, we get timeout 1346 * errors from some controllers. So we deselect then 1347 * reselect to handle all situations. 1348 */ 1349 mmc_select_card(periph, start_ccb, 0); 1350 mmc_select_card(periph, start_ccb, get_rca(periph)); 1351 } else { 1352 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Not trying the switch\n")); 1353 goto finish_hs_tests; 1354 } 1355 } 1356 1357 if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) { 1358 card_type = softc->raw_ext_csd[EXT_CSD_CARD_TYPE]; 1359 if (card_type & EXT_CSD_CARD_TYPE_HS_52) 1360 softc->card_f_max = MMC_TYPE_HS_52_MAX; 1361 else if (card_type & EXT_CSD_CARD_TYPE_HS_26) 1362 softc->card_f_max = MMC_TYPE_HS_26_MAX; 1363 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 && 1364 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1365 setbit(&softc->timings, bus_timing_mmc_ddr52); 1366 setbit(&softc->vccq_120, bus_timing_mmc_ddr52); 1367 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports DDR52 at 1.2V\n")); 1368 } 1369 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 && 1370 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1371 setbit(&softc->timings, bus_timing_mmc_ddr52); 1372 setbit(&softc->vccq_180, bus_timing_mmc_ddr52); 1373 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports DDR52 at 1.8V\n")); 1374 } 1375 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 && 1376 (host_caps & MMC_CAP_SIGNALING_120) != 0) { 1377 setbit(&softc->timings, bus_timing_mmc_hs200); 1378 setbit(&softc->vccq_120, bus_timing_mmc_hs200); 1379 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS200 at 1.2V\n")); 1380 } 1381 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 && 1382 (host_caps & MMC_CAP_SIGNALING_180) != 0) { 1383 setbit(&softc->timings, bus_timing_mmc_hs200); 1384 setbit(&softc->vccq_180, bus_timing_mmc_hs200); 1385 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS200 at 1.8V\n")); 1386 } 1387 } 1388 } 1389 int f_max; 1390 finish_hs_tests: 1391 f_max = min(host_f_max, softc->card_f_max); 1392 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Set SD freq to %d MHz (min out of host f=%d MHz and card f=%d MHz)\n", f_max / 1000000, host_f_max / 1000000, softc->card_f_max / 1000000)); 1393 1394 /* Enable high-speed timing on the card */ 1395 if (f_max > 25000000) { 1396 err = mmc_set_timing(periph, start_ccb, bus_timing_hs); 1397 if (err != MMC_ERR_NONE) { 1398 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("Cannot switch card to high-speed mode")); 1399 f_max = 25000000; 1400 } 1401 } 1402 /* If possible, set lower-level signaling */ 1403 enum mmc_bus_timing timing; 1404 /* FIXME: MMCCAM supports max. bus_timing_mmc_ddr52 at the moment. */ 1405 for (timing = bus_timing_mmc_ddr52; timing > bus_timing_normal; timing--) { 1406 if (isset(&softc->vccq_120, timing)) { 1407 /* Set VCCQ = 1.2V */ 1408 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1409 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1410 start_ccb->ccb_h.retry_count = 0; 1411 start_ccb->ccb_h.timeout = 100; 1412 start_ccb->ccb_h.cbfcnp = NULL; 1413 cts->ios.vccq = vccq_120; 1414 cts->ios_valid = MMC_VCCQ; 1415 xpt_action(start_ccb); 1416 break; 1417 } else if (isset(&softc->vccq_180, timing)) { 1418 /* Set VCCQ = 1.8V */ 1419 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1420 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1421 start_ccb->ccb_h.retry_count = 0; 1422 start_ccb->ccb_h.timeout = 100; 1423 start_ccb->ccb_h.cbfcnp = NULL; 1424 cts->ios.vccq = vccq_180; 1425 cts->ios_valid = MMC_VCCQ; 1426 xpt_action(start_ccb); 1427 break; 1428 } else { 1429 /* Set VCCQ = 3.3V */ 1430 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1431 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1432 start_ccb->ccb_h.retry_count = 0; 1433 start_ccb->ccb_h.timeout = 100; 1434 start_ccb->ccb_h.cbfcnp = NULL; 1435 cts->ios.vccq = vccq_330; 1436 cts->ios_valid = MMC_VCCQ; 1437 xpt_action(start_ccb); 1438 break; 1439 } 1440 } 1441 1442 /* Set frequency on the controller */ 1443 start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS; 1444 start_ccb->ccb_h.flags = CAM_DIR_NONE; 1445 start_ccb->ccb_h.retry_count = 0; 1446 start_ccb->ccb_h.timeout = 100; 1447 start_ccb->ccb_h.cbfcnp = NULL; 1448 cts->ios.clock = f_max; 1449 cts->ios_valid = MMC_CLK; 1450 xpt_action(start_ccb); 1451 1452 /* Set bus width */ 1453 enum mmc_bus_width desired_bus_width = bus_width_1; 1454 enum mmc_bus_width max_host_bus_width = 1455 (host_caps & MMC_CAP_8_BIT_DATA ? bus_width_8 : 1456 host_caps & MMC_CAP_4_BIT_DATA ? bus_width_4 : bus_width_1); 1457 enum mmc_bus_width max_card_bus_width = bus_width_1; 1458 if (mmcp->card_features & CARD_FEATURE_SD20 && 1459 softc->scr.bus_widths & SD_SCR_BUS_WIDTH_4) 1460 max_card_bus_width = bus_width_4; 1461 /* 1462 * Unlike SD, MMC cards don't have any information about supported bus width... 1463 * So we need to perform read/write test to find out the width. 1464 */ 1465 /* TODO: figure out bus width for MMC; use 8-bit for now (to test on BBB) */ 1466 if (mmcp->card_features & CARD_FEATURE_MMC) 1467 max_card_bus_width = bus_width_8; 1468 1469 desired_bus_width = min(max_host_bus_width, max_card_bus_width); 1470 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1471 ("Set bus width to %s (min of host %s and card %s)\n", 1472 bus_width_str(desired_bus_width), 1473 bus_width_str(max_host_bus_width), 1474 bus_width_str(max_card_bus_width))); 1475 sdda_set_bus_width(periph, start_ccb, desired_bus_width); 1476 1477 softc->state = SDDA_STATE_NORMAL; 1478 1479 cam_periph_unhold(periph); 1480 /* MMC partitions support */ 1481 if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) { 1482 sdda_process_mmc_partitions(periph, start_ccb); 1483 } else if (mmcp->card_features & CARD_FEATURE_MEMORY) { 1484 /* For SD[HC] cards, just add one partition that is the whole card */ 1485 if (sdda_add_part(periph, 0, SDDA_FMT, 1486 periph->unit_number, 1487 mmc_get_media_size(periph), 1488 sdda_get_read_only(periph, start_ccb)) == false) 1489 return; 1490 softc->part_curr = 0; 1491 } 1492 cam_periph_hold(periph, PRIBIO|PCATCH); 1493 1494 xpt_announce_periph(periph, softc->card_id_string); 1495 /* 1496 * Add async callbacks for bus reset and bus device reset calls. 1497 * I don't bother checking if this fails as, in most cases, 1498 * the system will function just fine without them and the only 1499 * alternative would be to not attach the device on failure. 1500 */ 1501 xpt_register_async(AC_LOST_DEVICE | AC_GETDEV_CHANGED | 1502 AC_ADVINFO_CHANGED, sddaasync, periph, periph->path); 1503 } 1504 1505 static bool 1506 sdda_add_part(struct cam_periph *periph, u_int type, const char *name, 1507 u_int cnt, off_t media_size, bool ro) 1508 { 1509 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1510 struct sdda_part *part; 1511 struct ccb_pathinq cpi; 1512 1513 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1514 ("Partition type '%s', size %ju %s\n", 1515 part_type(type), 1516 media_size, 1517 ro ? "(read-only)" : "")); 1518 1519 part = sc->part[type] = malloc(sizeof(*part), M_DEVBUF, 1520 M_NOWAIT | M_ZERO); 1521 if (part == NULL) { 1522 printf("Cannot add partition for sdda\n"); 1523 return (false); 1524 } 1525 1526 part->cnt = cnt; 1527 part->type = type; 1528 part->ro = ro; 1529 part->sc = sc; 1530 snprintf(part->name, sizeof(part->name), name, "sdda", periph->unit_number); 1531 1532 /* 1533 * Due to the nature of RPMB partition it doesn't make much sense 1534 * to add it as a disk. It would be more appropriate to create a 1535 * userland tool to operate on the partition or leverage the existing 1536 * tools from sysutils/mmc-utils. 1537 */ 1538 if (type == EXT_CSD_PART_CONFIG_ACC_RPMB) { 1539 /* TODO: Create device, assign IOCTL handler */ 1540 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1541 ("Don't know what to do with RPMB partitions yet\n")); 1542 return (false); 1543 } 1544 1545 bioq_init(&part->bio_queue); 1546 1547 bzero(&cpi, sizeof(cpi)); 1548 xpt_setup_ccb(&cpi.ccb_h, periph->path, CAM_PRIORITY_NONE); 1549 cpi.ccb_h.func_code = XPT_PATH_INQ; 1550 xpt_action((union ccb *)&cpi); 1551 1552 /* 1553 * Register this media as a disk 1554 */ 1555 (void)cam_periph_hold(periph, PRIBIO); 1556 cam_periph_unlock(periph); 1557 1558 part->disk = disk_alloc(); 1559 part->disk->d_rotation_rate = DISK_RR_NON_ROTATING; 1560 part->disk->d_devstat = devstat_new_entry(part->name, 1561 cnt, MMC_SECTOR_SIZE, 1562 DEVSTAT_ALL_SUPPORTED, 1563 DEVSTAT_TYPE_DIRECT | XPORT_DEVSTAT_TYPE(cpi.transport), 1564 DEVSTAT_PRIORITY_DISK); 1565 1566 part->disk->d_open = sddaopen; 1567 part->disk->d_close = sddaclose; 1568 part->disk->d_strategy = sddastrategy; 1569 if (cam_sim_pollable(periph->sim)) 1570 part->disk->d_dump = sddadump; 1571 part->disk->d_getattr = sddagetattr; 1572 part->disk->d_gone = sddadiskgonecb; 1573 part->disk->d_name = part->name; 1574 part->disk->d_drv1 = part; 1575 part->disk->d_maxsize = 1576 MIN(maxphys, sdda_get_max_data(periph, 1577 (union ccb *)&cpi) * mmc_get_sector_size(periph)); 1578 part->disk->d_unit = cnt; 1579 part->disk->d_flags = 0; 1580 strlcpy(part->disk->d_descr, sc->card_id_string, 1581 MIN(sizeof(part->disk->d_descr), sizeof(sc->card_id_string))); 1582 strlcpy(part->disk->d_ident, sc->card_sn_string, 1583 MIN(sizeof(part->disk->d_ident), sizeof(sc->card_sn_string))); 1584 part->disk->d_hba_vendor = cpi.hba_vendor; 1585 part->disk->d_hba_device = cpi.hba_device; 1586 part->disk->d_hba_subvendor = cpi.hba_subvendor; 1587 part->disk->d_hba_subdevice = cpi.hba_subdevice; 1588 snprintf(part->disk->d_attachment, sizeof(part->disk->d_attachment), 1589 "%s%d", cpi.dev_name, cpi.unit_number); 1590 1591 part->disk->d_sectorsize = mmc_get_sector_size(periph); 1592 part->disk->d_mediasize = media_size; 1593 part->disk->d_stripesize = 0; 1594 part->disk->d_fwsectors = 0; 1595 part->disk->d_fwheads = 0; 1596 1597 if (sdda_mmcsd_compat) { 1598 char cname[SDDA_PART_NAMELEN]; /* This equals the mmcsd namelen. */ 1599 snprintf(cname, sizeof(cname), name, "mmcsd", periph->unit_number); 1600 disk_add_alias(part->disk, cname); 1601 } 1602 1603 /* 1604 * Acquire a reference to the periph before we register with GEOM. 1605 * We'll release this reference once GEOM calls us back (via 1606 * sddadiskgonecb()) telling us that our provider has been freed. 1607 */ 1608 if (cam_periph_acquire(periph) != 0) { 1609 xpt_print(periph->path, "%s: lost periph during " 1610 "registration!\n", __func__); 1611 cam_periph_lock(periph); 1612 return (false); 1613 } 1614 disk_create(part->disk, DISK_VERSION); 1615 cam_periph_lock(periph); 1616 cam_periph_unhold(periph); 1617 1618 return (true); 1619 } 1620 1621 /* 1622 * For MMC cards, process EXT_CSD and add partitions that are supported by 1623 * this device. 1624 */ 1625 static void 1626 sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *ccb) 1627 { 1628 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1629 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1630 off_t erase_size, sector_size, size, wp_size; 1631 int i; 1632 const uint8_t *ext_csd; 1633 uint8_t rev; 1634 bool comp, ro; 1635 1636 ext_csd = sc->raw_ext_csd; 1637 1638 /* 1639 * Enhanced user data area and general purpose partitions are only 1640 * supported in revision 1.4 (EXT_CSD_REV == 4) and later, the RPMB 1641 * partition in revision 1.5 (MMC v4.41, EXT_CSD_REV == 5) and later. 1642 */ 1643 rev = ext_csd[EXT_CSD_REV]; 1644 1645 /* 1646 * Ignore user-creatable enhanced user data area and general purpose 1647 * partitions partitions as long as partitioning hasn't been finished. 1648 */ 1649 comp = (ext_csd[EXT_CSD_PART_SET] & EXT_CSD_PART_SET_COMPLETED) != 0; 1650 1651 /* 1652 * Add enhanced user data area slice, unless it spans the entirety of 1653 * the user data area. The enhanced area is of a multiple of high 1654 * capacity write protect groups ((ERASE_GRP_SIZE + HC_WP_GRP_SIZE) * 1655 * 512 KB) and its offset given in either sectors or bytes, depending 1656 * on whether it's a high capacity device or not. 1657 * NB: The slicer and its slices need to be registered before adding 1658 * the disk for the corresponding user data area as re-tasting is 1659 * racy. 1660 */ 1661 sector_size = mmc_get_sector_size(periph); 1662 size = ext_csd[EXT_CSD_ENH_SIZE_MULT] + 1663 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) + 1664 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16); 1665 if (rev >= 4 && comp == TRUE && size > 0 && 1666 (ext_csd[EXT_CSD_PART_SUPPORT] & 1667 EXT_CSD_PART_SUPPORT_ENH_ATTR_EN) != 0 && 1668 (ext_csd[EXT_CSD_PART_ATTR] & (EXT_CSD_PART_ATTR_ENH_USR)) != 0) { 1669 erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 * 1670 MMC_SECTOR_SIZE; 1671 wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1672 size *= erase_size * wp_size; 1673 if (size != mmc_get_media_size(periph) * sector_size) { 1674 sc->enh_size = size; 1675 sc->enh_base = (ext_csd[EXT_CSD_ENH_START_ADDR] + 1676 (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) + 1677 (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) + 1678 (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24)) * 1679 ((mmcp->card_features & CARD_FEATURE_SDHC) ? 1: MMC_SECTOR_SIZE); 1680 } else 1681 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1682 ("enhanced user data area spans entire device")); 1683 } 1684 1685 /* 1686 * Add default partition. This may be the only one or the user 1687 * data area in case partitions are supported. 1688 */ 1689 ro = sdda_get_read_only(periph, ccb); 1690 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_DEFAULT, SDDA_FMT, 1691 periph->unit_number, mmc_get_media_size(periph), ro); 1692 sc->part_curr = EXT_CSD_PART_CONFIG_ACC_DEFAULT; 1693 1694 if (mmc_get_spec_vers(periph) < 3) 1695 return; 1696 1697 /* Belatedly announce enhanced user data slice. */ 1698 if (sc->enh_size != 0) { 1699 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1700 ("enhanced user data area off 0x%jx size %ju bytes\n", 1701 sc->enh_base, sc->enh_size)); 1702 } 1703 1704 /* 1705 * Determine partition switch timeout (provided in units of 10 ms) 1706 * and ensure it's at least 300 ms as some eMMC chips lie. 1707 */ 1708 sc->part_time = max(ext_csd[EXT_CSD_PART_SWITCH_TO] * 10 * 1000, 1709 300 * 1000); 1710 1711 /* Add boot partitions, which are of a fixed multiple of 128 KB. */ 1712 size = ext_csd[EXT_CSD_BOOT_SIZE_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE; 1713 if (size > 0 && (sdda_get_host_caps(periph, ccb) & MMC_CAP_BOOT_NOACC) == 0) { 1714 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT0, 1715 SDDA_FMT_BOOT, 0, size, 1716 ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] & 1717 EXT_CSD_BOOT_WP_STATUS_BOOT0_MASK) != 0)); 1718 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT1, 1719 SDDA_FMT_BOOT, 1, size, 1720 ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] & 1721 EXT_CSD_BOOT_WP_STATUS_BOOT1_MASK) != 0)); 1722 } 1723 1724 /* Add RPMB partition, which also is of a fixed multiple of 128 KB. */ 1725 size = ext_csd[EXT_CSD_RPMB_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE; 1726 if (rev >= 5 && size > 0) 1727 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_RPMB, 1728 SDDA_FMT_RPMB, 0, size, ro); 1729 1730 if (rev <= 3 || comp == FALSE) 1731 return; 1732 1733 /* 1734 * Add general purpose partitions, which are of a multiple of high 1735 * capacity write protect groups, too. 1736 */ 1737 if ((ext_csd[EXT_CSD_PART_SUPPORT] & EXT_CSD_PART_SUPPORT_EN) != 0) { 1738 erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 * 1739 MMC_SECTOR_SIZE; 1740 wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1741 for (i = 0; i < MMC_PART_GP_MAX; i++) { 1742 size = ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3] + 1743 (ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 1] << 8) + 1744 (ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 2] << 16); 1745 if (size == 0) 1746 continue; 1747 sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_GP0 + i, 1748 SDDA_FMT_GP, i, size * erase_size * wp_size, ro); 1749 } 1750 } 1751 } 1752 1753 /* 1754 * We cannot just call mmc_switch() since it will sleep, and we are in 1755 * GEOM context and cannot sleep. Instead, create an MMCIO request to switch 1756 * partitions and send it to h/w, and upon completion resume processing 1757 * the I/O queue. 1758 * This function cannot fail, instead check switch errors in sddadone(). 1759 */ 1760 static void 1761 sdda_init_switch_part(struct cam_periph *periph, union ccb *start_ccb, 1762 uint8_t part) 1763 { 1764 struct sdda_softc *sc = (struct sdda_softc *)periph->softc; 1765 uint8_t value; 1766 1767 KASSERT(part < MMC_PART_MAX, ("%s: invalid partition index", __func__)); 1768 sc->part_requested = part; 1769 1770 value = (sc->raw_ext_csd[EXT_CSD_PART_CONFIG] & 1771 ~EXT_CSD_PART_CONFIG_ACC_MASK) | part; 1772 1773 mmc_switch_fill_mmcio(start_ccb, EXT_CSD_CMD_SET_NORMAL, 1774 EXT_CSD_PART_CONFIG, value, sc->part_time); 1775 start_ccb->ccb_h.cbfcnp = sddadone; 1776 1777 sc->outstanding_cmds++; 1778 cam_periph_unlock(periph); 1779 xpt_action(start_ccb); 1780 cam_periph_lock(periph); 1781 } 1782 1783 /* Called with periph lock held! */ 1784 static void 1785 sddastart(struct cam_periph *periph, union ccb *start_ccb) 1786 { 1787 struct bio *bp; 1788 struct sdda_softc *softc = (struct sdda_softc *)periph->softc; 1789 struct sdda_part *part; 1790 struct mmc_params *mmcp = &periph->path->device->mmc_ident_data; 1791 uint8_t part_index; 1792 1793 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastart\n")); 1794 1795 if (softc->state != SDDA_STATE_NORMAL) { 1796 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("device is not in SDDA_STATE_NORMAL yet\n")); 1797 xpt_release_ccb(start_ccb); 1798 return; 1799 } 1800 1801 /* Find partition that has outstanding commands. Prefer current partition. */ 1802 part_index = softc->part_curr; 1803 part = softc->part[softc->part_curr]; 1804 bp = bioq_first(&part->bio_queue); 1805 if (bp == NULL) { 1806 for (part_index = 0; part_index < MMC_PART_MAX; part_index++) { 1807 if ((part = softc->part[part_index]) != NULL && 1808 (bp = bioq_first(&softc->part[part_index]->bio_queue)) != NULL) 1809 break; 1810 } 1811 } 1812 if (bp == NULL) { 1813 xpt_release_ccb(start_ccb); 1814 return; 1815 } 1816 if (part_index != softc->part_curr) { 1817 CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, 1818 ("Partition %d -> %d\n", softc->part_curr, part_index)); 1819 /* 1820 * According to section "6.2.2 Command restrictions" of the eMMC 1821 * specification v5.1, CMD19/CMD21 aren't allowed to be used with 1822 * RPMB partitions. So we pause re-tuning along with triggering 1823 * it up-front to decrease the likelihood of re-tuning becoming 1824 * necessary while accessing an RPMB partition. Consequently, an 1825 * RPMB partition should immediately be switched away from again 1826 * after an access in order to allow for re-tuning to take place 1827 * anew. 1828 */ 1829 /* TODO: pause retune if switching to RPMB partition */ 1830 softc->state = SDDA_STATE_PART_SWITCH; 1831 sdda_init_switch_part(periph, start_ccb, part_index); 1832 return; 1833 } 1834 1835 bioq_remove(&part->bio_queue, bp); 1836 1837 switch (bp->bio_cmd) { 1838 case BIO_WRITE: 1839 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_WRITE\n")); 1840 part->flags |= SDDA_FLAG_DIRTY; 1841 /* FALLTHROUGH */ 1842 case BIO_READ: 1843 { 1844 struct ccb_mmcio *mmcio; 1845 uint64_t blockno = bp->bio_pblkno; 1846 uint16_t count = bp->bio_bcount / MMC_SECTOR_SIZE; 1847 uint16_t opcode; 1848 1849 if (bp->bio_cmd == BIO_READ) 1850 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_READ\n")); 1851 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, 1852 ("Block %"PRIu64" cnt %u\n", blockno, count)); 1853 1854 /* Construct new MMC command */ 1855 if (bp->bio_cmd == BIO_READ) { 1856 if (count > 1) 1857 opcode = MMC_READ_MULTIPLE_BLOCK; 1858 else 1859 opcode = MMC_READ_SINGLE_BLOCK; 1860 } else { 1861 if (count > 1) 1862 opcode = MMC_WRITE_MULTIPLE_BLOCK; 1863 else 1864 opcode = MMC_WRITE_BLOCK; 1865 } 1866 1867 start_ccb->ccb_h.func_code = XPT_MMC_IO; 1868 start_ccb->ccb_h.flags = (bp->bio_cmd == BIO_READ ? CAM_DIR_IN : CAM_DIR_OUT); 1869 start_ccb->ccb_h.retry_count = 0; 1870 start_ccb->ccb_h.timeout = 15 * 1000; 1871 start_ccb->ccb_h.cbfcnp = sddadone; 1872 1873 mmcio = &start_ccb->mmcio; 1874 mmcio->cmd.opcode = opcode; 1875 mmcio->cmd.arg = blockno; 1876 if (!(mmcp->card_features & CARD_FEATURE_SDHC)) 1877 mmcio->cmd.arg <<= 9; 1878 1879 mmcio->cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 1880 mmcio->cmd.data = softc->mmcdata; 1881 memset(mmcio->cmd.data, 0, sizeof(struct mmc_data)); 1882 mmcio->cmd.data->data = bp->bio_data; 1883 mmcio->cmd.data->len = MMC_SECTOR_SIZE * count; 1884 mmcio->cmd.data->flags = (bp->bio_cmd == BIO_READ ? MMC_DATA_READ : MMC_DATA_WRITE); 1885 /* Direct h/w to issue CMD12 upon completion */ 1886 if (count > 1) { 1887 mmcio->cmd.data->flags |= MMC_DATA_MULTI; 1888 mmcio->stop.opcode = MMC_STOP_TRANSMISSION; 1889 mmcio->stop.flags = MMC_RSP_R1B | MMC_CMD_AC; 1890 mmcio->stop.arg = 0; 1891 } 1892 1893 break; 1894 } 1895 case BIO_FLUSH: 1896 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_FLUSH\n")); 1897 sddaschedule(periph); 1898 break; 1899 case BIO_DELETE: 1900 CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_DELETE\n")); 1901 sddaschedule(periph); 1902 break; 1903 default: 1904 biofinish(bp, NULL, EOPNOTSUPP); 1905 xpt_release_ccb(start_ccb); 1906 return; 1907 } 1908 start_ccb->ccb_h.ccb_bp = bp; 1909 softc->outstanding_cmds++; 1910 softc->refcount++; 1911 cam_periph_unlock(periph); 1912 xpt_action(start_ccb); 1913 cam_periph_lock(periph); 1914 1915 /* May have more work to do, so ensure we stay scheduled */ 1916 sddaschedule(periph); 1917 } 1918 1919 static void 1920 sddadone(struct cam_periph *periph, union ccb *done_ccb) 1921 { 1922 struct bio *bp; 1923 struct sdda_softc *softc; 1924 struct ccb_mmcio *mmcio; 1925 struct cam_path *path; 1926 uint32_t card_status; 1927 int error = 0; 1928 1929 softc = (struct sdda_softc *)periph->softc; 1930 mmcio = &done_ccb->mmcio; 1931 path = done_ccb->ccb_h.path; 1932 1933 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddadone\n")); 1934 if ((done_ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) { 1935 CAM_DEBUG(path, CAM_DEBUG_TRACE, ("Error!!!\n")); 1936 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0) 1937 cam_release_devq(path, 1938 /*relsim_flags*/0, 1939 /*reduction*/0, 1940 /*timeout*/0, 1941 /*getcount_only*/0); 1942 error = EIO; 1943 } else { 1944 if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0) 1945 panic("REQ_CMP with QFRZN"); 1946 error = 0; 1947 } 1948 1949 card_status = mmcio->cmd.resp[0]; 1950 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1951 ("Card status: %08x\n", R1_STATUS(card_status))); 1952 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1953 ("Current state: %d\n", R1_CURRENT_STATE(card_status))); 1954 1955 /* Process result of switching MMC partitions */ 1956 if (softc->state == SDDA_STATE_PART_SWITCH) { 1957 CAM_DEBUG(path, CAM_DEBUG_TRACE, 1958 ("Completing partition switch to %d\n", 1959 softc->part_requested)); 1960 softc->outstanding_cmds--; 1961 /* Complete partition switch */ 1962 softc->state = SDDA_STATE_NORMAL; 1963 if (error != 0) { 1964 /* TODO: Unpause retune if accessing RPMB */ 1965 xpt_release_ccb(done_ccb); 1966 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 1967 return; 1968 } 1969 1970 softc->raw_ext_csd[EXT_CSD_PART_CONFIG] = 1971 (softc->raw_ext_csd[EXT_CSD_PART_CONFIG] & 1972 ~EXT_CSD_PART_CONFIG_ACC_MASK) | softc->part_requested; 1973 /* TODO: Unpause retune if accessing RPMB */ 1974 softc->part_curr = softc->part_requested; 1975 xpt_release_ccb(done_ccb); 1976 1977 /* Return to processing BIO requests */ 1978 xpt_schedule(periph, CAM_PRIORITY_NORMAL); 1979 return; 1980 } 1981 1982 bp = (struct bio *)done_ccb->ccb_h.ccb_bp; 1983 bp->bio_error = error; 1984 if (error != 0) { 1985 bp->bio_resid = bp->bio_bcount; 1986 bp->bio_flags |= BIO_ERROR; 1987 } else { 1988 /* XXX: How many bytes remaining? */ 1989 bp->bio_resid = 0; 1990 if (bp->bio_resid > 0) 1991 bp->bio_flags |= BIO_ERROR; 1992 } 1993 1994 softc->outstanding_cmds--; 1995 xpt_release_ccb(done_ccb); 1996 /* 1997 * Release the periph refcount taken in sddastart() for each CCB. 1998 */ 1999 KASSERT(softc->refcount >= 1, ("sddadone softc %p refcount %d", softc, softc->refcount)); 2000 softc->refcount--; 2001 biodone(bp); 2002 } 2003 2004 static int 2005 sddaerror(union ccb *ccb, uint32_t cam_flags, uint32_t sense_flags) 2006 { 2007 return(cam_periph_error(ccb, cam_flags, sense_flags)); 2008 } 2009 2010 static int 2011 sddadump(void *arg, void *virtual, off_t offset, size_t length) 2012 { 2013 struct ccb_mmcio mmcio; 2014 struct disk *dp; 2015 struct sdda_part *part; 2016 struct sdda_softc *softc; 2017 struct cam_periph *periph; 2018 struct mmc_params *mmcp; 2019 uint16_t count; 2020 uint16_t opcode; 2021 int error; 2022 2023 dp = arg; 2024 part = dp->d_drv1; 2025 softc = part->sc; 2026 periph = softc->periph; 2027 mmcp = &periph->path->device->mmc_ident_data; 2028 2029 if (softc->state != SDDA_STATE_NORMAL) 2030 return (ENXIO); 2031 2032 count = length / MMC_SECTOR_SIZE; 2033 if (count == 0) 2034 return (0); 2035 2036 if (softc->part[softc->part_curr] != part) 2037 return (EIO); /* TODO implement polled partition switch */ 2038 2039 memset(&mmcio, 0, sizeof(mmcio)); 2040 xpt_setup_ccb(&mmcio.ccb_h, periph->path, CAM_PRIORITY_NORMAL); /* XXX needed? */ 2041 2042 mmcio.ccb_h.func_code = XPT_MMC_IO; 2043 mmcio.ccb_h.flags = CAM_DIR_OUT; 2044 mmcio.ccb_h.retry_count = 0; 2045 mmcio.ccb_h.timeout = 15 * 1000; 2046 2047 if (count > 1) 2048 opcode = MMC_WRITE_MULTIPLE_BLOCK; 2049 else 2050 opcode = MMC_WRITE_BLOCK; 2051 mmcio.cmd.opcode = opcode; 2052 mmcio.cmd.arg = offset / MMC_SECTOR_SIZE; 2053 if (!(mmcp->card_features & CARD_FEATURE_SDHC)) 2054 mmcio.cmd.arg <<= 9; 2055 2056 mmcio.cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; 2057 mmcio.cmd.data = softc->mmcdata; 2058 memset(mmcio.cmd.data, 0, sizeof(struct mmc_data)); 2059 mmcio.cmd.data->data = virtual; 2060 mmcio.cmd.data->len = MMC_SECTOR_SIZE * count; 2061 mmcio.cmd.data->flags = MMC_DATA_WRITE; 2062 2063 /* Direct h/w to issue CMD12 upon completion */ 2064 if (count > 1) { 2065 mmcio.cmd.data->flags |= MMC_DATA_MULTI; 2066 mmcio.stop.opcode = MMC_STOP_TRANSMISSION; 2067 mmcio.stop.flags = MMC_RSP_R1B | MMC_CMD_AC; 2068 mmcio.stop.arg = 0; 2069 } 2070 2071 error = cam_periph_runccb((union ccb *)&mmcio, cam_periph_error, 2072 0, SF_NO_RECOVERY | SF_NO_RETRY, NULL); 2073 if (error != 0) 2074 printf("Aborting dump due to I/O error.\n"); 2075 return (error); 2076 } 2077 2078 #endif /* _KERNEL */ 2079