xref: /freebsd/sys/cam/cam_ccb.h (revision f0cfa1b168014f56c02b83e5f28412cc5f78d117)
1 /*-
2  * Data structures and definitions for CAM Control Blocks (CCBs).
3  *
4  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
5  *
6  * Copyright (c) 1997, 1998 Justin T. Gibbs.
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions, and the following disclaimer,
14  *    without modification, immediately at the beginning of the file.
15  * 2. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
22  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * $FreeBSD$
31  */
32 
33 #ifndef _CAM_CAM_CCB_H
34 #define _CAM_CAM_CCB_H 1
35 
36 #include <sys/queue.h>
37 #include <sys/cdefs.h>
38 #include <sys/time.h>
39 #include <sys/limits.h>
40 #ifndef _KERNEL
41 #include <sys/callout.h>
42 #endif
43 #include <cam/cam_debug.h>
44 #include <cam/scsi/scsi_all.h>
45 #include <cam/ata/ata_all.h>
46 #include <cam/nvme/nvme_all.h>
47 #include <cam/mmc/mmc_all.h>
48 
49 /* General allocation length definitions for CCB structures */
50 #define	IOCDBLEN	CAM_MAX_CDBLEN	/* Space for CDB bytes/pointer */
51 #define	VUHBALEN	14		/* Vendor Unique HBA length */
52 #define	SIM_IDLEN	16		/* ASCII string len for SIM ID */
53 #define	HBA_IDLEN	16		/* ASCII string len for HBA ID */
54 #define	DEV_IDLEN	16		/* ASCII string len for device names */
55 #define CCB_PERIPH_PRIV_SIZE 	2	/* size of peripheral private area */
56 #define CCB_SIM_PRIV_SIZE 	2	/* size of sim private area */
57 
58 /* Struct definitions for CAM control blocks */
59 
60 /* Common CCB header */
61 /* CAM CCB flags */
62 typedef enum {
63 	CAM_CDB_POINTER		= 0x00000001,/* The CDB field is a pointer    */
64 	CAM_QUEUE_ENABLE	= 0x00000002,/* SIM queue actions are enabled */
65 	CAM_CDB_LINKED		= 0x00000004,/* CCB contains a linked CDB     */
66 	CAM_NEGOTIATE		= 0x00000008,/*
67 					      * Perform transport negotiation
68 					      * with this command.
69 					      */
70 	CAM_DATA_ISPHYS		= 0x00000010,/* Data type with physical addrs */
71 	CAM_DIS_AUTOSENSE	= 0x00000020,/* Disable autosense feature     */
72 	CAM_DIR_BOTH		= 0x00000000,/* Data direction (00:IN/OUT)    */
73 	CAM_DIR_IN		= 0x00000040,/* Data direction (01:DATA IN)   */
74 	CAM_DIR_OUT		= 0x00000080,/* Data direction (10:DATA OUT)  */
75 	CAM_DIR_NONE		= 0x000000C0,/* Data direction (11:no data)   */
76 	CAM_DIR_MASK		= 0x000000C0,/* Data direction Mask	      */
77 	CAM_DATA_VADDR		= 0x00000000,/* Data type (000:Virtual)       */
78 	CAM_DATA_PADDR		= 0x00000010,/* Data type (001:Physical)      */
79 	CAM_DATA_SG		= 0x00040000,/* Data type (010:sglist)        */
80 	CAM_DATA_SG_PADDR	= 0x00040010,/* Data type (011:sglist phys)   */
81 	CAM_DATA_BIO		= 0x00200000,/* Data type (100:bio)           */
82 	CAM_DATA_MASK		= 0x00240010,/* Data type mask                */
83 	CAM_SOFT_RST_OP		= 0x00000100,/* Use Soft reset alternative    */
84 	CAM_ENG_SYNC		= 0x00000200,/* Flush resid bytes on complete */
85 	CAM_DEV_QFRZDIS		= 0x00000400,/* Disable DEV Q freezing	      */
86 	CAM_DEV_QFREEZE		= 0x00000800,/* Freeze DEV Q on execution     */
87 	CAM_HIGH_POWER		= 0x00001000,/* Command takes a lot of power  */
88 	CAM_SENSE_PTR		= 0x00002000,/* Sense data is a pointer	      */
89 	CAM_SENSE_PHYS		= 0x00004000,/* Sense pointer is physical addr*/
90 	CAM_TAG_ACTION_VALID	= 0x00008000,/* Use the tag action in this ccb*/
91 	CAM_PASS_ERR_RECOVER	= 0x00010000,/* Pass driver does err. recovery*/
92 	CAM_DIS_DISCONNECT	= 0x00020000,/* Disable disconnect	      */
93 	CAM_MSG_BUF_PHYS	= 0x00080000,/* Message buffer ptr is physical*/
94 	CAM_SNS_BUF_PHYS	= 0x00100000,/* Autosense data ptr is physical*/
95 	CAM_CDB_PHYS		= 0x00400000,/* CDB poiner is physical	      */
96 	CAM_ENG_SGLIST		= 0x00800000,/* SG list is for the HBA engine */
97 
98 /* Phase cognizant mode flags */
99 	CAM_DIS_AUTOSRP		= 0x01000000,/* Disable autosave/restore ptrs */
100 	CAM_DIS_AUTODISC	= 0x02000000,/* Disable auto disconnect	      */
101 	CAM_TGT_CCB_AVAIL	= 0x04000000,/* Target CCB available	      */
102 	CAM_TGT_PHASE_MODE	= 0x08000000,/* The SIM runs in phase mode    */
103 	CAM_MSGB_VALID		= 0x10000000,/* Message buffer valid	      */
104 	CAM_STATUS_VALID	= 0x20000000,/* Status buffer valid	      */
105 	CAM_DATAB_VALID		= 0x40000000,/* Data buffer valid	      */
106 
107 /* Host target Mode flags */
108 	CAM_SEND_SENSE		= 0x08000000,/* Send sense data with status   */
109 	CAM_TERM_IO		= 0x10000000,/* Terminate I/O Message sup.    */
110 	CAM_DISCONNECT		= 0x20000000,/* Disconnects are mandatory     */
111 	CAM_SEND_STATUS		= 0x40000000,/* Send status after data phase  */
112 
113 	CAM_UNLOCKED		= 0x80000000 /* Call callback without lock.   */
114 } ccb_flags;
115 
116 typedef enum {
117 	CAM_USER_DATA_ADDR	= 0x00000002,/* Userspace data pointers */
118 	CAM_SG_FORMAT_IOVEC	= 0x00000004,/* iovec instead of busdma S/G*/
119 	CAM_UNMAPPED_BUF	= 0x00000008 /* use unmapped I/O */
120 } ccb_xflags;
121 
122 /* XPT Opcodes for xpt_action */
123 typedef enum {
124 /* Function code flags are bits greater than 0xff */
125 	XPT_FC_QUEUED		= 0x100,
126 				/* Non-immediate function code */
127 	XPT_FC_USER_CCB		= 0x200,
128 	XPT_FC_XPT_ONLY		= 0x400,
129 				/* Only for the transport layer device */
130 	XPT_FC_DEV_QUEUED	= 0x800 | XPT_FC_QUEUED,
131 				/* Passes through the device queues */
132 /* Common function commands: 0x00->0x0F */
133 	XPT_NOOP 		= 0x00,
134 				/* Execute Nothing */
135 	XPT_SCSI_IO		= 0x01 | XPT_FC_DEV_QUEUED,
136 				/* Execute the requested I/O operation */
137 	XPT_GDEV_TYPE		= 0x02,
138 				/* Get type information for specified device */
139 	XPT_GDEVLIST		= 0x03,
140 				/* Get a list of peripheral devices */
141 	XPT_PATH_INQ		= 0x04,
142 				/* Path routing inquiry */
143 	XPT_REL_SIMQ		= 0x05,
144 				/* Release a frozen device queue */
145 	XPT_SASYNC_CB		= 0x06,
146 				/* Set Asynchronous Callback Parameters */
147 	XPT_SDEV_TYPE		= 0x07,
148 				/* Set device type information */
149 	XPT_SCAN_BUS		= 0x08 | XPT_FC_QUEUED | XPT_FC_USER_CCB
150 				       | XPT_FC_XPT_ONLY,
151 				/* (Re)Scan the SCSI Bus */
152 	XPT_DEV_MATCH		= 0x09 | XPT_FC_XPT_ONLY,
153 				/* Get EDT entries matching the given pattern */
154 	XPT_DEBUG		= 0x0a,
155 				/* Turn on debugging for a bus, target or lun */
156 	XPT_PATH_STATS		= 0x0b,
157 				/* Path statistics (error counts, etc.) */
158 	XPT_GDEV_STATS		= 0x0c,
159 				/* Device statistics (error counts, etc.) */
160 	XPT_DEV_ADVINFO		= 0x0e,
161 				/* Get/Set Device advanced information */
162 	XPT_ASYNC		= 0x0f | XPT_FC_QUEUED | XPT_FC_USER_CCB
163 				       | XPT_FC_XPT_ONLY,
164 				/* Asynchronous event */
165 /* SCSI Control Functions: 0x10->0x1F */
166 	XPT_ABORT		= 0x10,
167 				/* Abort the specified CCB */
168 	XPT_RESET_BUS		= 0x11 | XPT_FC_XPT_ONLY,
169 				/* Reset the specified SCSI bus */
170 	XPT_RESET_DEV		= 0x12 | XPT_FC_DEV_QUEUED,
171 				/* Bus Device Reset the specified SCSI device */
172 	XPT_TERM_IO		= 0x13,
173 				/* Terminate the I/O process */
174 	XPT_SCAN_LUN		= 0x14 | XPT_FC_QUEUED | XPT_FC_USER_CCB
175 				       | XPT_FC_XPT_ONLY,
176 				/* Scan Logical Unit */
177 	XPT_GET_TRAN_SETTINGS	= 0x15,
178 				/*
179 				 * Get default/user transfer settings
180 				 * for the target
181 				 */
182 	XPT_SET_TRAN_SETTINGS	= 0x16,
183 				/*
184 				 * Set transfer rate/width
185 				 * negotiation settings
186 				 */
187 	XPT_CALC_GEOMETRY	= 0x17,
188 				/*
189 				 * Calculate the geometry parameters for
190 				 * a device give the sector size and
191 				 * volume size.
192 				 */
193 	XPT_ATA_IO		= 0x18 | XPT_FC_DEV_QUEUED,
194 				/* Execute the requested ATA I/O operation */
195 
196 	XPT_GET_SIM_KNOB_OLD	= 0x18, /* Compat only */
197 
198 	XPT_SET_SIM_KNOB	= 0x19,
199 				/*
200 				 * Set SIM specific knob values.
201 				 */
202 
203 	XPT_GET_SIM_KNOB	= 0x1a,
204 				/*
205 				 * Get SIM specific knob values.
206 				 */
207 
208 	XPT_SMP_IO		= 0x1b | XPT_FC_DEV_QUEUED,
209 				/* Serial Management Protocol */
210 
211 	XPT_NVME_IO		= 0x1c | XPT_FC_DEV_QUEUED,
212 				/* Execute the requested NVMe I/O operation */
213 
214 	XPT_MMC_IO		= 0x1d | XPT_FC_DEV_QUEUED,
215 				/* Placeholder for MMC / SD / SDIO I/O stuff */
216 
217 	XPT_SCAN_TGT		= 0x1e | XPT_FC_QUEUED | XPT_FC_USER_CCB
218 				       | XPT_FC_XPT_ONLY,
219 				/* Scan Target */
220 
221 	XPT_NVME_ADMIN		= 0x1f | XPT_FC_DEV_QUEUED,
222 				/* Execute the requested NVMe Admin operation */
223 
224 /* HBA engine commands 0x20->0x2F */
225 	XPT_ENG_INQ		= 0x20 | XPT_FC_XPT_ONLY,
226 				/* HBA engine feature inquiry */
227 	XPT_ENG_EXEC		= 0x21 | XPT_FC_DEV_QUEUED,
228 				/* HBA execute engine request */
229 
230 /* Target mode commands: 0x30->0x3F */
231 	XPT_EN_LUN		= 0x30,
232 				/* Enable LUN as a target */
233 	XPT_TARGET_IO		= 0x31 | XPT_FC_DEV_QUEUED,
234 				/* Execute target I/O request */
235 	XPT_ACCEPT_TARGET_IO	= 0x32 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
236 				/* Accept Host Target Mode CDB */
237 	XPT_CONT_TARGET_IO	= 0x33 | XPT_FC_DEV_QUEUED,
238 				/* Continue Host Target I/O Connection */
239 	XPT_IMMED_NOTIFY	= 0x34 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
240 				/* Notify Host Target driver of event (obsolete) */
241 	XPT_NOTIFY_ACK		= 0x35,
242 				/* Acknowledgement of event (obsolete) */
243 	XPT_IMMEDIATE_NOTIFY	= 0x36 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
244 				/* Notify Host Target driver of event */
245 	XPT_NOTIFY_ACKNOWLEDGE	= 0x37 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
246 				/* Acknowledgement of event */
247 	XPT_REPROBE_LUN		= 0x38 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
248 				/* Query device capacity and notify GEOM */
249 
250 /* Vendor Unique codes: 0x80->0x8F */
251 	XPT_VUNIQUE		= 0x80
252 } xpt_opcode;
253 
254 #define XPT_FC_GROUP_MASK		0xF0
255 #define XPT_FC_GROUP(op) ((op) & XPT_FC_GROUP_MASK)
256 #define XPT_FC_GROUP_COMMON		0x00
257 #define XPT_FC_GROUP_SCSI_CONTROL	0x10
258 #define XPT_FC_GROUP_HBA_ENGINE		0x20
259 #define XPT_FC_GROUP_TMODE		0x30
260 #define XPT_FC_GROUP_VENDOR_UNIQUE	0x80
261 
262 #define XPT_FC_IS_DEV_QUEUED(ccb) 	\
263     (((ccb)->ccb_h.func_code & XPT_FC_DEV_QUEUED) == XPT_FC_DEV_QUEUED)
264 #define XPT_FC_IS_QUEUED(ccb) 	\
265     (((ccb)->ccb_h.func_code & XPT_FC_QUEUED) != 0)
266 
267 typedef enum {
268 	PROTO_UNKNOWN,
269 	PROTO_UNSPECIFIED,
270 	PROTO_SCSI,	/* Small Computer System Interface */
271 	PROTO_ATA,	/* AT Attachment */
272 	PROTO_ATAPI,	/* AT Attachment Packetized Interface */
273 	PROTO_SATAPM,	/* SATA Port Multiplier */
274 	PROTO_SEMB,	/* SATA Enclosure Management Bridge */
275 	PROTO_NVME,	/* NVME */
276 	PROTO_MMCSD,	/* MMC, SD, SDIO */
277 } cam_proto;
278 
279 typedef enum {
280 	XPORT_UNKNOWN,
281 	XPORT_UNSPECIFIED,
282 	XPORT_SPI,	/* SCSI Parallel Interface */
283 	XPORT_FC,	/* Fiber Channel */
284 	XPORT_SSA,	/* Serial Storage Architecture */
285 	XPORT_USB,	/* Universal Serial Bus */
286 	XPORT_PPB,	/* Parallel Port Bus */
287 	XPORT_ATA,	/* AT Attachment */
288 	XPORT_SAS,	/* Serial Attached SCSI */
289 	XPORT_SATA,	/* Serial AT Attachment */
290 	XPORT_ISCSI,	/* iSCSI */
291 	XPORT_SRP,	/* SCSI RDMA Protocol */
292 	XPORT_NVME,	/* NVMe over PCIe */
293 	XPORT_MMCSD,	/* MMC, SD, SDIO card */
294 } cam_xport;
295 
296 #define XPORT_IS_NVME(t)	((t) == XPORT_NVME)
297 #define XPORT_IS_ATA(t)		((t) == XPORT_ATA || (t) == XPORT_SATA)
298 #define XPORT_IS_SCSI(t)	((t) != XPORT_UNKNOWN && \
299 				 (t) != XPORT_UNSPECIFIED && \
300 				 !XPORT_IS_ATA(t) && !XPORT_IS_NVME(t))
301 #define XPORT_DEVSTAT_TYPE(t)	(XPORT_IS_ATA(t) ? DEVSTAT_TYPE_IF_IDE : \
302 				 XPORT_IS_SCSI(t) ? DEVSTAT_TYPE_IF_SCSI : \
303 				 DEVSTAT_TYPE_IF_OTHER)
304 
305 #define PROTO_VERSION_UNKNOWN (UINT_MAX - 1)
306 #define PROTO_VERSION_UNSPECIFIED UINT_MAX
307 #define XPORT_VERSION_UNKNOWN (UINT_MAX - 1)
308 #define XPORT_VERSION_UNSPECIFIED UINT_MAX
309 
310 typedef union {
311 	LIST_ENTRY(ccb_hdr) le;
312 	SLIST_ENTRY(ccb_hdr) sle;
313 	TAILQ_ENTRY(ccb_hdr) tqe;
314 	STAILQ_ENTRY(ccb_hdr) stqe;
315 } camq_entry;
316 
317 typedef union {
318 	void		*ptr;
319 	u_long		field;
320 	u_int8_t	bytes[sizeof(uintptr_t)];
321 } ccb_priv_entry;
322 
323 typedef union {
324 	ccb_priv_entry	entries[CCB_PERIPH_PRIV_SIZE];
325 	u_int8_t	bytes[CCB_PERIPH_PRIV_SIZE * sizeof(ccb_priv_entry)];
326 } ccb_ppriv_area;
327 
328 typedef union {
329 	ccb_priv_entry	entries[CCB_SIM_PRIV_SIZE];
330 	u_int8_t	bytes[CCB_SIM_PRIV_SIZE * sizeof(ccb_priv_entry)];
331 } ccb_spriv_area;
332 
333 typedef struct {
334 	struct timeval	*etime;
335 	uintptr_t	sim_data;
336 	uintptr_t	periph_data;
337 } ccb_qos_area;
338 
339 struct ccb_hdr {
340 	cam_pinfo	pinfo;		/* Info for priority scheduling */
341 	camq_entry	xpt_links;	/* For chaining in the XPT layer */
342 	camq_entry	sim_links;	/* For chaining in the SIM layer */
343 	camq_entry	periph_links;	/* For chaining in the type driver */
344 	u_int32_t	retry_count;
345 	void		(*cbfcnp)(struct cam_periph *, union ccb *);
346 					/* Callback on completion function */
347 	xpt_opcode	func_code;	/* XPT function code */
348 	u_int32_t	status;		/* Status returned by CAM subsystem */
349 	struct		cam_path *path;	/* Compiled path for this ccb */
350 	path_id_t	path_id;	/* Path ID for the request */
351 	target_id_t	target_id;	/* Target device ID */
352 	lun_id_t	target_lun;	/* Target LUN number */
353 	u_int32_t	flags;		/* ccb_flags */
354 	u_int32_t	xflags;		/* Extended flags */
355 	ccb_ppriv_area	periph_priv;
356 	ccb_spriv_area	sim_priv;
357 	ccb_qos_area	qos;
358 	u_int32_t	timeout;	/* Hard timeout value in mseconds */
359 	struct timeval	softtimeout;	/* Soft timeout value in sec + usec */
360 };
361 
362 /* Get Device Information CCB */
363 struct ccb_getdev {
364 	struct	  ccb_hdr ccb_h;
365 	cam_proto protocol;
366 	struct scsi_inquiry_data inq_data;
367 	struct ata_params ident_data;
368 	u_int8_t  serial_num[252];
369 	u_int8_t  inq_flags;
370 	u_int8_t  serial_num_len;
371 	void *padding[2];
372 };
373 
374 /* Device Statistics CCB */
375 struct ccb_getdevstats {
376 	struct	ccb_hdr	ccb_h;
377 	int	dev_openings;	/* Space left for more work on device*/
378 	int	dev_active;	/* Transactions running on the device */
379 	int	allocated;	/* CCBs allocated for the device */
380 	int	queued;		/* CCBs queued to be sent to the device */
381 	int	held;		/*
382 				 * CCBs held by peripheral drivers
383 				 * for this device
384 				 */
385 	int	maxtags;	/*
386 				 * Boundary conditions for number of
387 				 * tagged operations
388 				 */
389 	int	mintags;
390 	struct	timeval last_reset;	/* Time of last bus reset/loop init */
391 };
392 
393 typedef enum {
394 	CAM_GDEVLIST_LAST_DEVICE,
395 	CAM_GDEVLIST_LIST_CHANGED,
396 	CAM_GDEVLIST_MORE_DEVS,
397 	CAM_GDEVLIST_ERROR
398 } ccb_getdevlist_status_e;
399 
400 struct ccb_getdevlist {
401 	struct ccb_hdr		ccb_h;
402 	char 			periph_name[DEV_IDLEN];
403 	u_int32_t		unit_number;
404 	unsigned int		generation;
405 	u_int32_t		index;
406 	ccb_getdevlist_status_e	status;
407 };
408 
409 typedef enum {
410 	PERIPH_MATCH_NONE	= 0x000,
411 	PERIPH_MATCH_PATH	= 0x001,
412 	PERIPH_MATCH_TARGET	= 0x002,
413 	PERIPH_MATCH_LUN	= 0x004,
414 	PERIPH_MATCH_NAME	= 0x008,
415 	PERIPH_MATCH_UNIT	= 0x010,
416 	PERIPH_MATCH_ANY	= 0x01f
417 } periph_pattern_flags;
418 
419 struct periph_match_pattern {
420 	char			periph_name[DEV_IDLEN];
421 	u_int32_t		unit_number;
422 	path_id_t		path_id;
423 	target_id_t		target_id;
424 	lun_id_t		target_lun;
425 	periph_pattern_flags	flags;
426 };
427 
428 typedef enum {
429 	DEV_MATCH_NONE		= 0x000,
430 	DEV_MATCH_PATH		= 0x001,
431 	DEV_MATCH_TARGET	= 0x002,
432 	DEV_MATCH_LUN		= 0x004,
433 	DEV_MATCH_INQUIRY	= 0x008,
434 	DEV_MATCH_DEVID		= 0x010,
435 	DEV_MATCH_ANY		= 0x00f
436 } dev_pattern_flags;
437 
438 struct device_id_match_pattern {
439 	uint8_t id_len;
440 	uint8_t id[256];
441 };
442 
443 struct device_match_pattern {
444 	path_id_t					path_id;
445 	target_id_t					target_id;
446 	lun_id_t					target_lun;
447 	dev_pattern_flags				flags;
448 	union {
449 		struct scsi_static_inquiry_pattern	inq_pat;
450 		struct device_id_match_pattern		devid_pat;
451 	} data;
452 };
453 
454 typedef enum {
455 	BUS_MATCH_NONE		= 0x000,
456 	BUS_MATCH_PATH		= 0x001,
457 	BUS_MATCH_NAME		= 0x002,
458 	BUS_MATCH_UNIT		= 0x004,
459 	BUS_MATCH_BUS_ID	= 0x008,
460 	BUS_MATCH_ANY		= 0x00f
461 } bus_pattern_flags;
462 
463 struct bus_match_pattern {
464 	path_id_t		path_id;
465 	char			dev_name[DEV_IDLEN];
466 	u_int32_t		unit_number;
467 	u_int32_t		bus_id;
468 	bus_pattern_flags	flags;
469 };
470 
471 union match_pattern {
472 	struct periph_match_pattern	periph_pattern;
473 	struct device_match_pattern	device_pattern;
474 	struct bus_match_pattern	bus_pattern;
475 };
476 
477 typedef enum {
478 	DEV_MATCH_PERIPH,
479 	DEV_MATCH_DEVICE,
480 	DEV_MATCH_BUS
481 } dev_match_type;
482 
483 struct dev_match_pattern {
484 	dev_match_type		type;
485 	union match_pattern	pattern;
486 };
487 
488 struct periph_match_result {
489 	char			periph_name[DEV_IDLEN];
490 	u_int32_t		unit_number;
491 	path_id_t		path_id;
492 	target_id_t		target_id;
493 	lun_id_t		target_lun;
494 };
495 
496 typedef enum {
497 	DEV_RESULT_NOFLAG		= 0x00,
498 	DEV_RESULT_UNCONFIGURED		= 0x01
499 } dev_result_flags;
500 
501 struct device_match_result {
502 	path_id_t			path_id;
503 	target_id_t			target_id;
504 	lun_id_t			target_lun;
505 	cam_proto			protocol;
506 	struct scsi_inquiry_data	inq_data;
507 	struct ata_params		ident_data;
508 	dev_result_flags		flags;
509 	struct mmc_params		mmc_ident_data;
510 };
511 
512 struct bus_match_result {
513 	path_id_t	path_id;
514 	char		dev_name[DEV_IDLEN];
515 	u_int32_t	unit_number;
516 	u_int32_t	bus_id;
517 };
518 
519 union match_result {
520 	struct periph_match_result	periph_result;
521 	struct device_match_result	device_result;
522 	struct bus_match_result		bus_result;
523 };
524 
525 struct dev_match_result {
526 	dev_match_type		type;
527 	union match_result	result;
528 };
529 
530 typedef enum {
531 	CAM_DEV_MATCH_LAST,
532 	CAM_DEV_MATCH_MORE,
533 	CAM_DEV_MATCH_LIST_CHANGED,
534 	CAM_DEV_MATCH_SIZE_ERROR,
535 	CAM_DEV_MATCH_ERROR
536 } ccb_dev_match_status;
537 
538 typedef enum {
539 	CAM_DEV_POS_NONE	= 0x000,
540 	CAM_DEV_POS_BUS		= 0x001,
541 	CAM_DEV_POS_TARGET	= 0x002,
542 	CAM_DEV_POS_DEVICE	= 0x004,
543 	CAM_DEV_POS_PERIPH	= 0x008,
544 	CAM_DEV_POS_PDPTR	= 0x010,
545 	CAM_DEV_POS_TYPEMASK	= 0xf00,
546 	CAM_DEV_POS_EDT		= 0x100,
547 	CAM_DEV_POS_PDRV	= 0x200
548 } dev_pos_type;
549 
550 struct ccb_dm_cookie {
551 	void 	*bus;
552 	void	*target;
553 	void	*device;
554 	void	*periph;
555 	void	*pdrv;
556 };
557 
558 struct ccb_dev_position {
559 	u_int			generations[4];
560 #define	CAM_BUS_GENERATION	0x00
561 #define CAM_TARGET_GENERATION	0x01
562 #define CAM_DEV_GENERATION	0x02
563 #define CAM_PERIPH_GENERATION	0x03
564 	dev_pos_type		position_type;
565 	struct ccb_dm_cookie	cookie;
566 };
567 
568 struct ccb_dev_match {
569 	struct ccb_hdr			ccb_h;
570 	ccb_dev_match_status		status;
571 	u_int32_t			num_patterns;
572 	u_int32_t			pattern_buf_len;
573 	struct dev_match_pattern	*patterns;
574 	u_int32_t			num_matches;
575 	u_int32_t			match_buf_len;
576 	struct dev_match_result		*matches;
577 	struct ccb_dev_position		pos;
578 };
579 
580 /*
581  * Definitions for the path inquiry CCB fields.
582  */
583 #define CAM_VERSION	0x19	/* Hex value for current version */
584 
585 typedef enum {
586 	PI_MDP_ABLE	= 0x80,	/* Supports MDP message */
587 	PI_WIDE_32	= 0x40,	/* Supports 32 bit wide SCSI */
588 	PI_WIDE_16	= 0x20, /* Supports 16 bit wide SCSI */
589 	PI_SDTR_ABLE	= 0x10,	/* Supports SDTR message */
590 	PI_LINKED_CDB	= 0x08, /* Supports linked CDBs */
591 	PI_SATAPM	= 0x04,	/* Supports SATA PM */
592 	PI_TAG_ABLE	= 0x02,	/* Supports tag queue messages */
593 	PI_SOFT_RST	= 0x01	/* Supports soft reset alternative */
594 } pi_inqflag;
595 
596 typedef enum {
597 	PIT_PROCESSOR	= 0x80,	/* Target mode processor mode */
598 	PIT_PHASE	= 0x40,	/* Target mode phase cog. mode */
599 	PIT_DISCONNECT	= 0x20,	/* Disconnects supported in target mode */
600 	PIT_TERM_IO	= 0x10,	/* Terminate I/O message supported in TM */
601 	PIT_GRP_6	= 0x08,	/* Group 6 commands supported */
602 	PIT_GRP_7	= 0x04	/* Group 7 commands supported */
603 } pi_tmflag;
604 
605 typedef enum {
606 	PIM_ATA_EXT	= 0x200,/* ATA requests can understand ata_ext requests */
607 	PIM_EXTLUNS	= 0x100,/* 64bit extended LUNs supported */
608 	PIM_SCANHILO	= 0x80,	/* Bus scans from high ID to low ID */
609 	PIM_NOREMOVE	= 0x40,	/* Removeable devices not included in scan */
610 	PIM_NOINITIATOR	= 0x20,	/* Initiator role not supported. */
611 	PIM_NOBUSRESET	= 0x10,	/* User has disabled initial BUS RESET */
612 	PIM_NO_6_BYTE	= 0x08,	/* Do not send 6-byte commands */
613 	PIM_SEQSCAN	= 0x04,	/* Do bus scans sequentially, not in parallel */
614 	PIM_UNMAPPED	= 0x02,
615 	PIM_NOSCAN	= 0x01	/* SIM does its own scanning */
616 } pi_miscflag;
617 
618 /* Path Inquiry CCB */
619 struct ccb_pathinq_settings_spi {
620 	u_int8_t ppr_options;
621 };
622 
623 struct ccb_pathinq_settings_fc {
624 	u_int64_t wwnn;		/* world wide node name */
625 	u_int64_t wwpn;		/* world wide port name */
626 	u_int32_t port;		/* 24 bit port id, if known */
627 	u_int32_t bitrate;	/* Mbps */
628 };
629 
630 struct ccb_pathinq_settings_sas {
631 	u_int32_t bitrate;	/* Mbps */
632 };
633 
634 struct ccb_pathinq_settings_nvme {
635 	uint32_t nsid;		/* Namespace ID for this path */
636 };
637 
638 #define	PATHINQ_SETTINGS_SIZE	128
639 
640 struct ccb_pathinq {
641 	struct 	    ccb_hdr ccb_h;
642 	u_int8_t    version_num;	/* Version number for the SIM/HBA */
643 	u_int8_t    hba_inquiry;	/* Mimic of INQ byte 7 for the HBA */
644 	u_int16_t   target_sprt;	/* Flags for target mode support */
645 	u_int32_t   hba_misc;		/* Misc HBA features */
646 	u_int16_t   hba_eng_cnt;	/* HBA engine count */
647 					/* Vendor Unique capabilities */
648 	u_int8_t    vuhba_flags[VUHBALEN];
649 	u_int32_t   max_target;		/* Maximum supported Target */
650 	u_int32_t   max_lun;		/* Maximum supported Lun */
651 	u_int32_t   async_flags;	/* Installed Async handlers */
652 	path_id_t   hpath_id;		/* Highest Path ID in the subsystem */
653 	target_id_t initiator_id;	/* ID of the HBA on the SCSI bus */
654 	char	    sim_vid[SIM_IDLEN];	/* Vendor ID of the SIM */
655 	char	    hba_vid[HBA_IDLEN];	/* Vendor ID of the HBA */
656 	char 	    dev_name[DEV_IDLEN];/* Device name for SIM */
657 	u_int32_t   unit_number;	/* Unit number for SIM */
658 	u_int32_t   bus_id;		/* Bus ID for SIM */
659 	u_int32_t   base_transfer_speed;/* Base bus speed in KB/sec */
660 	cam_proto   protocol;
661 	u_int	    protocol_version;
662 	cam_xport   transport;
663 	u_int	    transport_version;
664 	union {
665 		struct ccb_pathinq_settings_spi spi;
666 		struct ccb_pathinq_settings_fc fc;
667 		struct ccb_pathinq_settings_sas sas;
668 		struct ccb_pathinq_settings_nvme nvme;
669 		char ccb_pathinq_settings_opaque[PATHINQ_SETTINGS_SIZE];
670 	} xport_specific;
671 	u_int		maxio;		/* Max supported I/O size, in bytes. */
672 	u_int16_t	hba_vendor;	/* HBA vendor ID */
673 	u_int16_t	hba_device;	/* HBA device ID */
674 	u_int16_t	hba_subvendor;	/* HBA subvendor ID */
675 	u_int16_t	hba_subdevice;	/* HBA subdevice ID */
676 };
677 
678 /* Path Statistics CCB */
679 struct ccb_pathstats {
680 	struct	ccb_hdr	ccb_h;
681 	struct	timeval last_reset;	/* Time of last bus reset/loop init */
682 };
683 
684 typedef enum {
685 	SMP_FLAG_NONE		= 0x00,
686 	SMP_FLAG_REQ_SG		= 0x01,
687 	SMP_FLAG_RSP_SG		= 0x02
688 } ccb_smp_pass_flags;
689 
690 /*
691  * Serial Management Protocol CCB
692  * XXX Currently the semantics for this CCB are that it is executed either
693  * by the addressed device, or that device's parent (i.e. an expander for
694  * any device on an expander) if the addressed device doesn't support SMP.
695  * Later, once we have the ability to probe SMP-only devices and put them
696  * in CAM's topology, the CCB will only be executed by the addressed device
697  * if possible.
698  */
699 struct ccb_smpio {
700 	struct ccb_hdr		ccb_h;
701 	uint8_t			*smp_request;
702 	int			smp_request_len;
703 	uint16_t		smp_request_sglist_cnt;
704 	uint8_t			*smp_response;
705 	int			smp_response_len;
706 	uint16_t		smp_response_sglist_cnt;
707 	ccb_smp_pass_flags	flags;
708 };
709 
710 typedef union {
711 	u_int8_t *sense_ptr;		/*
712 					 * Pointer to storage
713 					 * for sense information
714 					 */
715 	                                /* Storage Area for sense information */
716 	struct	 scsi_sense_data sense_buf;
717 } sense_t;
718 
719 typedef union {
720 	u_int8_t  *cdb_ptr;		/* Pointer to the CDB bytes to send */
721 					/* Area for the CDB send */
722 	u_int8_t  cdb_bytes[IOCDBLEN];
723 } cdb_t;
724 
725 /*
726  * SCSI I/O Request CCB used for the XPT_SCSI_IO and XPT_CONT_TARGET_IO
727  * function codes.
728  */
729 struct ccb_scsiio {
730 	struct	   ccb_hdr ccb_h;
731 	union	   ccb *next_ccb;	/* Ptr for next CCB for action */
732 	u_int8_t   *req_map;		/* Ptr to mapping info */
733 	u_int8_t   *data_ptr;		/* Ptr to the data buf/SG list */
734 	u_int32_t  dxfer_len;		/* Data transfer length */
735 					/* Autosense storage */
736 	struct     scsi_sense_data sense_data;
737 	u_int8_t   sense_len;		/* Number of bytes to autosense */
738 	u_int8_t   cdb_len;		/* Number of bytes for the CDB */
739 	u_int16_t  sglist_cnt;		/* Number of SG list entries */
740 	u_int8_t   scsi_status;		/* Returned SCSI status */
741 	u_int8_t   sense_resid;		/* Autosense resid length: 2's comp */
742 	u_int32_t  resid;		/* Transfer residual length: 2's comp */
743 	cdb_t	   cdb_io;		/* Union for CDB bytes/pointer */
744 	u_int8_t   *msg_ptr;		/* Pointer to the message buffer */
745 	u_int16_t  msg_len;		/* Number of bytes for the Message */
746 	u_int8_t   tag_action;		/* What to do for tag queueing */
747 	/*
748 	 * The tag action should be either the define below (to send a
749 	 * non-tagged transaction) or one of the defined scsi tag messages
750 	 * from scsi_message.h.
751 	 */
752 #define		CAM_TAG_ACTION_NONE	0x00
753 	u_int	   tag_id;		/* tag id from initator (target mode) */
754 	u_int	   init_id;		/* initiator id of who selected */
755 #if defined(BUF_TRACKING) || defined(FULL_BUF_TRACKING)
756 	struct bio *bio;		/* Associated bio */
757 #endif
758 };
759 
760 static __inline uint8_t *
761 scsiio_cdb_ptr(struct ccb_scsiio *ccb)
762 {
763 	return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ?
764 	    ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes);
765 }
766 
767 /*
768  * ATA I/O Request CCB used for the XPT_ATA_IO function code.
769  */
770 struct ccb_ataio {
771 	struct	   ccb_hdr ccb_h;
772 	union	   ccb *next_ccb;	/* Ptr for next CCB for action */
773 	struct ata_cmd	cmd;		/* ATA command register set */
774 	struct ata_res	res;		/* ATA result register set */
775 	u_int8_t   *data_ptr;		/* Ptr to the data buf/SG list */
776 	u_int32_t  dxfer_len;		/* Data transfer length */
777 	u_int32_t  resid;		/* Transfer residual length: 2's comp */
778 	u_int8_t   ata_flags;		/* Flags for the rest of the buffer */
779 #define ATA_FLAG_AUX 0x1
780 	uint32_t   aux;
781 	uint32_t   unused;
782 };
783 
784 /*
785  * MMC I/O Request CCB used for the XPT_MMC_IO function code.
786  */
787 struct ccb_mmcio {
788 	struct	   ccb_hdr ccb_h;
789 	union	   ccb *next_ccb;	/* Ptr for next CCB for action */
790 	struct mmc_command cmd;
791         struct mmc_command stop;
792 };
793 
794 struct ccb_accept_tio {
795 	struct	   ccb_hdr ccb_h;
796 	cdb_t	   cdb_io;		/* Union for CDB bytes/pointer */
797 	u_int8_t   cdb_len;		/* Number of bytes for the CDB */
798 	u_int8_t   tag_action;		/* What to do for tag queueing */
799 	u_int8_t   sense_len;		/* Number of bytes of Sense Data */
800 	u_int      tag_id;		/* tag id from initator (target mode) */
801 	u_int      init_id;		/* initiator id of who selected */
802 	struct     scsi_sense_data sense_data;
803 };
804 
805 static __inline uint8_t *
806 atio_cdb_ptr(struct ccb_accept_tio *ccb)
807 {
808 	return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ?
809 	    ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes);
810 }
811 
812 /* Release SIM Queue */
813 struct ccb_relsim {
814 	struct ccb_hdr ccb_h;
815 	u_int32_t      release_flags;
816 #define RELSIM_ADJUST_OPENINGS		0x01
817 #define RELSIM_RELEASE_AFTER_TIMEOUT	0x02
818 #define RELSIM_RELEASE_AFTER_CMDCMPLT	0x04
819 #define RELSIM_RELEASE_AFTER_QEMPTY	0x08
820 	u_int32_t      openings;
821 	u_int32_t      release_timeout;	/* Abstract argument. */
822 	u_int32_t      qfrozen_cnt;
823 };
824 
825 /*
826  * NVMe I/O Request CCB used for the XPT_NVME_IO and XPT_NVME_ADMIN function codes.
827  */
828 struct ccb_nvmeio {
829 	struct	   ccb_hdr ccb_h;
830 	union	   ccb *next_ccb;	/* Ptr for next CCB for action */
831 	struct nvme_command cmd;	/* NVME command, per NVME standard */
832 	struct nvme_completion cpl;	/* NVME completion, per NVME standard */
833 	uint8_t   *data_ptr;		/* Ptr to the data buf/SG list */
834 	uint32_t  dxfer_len;		/* Data transfer length */
835 	uint16_t  sglist_cnt;		/* Number of SG list entries */
836 	uint16_t  unused;		/* padding for removed uint32_t */
837 };
838 
839 /*
840  * Definitions for the asynchronous callback CCB fields.
841  */
842 typedef enum {
843 	AC_UNIT_ATTENTION	= 0x4000,/* Device reported UNIT ATTENTION */
844 	AC_ADVINFO_CHANGED	= 0x2000,/* Advance info might have changes */
845 	AC_CONTRACT		= 0x1000,/* A contractual callback */
846 	AC_GETDEV_CHANGED	= 0x800,/* Getdev info might have changed */
847 	AC_INQ_CHANGED		= 0x400,/* Inquiry info might have changed */
848 	AC_TRANSFER_NEG		= 0x200,/* New transfer settings in effect */
849 	AC_LOST_DEVICE		= 0x100,/* A device went away */
850 	AC_FOUND_DEVICE		= 0x080,/* A new device was found */
851 	AC_PATH_DEREGISTERED	= 0x040,/* A path has de-registered */
852 	AC_PATH_REGISTERED	= 0x020,/* A new path has been registered */
853 	AC_SENT_BDR		= 0x010,/* A BDR message was sent to target */
854 	AC_SCSI_AEN		= 0x008,/* A SCSI AEN has been received */
855 	AC_UNSOL_RESEL		= 0x002,/* Unsolicited reselection occurred */
856 	AC_BUS_RESET		= 0x001	/* A SCSI bus reset occurred */
857 } ac_code;
858 
859 typedef void ac_callback_t (void *softc, u_int32_t code,
860 			    struct cam_path *path, void *args);
861 
862 /*
863  * Generic Asynchronous callbacks.
864  *
865  * Generic arguments passed bac which are then interpreted between a per-system
866  * contract number.
867  */
868 #define	AC_CONTRACT_DATA_MAX (128 - sizeof (u_int64_t))
869 struct ac_contract {
870 	u_int64_t	contract_number;
871 	u_int8_t	contract_data[AC_CONTRACT_DATA_MAX];
872 };
873 
874 #define	AC_CONTRACT_DEV_CHG	1
875 struct ac_device_changed {
876 	u_int64_t	wwpn;
877 	u_int32_t	port;
878 	target_id_t	target;
879 	u_int8_t	arrived;
880 };
881 
882 /* Set Asynchronous Callback CCB */
883 struct ccb_setasync {
884 	struct ccb_hdr	 ccb_h;
885 	u_int32_t	 event_enable;	/* Async Event enables */
886 	ac_callback_t	*callback;
887 	void		*callback_arg;
888 };
889 
890 /* Set Device Type CCB */
891 struct ccb_setdev {
892 	struct	   ccb_hdr ccb_h;
893 	u_int8_t   dev_type;	/* Value for dev type field in EDT */
894 };
895 
896 /* SCSI Control Functions */
897 
898 /* Abort XPT request CCB */
899 struct ccb_abort {
900 	struct 	ccb_hdr ccb_h;
901 	union	ccb *abort_ccb;	/* Pointer to CCB to abort */
902 };
903 
904 /* Reset SCSI Bus CCB */
905 struct ccb_resetbus {
906 	struct	ccb_hdr ccb_h;
907 };
908 
909 /* Reset SCSI Device CCB */
910 struct ccb_resetdev {
911 	struct	ccb_hdr ccb_h;
912 };
913 
914 /* Terminate I/O Process Request CCB */
915 struct ccb_termio {
916 	struct	ccb_hdr ccb_h;
917 	union	ccb *termio_ccb;	/* Pointer to CCB to terminate */
918 };
919 
920 typedef enum {
921 	CTS_TYPE_CURRENT_SETTINGS,
922 	CTS_TYPE_USER_SETTINGS
923 } cts_type;
924 
925 struct ccb_trans_settings_scsi
926 {
927 	u_int	valid;	/* Which fields to honor */
928 #define	CTS_SCSI_VALID_TQ		0x01
929 	u_int	flags;
930 #define	CTS_SCSI_FLAGS_TAG_ENB		0x01
931 };
932 
933 struct ccb_trans_settings_ata
934 {
935 	u_int	valid;	/* Which fields to honor */
936 #define	CTS_ATA_VALID_TQ		0x01
937 	u_int	flags;
938 #define	CTS_ATA_FLAGS_TAG_ENB		0x01
939 };
940 
941 struct ccb_trans_settings_spi
942 {
943 	u_int	  valid;	/* Which fields to honor */
944 #define	CTS_SPI_VALID_SYNC_RATE		0x01
945 #define	CTS_SPI_VALID_SYNC_OFFSET	0x02
946 #define	CTS_SPI_VALID_BUS_WIDTH		0x04
947 #define	CTS_SPI_VALID_DISC		0x08
948 #define CTS_SPI_VALID_PPR_OPTIONS	0x10
949 	u_int	flags;
950 #define	CTS_SPI_FLAGS_DISC_ENB		0x01
951 	u_int	sync_period;
952 	u_int	sync_offset;
953 	u_int	bus_width;
954 	u_int	ppr_options;
955 };
956 
957 struct ccb_trans_settings_fc {
958 	u_int     	valid;		/* Which fields to honor */
959 #define	CTS_FC_VALID_WWNN		0x8000
960 #define	CTS_FC_VALID_WWPN		0x4000
961 #define	CTS_FC_VALID_PORT		0x2000
962 #define	CTS_FC_VALID_SPEED		0x1000
963 	u_int64_t	wwnn;		/* world wide node name */
964 	u_int64_t 	wwpn;		/* world wide port name */
965 	u_int32_t 	port;		/* 24 bit port id, if known */
966 	u_int32_t 	bitrate;	/* Mbps */
967 };
968 
969 struct ccb_trans_settings_sas {
970 	u_int     	valid;		/* Which fields to honor */
971 #define	CTS_SAS_VALID_SPEED		0x1000
972 	u_int32_t 	bitrate;	/* Mbps */
973 };
974 
975 struct ccb_trans_settings_pata {
976 	u_int     	valid;		/* Which fields to honor */
977 #define	CTS_ATA_VALID_MODE		0x01
978 #define	CTS_ATA_VALID_BYTECOUNT		0x02
979 #define	CTS_ATA_VALID_ATAPI		0x20
980 #define	CTS_ATA_VALID_CAPS		0x40
981 	int		mode;		/* Mode */
982 	u_int 		bytecount;	/* Length of PIO transaction */
983 	u_int 		atapi;		/* Length of ATAPI CDB */
984 	u_int 		caps;		/* Device and host SATA caps. */
985 #define	CTS_ATA_CAPS_H			0x0000ffff
986 #define	CTS_ATA_CAPS_H_DMA48		0x00000001 /* 48-bit DMA */
987 #define	CTS_ATA_CAPS_D			0xffff0000
988 };
989 
990 struct ccb_trans_settings_sata {
991 	u_int     	valid;		/* Which fields to honor */
992 #define	CTS_SATA_VALID_MODE		0x01
993 #define	CTS_SATA_VALID_BYTECOUNT	0x02
994 #define	CTS_SATA_VALID_REVISION		0x04
995 #define	CTS_SATA_VALID_PM		0x08
996 #define	CTS_SATA_VALID_TAGS		0x10
997 #define	CTS_SATA_VALID_ATAPI		0x20
998 #define	CTS_SATA_VALID_CAPS		0x40
999 	int		mode;		/* Legacy PATA mode */
1000 	u_int 		bytecount;	/* Length of PIO transaction */
1001 	int		revision;	/* SATA revision */
1002 	u_int 		pm_present;	/* PM is present (XPT->SIM) */
1003 	u_int 		tags;		/* Number of allowed tags */
1004 	u_int 		atapi;		/* Length of ATAPI CDB */
1005 	u_int 		caps;		/* Device and host SATA caps. */
1006 #define	CTS_SATA_CAPS_H			0x0000ffff
1007 #define	CTS_SATA_CAPS_H_PMREQ		0x00000001
1008 #define	CTS_SATA_CAPS_H_APST		0x00000002
1009 #define	CTS_SATA_CAPS_H_DMAAA		0x00000010 /* Auto-activation */
1010 #define	CTS_SATA_CAPS_H_AN		0x00000020 /* Async. notification */
1011 #define	CTS_SATA_CAPS_D			0xffff0000
1012 #define	CTS_SATA_CAPS_D_PMREQ		0x00010000
1013 #define	CTS_SATA_CAPS_D_APST		0x00020000
1014 };
1015 
1016 struct ccb_trans_settings_nvme
1017 {
1018 	u_int     	valid;		/* Which fields to honor */
1019 #define CTS_NVME_VALID_SPEC	0x01
1020 #define CTS_NVME_VALID_CAPS	0x02
1021 #define CTS_NVME_VALID_LINK	0x04
1022 	uint32_t	spec;		/* NVMe spec implemented -- same as vs register */
1023 	uint32_t	max_xfer;	/* Max transfer size (0 -> unlimited */
1024 	uint32_t	caps;
1025 	uint8_t		lanes;		/* Number of PCIe lanes */
1026 	uint8_t		speed;		/* PCIe generation for each lane */
1027 	uint8_t		max_lanes;	/* Number of PCIe lanes */
1028 	uint8_t		max_speed;	/* PCIe generation for each lane */
1029 };
1030 
1031 #include <cam/mmc/mmc_bus.h>
1032 struct ccb_trans_settings_mmc {
1033 	struct mmc_ios ios;
1034 #define MMC_CLK		(1 << 1)
1035 #define MMC_VDD		(1 << 2)
1036 #define MMC_CS		(1 << 3)
1037 #define MMC_BW		(1 << 4)
1038 #define MMC_PM		(1 << 5)
1039 #define MMC_BT		(1 << 6)
1040 #define MMC_BM		(1 << 7)
1041 	uint32_t ios_valid;
1042 /* The folowing is used only for GET_TRAN_SETTINGS */
1043 	uint32_t	host_ocr;
1044 	int host_f_min;
1045 	int host_f_max;
1046 #define MMC_CAP_4_BIT_DATA	(1 << 0) /* Can do 4-bit data transfers */
1047 #define MMC_CAP_8_BIT_DATA	(1 << 1) /* Can do 8-bit data transfers */
1048 #define MMC_CAP_HSPEED		(1 << 2) /* Can do High Speed transfers */
1049 	uint32_t host_caps;
1050 };
1051 
1052 /* Get/Set transfer rate/width/disconnection/tag queueing settings */
1053 struct ccb_trans_settings {
1054 	struct	  ccb_hdr ccb_h;
1055 	cts_type  type;		/* Current or User settings */
1056 	cam_proto protocol;
1057 	u_int	  protocol_version;
1058 	cam_xport transport;
1059 	u_int	  transport_version;
1060 	union {
1061 		u_int  valid;	/* Which fields to honor */
1062 		struct ccb_trans_settings_ata ata;
1063 		struct ccb_trans_settings_scsi scsi;
1064 		struct ccb_trans_settings_nvme nvme;
1065 		struct ccb_trans_settings_mmc mmc;
1066 	} proto_specific;
1067 	union {
1068 		u_int  valid;	/* Which fields to honor */
1069 		struct ccb_trans_settings_spi spi;
1070 		struct ccb_trans_settings_fc fc;
1071 		struct ccb_trans_settings_sas sas;
1072 		struct ccb_trans_settings_pata ata;
1073 		struct ccb_trans_settings_sata sata;
1074 		struct ccb_trans_settings_nvme nvme;
1075 	} xport_specific;
1076 };
1077 
1078 
1079 /*
1080  * Calculate the geometry parameters for a device
1081  * give the block size and volume size in blocks.
1082  */
1083 struct ccb_calc_geometry {
1084 	struct	  ccb_hdr ccb_h;
1085 	u_int32_t block_size;
1086 	u_int64_t volume_size;
1087 	u_int32_t cylinders;
1088 	u_int8_t  heads;
1089 	u_int8_t  secs_per_track;
1090 };
1091 
1092 /*
1093  * Set or get SIM (and transport) specific knobs
1094  */
1095 
1096 #define	KNOB_VALID_ADDRESS	0x1
1097 #define	KNOB_VALID_ROLE		0x2
1098 
1099 
1100 #define	KNOB_ROLE_NONE		0x0
1101 #define	KNOB_ROLE_INITIATOR	0x1
1102 #define	KNOB_ROLE_TARGET	0x2
1103 #define	KNOB_ROLE_BOTH		0x3
1104 
1105 struct ccb_sim_knob_settings_spi {
1106 	u_int		valid;
1107 	u_int		initiator_id;
1108 	u_int		role;
1109 };
1110 
1111 struct ccb_sim_knob_settings_fc {
1112 	u_int		valid;
1113 	u_int64_t	wwnn;		/* world wide node name */
1114 	u_int64_t 	wwpn;		/* world wide port name */
1115 	u_int		role;
1116 };
1117 
1118 struct ccb_sim_knob_settings_sas {
1119 	u_int		valid;
1120 	u_int64_t	wwnn;		/* world wide node name */
1121 	u_int		role;
1122 };
1123 #define	KNOB_SETTINGS_SIZE	128
1124 
1125 struct ccb_sim_knob {
1126 	struct	  ccb_hdr ccb_h;
1127 	union {
1128 		u_int  valid;	/* Which fields to honor */
1129 		struct ccb_sim_knob_settings_spi spi;
1130 		struct ccb_sim_knob_settings_fc fc;
1131 		struct ccb_sim_knob_settings_sas sas;
1132 		char pad[KNOB_SETTINGS_SIZE];
1133 	} xport_specific;
1134 };
1135 
1136 /*
1137  * Rescan the given bus, or bus/target/lun
1138  */
1139 struct ccb_rescan {
1140 	struct	ccb_hdr ccb_h;
1141 	cam_flags	flags;
1142 };
1143 
1144 /*
1145  * Turn on debugging for the given bus, bus/target, or bus/target/lun.
1146  */
1147 struct ccb_debug {
1148 	struct	ccb_hdr ccb_h;
1149 	cam_debug_flags flags;
1150 };
1151 
1152 /* Target mode structures. */
1153 
1154 struct ccb_en_lun {
1155 	struct	  ccb_hdr ccb_h;
1156 	u_int16_t grp6_len;		/* Group 6 VU CDB length */
1157 	u_int16_t grp7_len;		/* Group 7 VU CDB length */
1158 	u_int8_t  enable;
1159 };
1160 
1161 /* old, barely used immediate notify, binary compatibility */
1162 struct ccb_immed_notify {
1163 	struct	  ccb_hdr ccb_h;
1164 	struct    scsi_sense_data sense_data;
1165 	u_int8_t  sense_len;		/* Number of bytes in sense buffer */
1166 	u_int8_t  initiator_id;		/* Id of initiator that selected */
1167 	u_int8_t  message_args[7];	/* Message Arguments */
1168 };
1169 
1170 struct ccb_notify_ack {
1171 	struct	  ccb_hdr ccb_h;
1172 	u_int16_t seq_id;		/* Sequence identifier */
1173 	u_int8_t  event;		/* Event flags */
1174 };
1175 
1176 struct ccb_immediate_notify {
1177 	struct    ccb_hdr ccb_h;
1178 	u_int     tag_id;		/* Tag for immediate notify */
1179 	u_int     seq_id;		/* Tag for target of notify */
1180 	u_int     initiator_id;		/* Initiator Identifier */
1181 	u_int     arg;			/* Function specific */
1182 };
1183 
1184 struct ccb_notify_acknowledge {
1185 	struct    ccb_hdr ccb_h;
1186 	u_int     tag_id;		/* Tag for immediate notify */
1187 	u_int     seq_id;		/* Tar for target of notify */
1188 	u_int     initiator_id;		/* Initiator Identifier */
1189 	u_int     arg;			/* Response information */
1190 	/*
1191 	 * Lower byte of arg is one of RESPONSE CODE values defined below
1192 	 * (subset of response codes from SPL-4 and FCP-4 specifications),
1193 	 * upper 3 bytes is code-specific ADDITIONAL RESPONSE INFORMATION.
1194 	 */
1195 #define	CAM_RSP_TMF_COMPLETE		0x00
1196 #define	CAM_RSP_TMF_REJECTED		0x04
1197 #define	CAM_RSP_TMF_FAILED		0x05
1198 #define	CAM_RSP_TMF_SUCCEEDED		0x08
1199 #define	CAM_RSP_TMF_INCORRECT_LUN	0x09
1200 };
1201 
1202 /* HBA engine structures. */
1203 
1204 typedef enum {
1205 	EIT_BUFFER,	/* Engine type: buffer memory */
1206 	EIT_LOSSLESS,	/* Engine type: lossless compression */
1207 	EIT_LOSSY,	/* Engine type: lossy compression */
1208 	EIT_ENCRYPT	/* Engine type: encryption */
1209 } ei_type;
1210 
1211 typedef enum {
1212 	EAD_VUNIQUE,	/* Engine algorithm ID: vendor unique */
1213 	EAD_LZ1V1,	/* Engine algorithm ID: LZ1 var.1 */
1214 	EAD_LZ2V1,	/* Engine algorithm ID: LZ2 var.1 */
1215 	EAD_LZ2V2	/* Engine algorithm ID: LZ2 var.2 */
1216 } ei_algo;
1217 
1218 struct ccb_eng_inq {
1219 	struct	  ccb_hdr ccb_h;
1220 	u_int16_t eng_num;	/* The engine number for this inquiry */
1221 	ei_type   eng_type;	/* Returned engine type */
1222 	ei_algo   eng_algo;	/* Returned engine algorithm type */
1223 	u_int32_t eng_memeory;	/* Returned engine memory size */
1224 };
1225 
1226 struct ccb_eng_exec {	/* This structure must match SCSIIO size */
1227 	struct	  ccb_hdr ccb_h;
1228 	u_int8_t  *pdrv_ptr;	/* Ptr used by the peripheral driver */
1229 	u_int8_t  *req_map;	/* Ptr for mapping info on the req. */
1230 	u_int8_t  *data_ptr;	/* Pointer to the data buf/SG list */
1231 	u_int32_t dxfer_len;	/* Data transfer length */
1232 	u_int8_t  *engdata_ptr;	/* Pointer to the engine buffer data */
1233 	u_int16_t sglist_cnt;	/* Num of scatter gather list entries */
1234 	u_int32_t dmax_len;	/* Destination data maximum length */
1235 	u_int32_t dest_len;	/* Destination data length */
1236 	int32_t	  src_resid;	/* Source residual length: 2's comp */
1237 	u_int32_t timeout;	/* Timeout value */
1238 	u_int16_t eng_num;	/* Engine number for this request */
1239 	u_int16_t vu_flags;	/* Vendor Unique flags */
1240 };
1241 
1242 /*
1243  * Definitions for the timeout field in the SCSI I/O CCB.
1244  */
1245 #define	CAM_TIME_DEFAULT	0x00000000	/* Use SIM default value */
1246 #define	CAM_TIME_INFINITY	0xFFFFFFFF	/* Infinite timeout */
1247 
1248 #define	CAM_SUCCESS	0	/* For signaling general success */
1249 #define	CAM_FAILURE	1	/* For signaling general failure */
1250 
1251 #define CAM_FALSE	0
1252 #define CAM_TRUE	1
1253 
1254 #define XPT_CCB_INVALID	-1	/* for signaling a bad CCB to free */
1255 
1256 /*
1257  * CCB for working with advanced device information.  This operates in a fashion
1258  * similar to XPT_GDEV_TYPE.  Specify the target in ccb_h, the buffer
1259  * type requested, and provide a buffer size/buffer to write to.  If the
1260  * buffer is too small, provsiz will be larger than bufsiz.
1261  */
1262 struct ccb_dev_advinfo {
1263 	struct ccb_hdr ccb_h;
1264 	uint32_t flags;
1265 #define	CDAI_FLAG_NONE		0x0	/* No flags set */
1266 #define	CDAI_FLAG_STORE		0x1	/* If set, action becomes store */
1267 	uint32_t buftype;		/* IN: Type of data being requested */
1268 	/* NB: buftype is interpreted on a per-transport basis */
1269 #define	CDAI_TYPE_SCSI_DEVID	1
1270 #define	CDAI_TYPE_SERIAL_NUM	2
1271 #define	CDAI_TYPE_PHYS_PATH	3
1272 #define	CDAI_TYPE_RCAPLONG	4
1273 #define	CDAI_TYPE_EXT_INQ	5
1274 #define	CDAI_TYPE_NVME_CNTRL	6	/* NVMe Identify Controller data */
1275 #define	CDAI_TYPE_NVME_NS	7	/* NVMe Identify Namespace data */
1276 	off_t bufsiz;			/* IN: Size of external buffer */
1277 #define	CAM_SCSI_DEVID_MAXLEN	65536	/* length in buffer is an uint16_t */
1278 	off_t provsiz;			/* OUT: Size required/used */
1279 	uint8_t *buf;			/* IN/OUT: Buffer for requested data */
1280 };
1281 
1282 /*
1283  * CCB for sending async events
1284  */
1285 struct ccb_async {
1286 	struct ccb_hdr ccb_h;
1287 	uint32_t async_code;
1288 	off_t async_arg_size;
1289 	void *async_arg_ptr;
1290 };
1291 
1292 /*
1293  * Union of all CCB types for kernel space allocation.  This union should
1294  * never be used for manipulating CCBs - its only use is for the allocation
1295  * and deallocation of raw CCB space and is the return type of xpt_ccb_alloc
1296  * and the argument to xpt_ccb_free.
1297  */
1298 union ccb {
1299 	struct	ccb_hdr			ccb_h;	/* For convenience */
1300 	struct	ccb_scsiio		csio;
1301 	struct	ccb_getdev		cgd;
1302 	struct	ccb_getdevlist		cgdl;
1303 	struct	ccb_pathinq		cpi;
1304 	struct	ccb_relsim		crs;
1305 	struct	ccb_setasync		csa;
1306 	struct	ccb_setdev		csd;
1307 	struct	ccb_pathstats		cpis;
1308 	struct	ccb_getdevstats		cgds;
1309 	struct	ccb_dev_match		cdm;
1310 	struct	ccb_trans_settings	cts;
1311 	struct	ccb_calc_geometry	ccg;
1312 	struct	ccb_sim_knob		knob;
1313 	struct	ccb_abort		cab;
1314 	struct	ccb_resetbus		crb;
1315 	struct	ccb_resetdev		crd;
1316 	struct	ccb_termio		tio;
1317 	struct	ccb_accept_tio		atio;
1318 	struct	ccb_scsiio		ctio;
1319 	struct	ccb_en_lun		cel;
1320 	struct	ccb_immed_notify	cin;
1321 	struct	ccb_notify_ack		cna;
1322 	struct	ccb_immediate_notify	cin1;
1323 	struct	ccb_notify_acknowledge	cna2;
1324 	struct	ccb_eng_inq		cei;
1325 	struct	ccb_eng_exec		cee;
1326 	struct	ccb_smpio		smpio;
1327 	struct 	ccb_rescan		crcn;
1328 	struct  ccb_debug		cdbg;
1329 	struct	ccb_ataio		ataio;
1330 	struct	ccb_dev_advinfo		cdai;
1331 	struct	ccb_async		casync;
1332 	struct	ccb_nvmeio		nvmeio;
1333 	struct	ccb_mmcio		mmcio;
1334 };
1335 
1336 #define CCB_CLEAR_ALL_EXCEPT_HDR(ccbp)			\
1337 	bzero((char *)(ccbp) + sizeof((ccbp)->ccb_h),	\
1338 	    sizeof(*(ccbp)) - sizeof((ccbp)->ccb_h))
1339 
1340 __BEGIN_DECLS
1341 static __inline void
1342 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries,
1343 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1344 	      u_int32_t flags, u_int8_t tag_action,
1345 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1346 	      u_int8_t sense_len, u_int8_t cdb_len,
1347 	      u_int32_t timeout);
1348 
1349 static __inline void
1350 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1351 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1352 	      u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1353 	      u_int32_t timeout);
1354 
1355 static __inline void
1356 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries,
1357 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1358 	      u_int32_t flags, u_int tag_action, u_int tag_id,
1359 	      u_int init_id, u_int scsi_status, u_int8_t *data_ptr,
1360 	      u_int32_t dxfer_len, u_int32_t timeout);
1361 
1362 static __inline void
1363 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries,
1364 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1365 	      u_int32_t flags, u_int tag_action,
1366 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1367 	      u_int32_t timeout);
1368 
1369 static __inline void
1370 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries,
1371 	       void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1372 	       uint8_t *smp_request, int smp_request_len,
1373 	       uint8_t *smp_response, int smp_response_len,
1374 	       uint32_t timeout);
1375 
1376 static __inline void
1377 cam_fill_mmcio(struct ccb_mmcio *mmcio, uint32_t retries,
1378 	       void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1379                uint32_t mmc_opcode, uint32_t mmc_arg, uint32_t mmc_flags,
1380 	       struct mmc_data *mmc_d,
1381 	       uint32_t timeout);
1382 
1383 static __inline void
1384 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries,
1385 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1386 	      u_int32_t flags, u_int8_t tag_action,
1387 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1388 	      u_int8_t sense_len, u_int8_t cdb_len,
1389 	      u_int32_t timeout)
1390 {
1391 	csio->ccb_h.func_code = XPT_SCSI_IO;
1392 	csio->ccb_h.flags = flags;
1393 	csio->ccb_h.xflags = 0;
1394 	csio->ccb_h.retry_count = retries;
1395 	csio->ccb_h.cbfcnp = cbfcnp;
1396 	csio->ccb_h.timeout = timeout;
1397 	csio->data_ptr = data_ptr;
1398 	csio->dxfer_len = dxfer_len;
1399 	csio->sense_len = sense_len;
1400 	csio->cdb_len = cdb_len;
1401 	csio->tag_action = tag_action;
1402 #if defined(BUF_TRACKING) || defined(FULL_BUF_TRACKING)
1403 	csio->bio = NULL;
1404 #endif
1405 }
1406 
1407 static __inline void
1408 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries,
1409 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1410 	      u_int32_t flags, u_int tag_action, u_int tag_id,
1411 	      u_int init_id, u_int scsi_status, u_int8_t *data_ptr,
1412 	      u_int32_t dxfer_len, u_int32_t timeout)
1413 {
1414 	csio->ccb_h.func_code = XPT_CONT_TARGET_IO;
1415 	csio->ccb_h.flags = flags;
1416 	csio->ccb_h.xflags = 0;
1417 	csio->ccb_h.retry_count = retries;
1418 	csio->ccb_h.cbfcnp = cbfcnp;
1419 	csio->ccb_h.timeout = timeout;
1420 	csio->data_ptr = data_ptr;
1421 	csio->dxfer_len = dxfer_len;
1422 	csio->scsi_status = scsi_status;
1423 	csio->tag_action = tag_action;
1424 	csio->tag_id = tag_id;
1425 	csio->init_id = init_id;
1426 }
1427 
1428 static __inline void
1429 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries,
1430 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1431 	      u_int32_t flags, u_int tag_action __unused,
1432 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1433 	      u_int32_t timeout)
1434 {
1435 	ataio->ccb_h.func_code = XPT_ATA_IO;
1436 	ataio->ccb_h.flags = flags;
1437 	ataio->ccb_h.retry_count = retries;
1438 	ataio->ccb_h.cbfcnp = cbfcnp;
1439 	ataio->ccb_h.timeout = timeout;
1440 	ataio->data_ptr = data_ptr;
1441 	ataio->dxfer_len = dxfer_len;
1442 	ataio->ata_flags = 0;
1443 }
1444 
1445 static __inline void
1446 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries,
1447 	       void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1448 	       uint8_t *smp_request, int smp_request_len,
1449 	       uint8_t *smp_response, int smp_response_len,
1450 	       uint32_t timeout)
1451 {
1452 #ifdef _KERNEL
1453 	KASSERT((flags & CAM_DIR_MASK) == CAM_DIR_BOTH,
1454 		("direction != CAM_DIR_BOTH"));
1455 	KASSERT((smp_request != NULL) && (smp_response != NULL),
1456 		("need valid request and response buffers"));
1457 	KASSERT((smp_request_len != 0) && (smp_response_len != 0),
1458 		("need non-zero request and response lengths"));
1459 #endif /*_KERNEL*/
1460 	smpio->ccb_h.func_code = XPT_SMP_IO;
1461 	smpio->ccb_h.flags = flags;
1462 	smpio->ccb_h.retry_count = retries;
1463 	smpio->ccb_h.cbfcnp = cbfcnp;
1464 	smpio->ccb_h.timeout = timeout;
1465 	smpio->smp_request = smp_request;
1466 	smpio->smp_request_len = smp_request_len;
1467 	smpio->smp_response = smp_response;
1468 	smpio->smp_response_len = smp_response_len;
1469 }
1470 
1471 static __inline void
1472 cam_fill_mmcio(struct ccb_mmcio *mmcio, uint32_t retries,
1473 	       void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1474 	       uint32_t mmc_opcode, uint32_t mmc_arg, uint32_t mmc_flags,
1475 	       struct mmc_data *mmc_d,
1476 	       uint32_t timeout)
1477 {
1478 	mmcio->ccb_h.func_code = XPT_MMC_IO;
1479 	mmcio->ccb_h.flags = flags;
1480 	mmcio->ccb_h.retry_count = retries;
1481 	mmcio->ccb_h.cbfcnp = cbfcnp;
1482 	mmcio->ccb_h.timeout = timeout;
1483 	mmcio->cmd.opcode = mmc_opcode;
1484 	mmcio->cmd.arg = mmc_arg;
1485 	mmcio->cmd.flags = mmc_flags;
1486 	mmcio->stop.opcode = 0;
1487 	mmcio->stop.arg = 0;
1488 	mmcio->stop.flags = 0;
1489 	if (mmc_d != NULL) {
1490 		mmcio->cmd.data = mmc_d;
1491 	} else
1492 		mmcio->cmd.data = NULL;
1493 	mmcio->cmd.resp[0] = 0;
1494 	mmcio->cmd.resp[1] = 0;
1495 	mmcio->cmd.resp[2] = 0;
1496 	mmcio->cmd.resp[3] = 0;
1497 }
1498 
1499 static __inline void
1500 cam_set_ccbstatus(union ccb *ccb, cam_status status)
1501 {
1502 	ccb->ccb_h.status &= ~CAM_STATUS_MASK;
1503 	ccb->ccb_h.status |= status;
1504 }
1505 
1506 static __inline cam_status
1507 cam_ccb_status(union ccb *ccb)
1508 {
1509 	return ((cam_status)(ccb->ccb_h.status & CAM_STATUS_MASK));
1510 }
1511 
1512 void cam_calc_geometry(struct ccb_calc_geometry *ccg, int extended);
1513 
1514 static __inline void
1515 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1516 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1517 	      u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1518 	      u_int32_t timeout)
1519 {
1520 	nvmeio->ccb_h.func_code = XPT_NVME_IO;
1521 	nvmeio->ccb_h.flags = flags;
1522 	nvmeio->ccb_h.retry_count = retries;
1523 	nvmeio->ccb_h.cbfcnp = cbfcnp;
1524 	nvmeio->ccb_h.timeout = timeout;
1525 	nvmeio->data_ptr = data_ptr;
1526 	nvmeio->dxfer_len = dxfer_len;
1527 }
1528 
1529 static __inline void
1530 cam_fill_nvmeadmin(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1531 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1532 	      u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1533 	      u_int32_t timeout)
1534 {
1535 	nvmeio->ccb_h.func_code = XPT_NVME_ADMIN;
1536 	nvmeio->ccb_h.flags = flags;
1537 	nvmeio->ccb_h.retry_count = retries;
1538 	nvmeio->ccb_h.cbfcnp = cbfcnp;
1539 	nvmeio->ccb_h.timeout = timeout;
1540 	nvmeio->data_ptr = data_ptr;
1541 	nvmeio->dxfer_len = dxfer_len;
1542 }
1543 __END_DECLS
1544 
1545 #endif /* _CAM_CAM_CCB_H */
1546