1 /*- 2 * Data structures and definitions for CAM Control Blocks (CCBs). 3 * 4 * Copyright (c) 1997, 1998 Justin T. Gibbs. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _CAM_CAM_CCB_H 32 #define _CAM_CAM_CCB_H 1 33 34 #include <sys/queue.h> 35 #include <sys/cdefs.h> 36 #include <sys/time.h> 37 #include <sys/limits.h> 38 #ifndef _KERNEL 39 #include <sys/callout.h> 40 #endif 41 #include <cam/cam_debug.h> 42 #include <cam/scsi/scsi_all.h> 43 #include <cam/ata/ata_all.h> 44 #include <cam/nvme/nvme_all.h> 45 #include <cam/mmc/mmc_all.h> 46 47 /* General allocation length definitions for CCB structures */ 48 #define IOCDBLEN CAM_MAX_CDBLEN /* Space for CDB bytes/pointer */ 49 #define VUHBALEN 14 /* Vendor Unique HBA length */ 50 #define SIM_IDLEN 16 /* ASCII string len for SIM ID */ 51 #define HBA_IDLEN 16 /* ASCII string len for HBA ID */ 52 #define DEV_IDLEN 16 /* ASCII string len for device names */ 53 #define CCB_PERIPH_PRIV_SIZE 2 /* size of peripheral private area */ 54 #define CCB_SIM_PRIV_SIZE 2 /* size of sim private area */ 55 56 /* Struct definitions for CAM control blocks */ 57 58 /* Common CCB header */ 59 /* CAM CCB flags */ 60 typedef enum { 61 CAM_CDB_POINTER = 0x00000001,/* The CDB field is a pointer */ 62 CAM_QUEUE_ENABLE = 0x00000002,/* SIM queue actions are enabled */ 63 CAM_CDB_LINKED = 0x00000004,/* CCB contains a linked CDB */ 64 CAM_NEGOTIATE = 0x00000008,/* 65 * Perform transport negotiation 66 * with this command. 67 */ 68 CAM_DATA_ISPHYS = 0x00000010,/* Data type with physical addrs */ 69 CAM_DIS_AUTOSENSE = 0x00000020,/* Disable autosense feature */ 70 CAM_DIR_BOTH = 0x00000000,/* Data direction (00:IN/OUT) */ 71 CAM_DIR_IN = 0x00000040,/* Data direction (01:DATA IN) */ 72 CAM_DIR_OUT = 0x00000080,/* Data direction (10:DATA OUT) */ 73 CAM_DIR_NONE = 0x000000C0,/* Data direction (11:no data) */ 74 CAM_DIR_MASK = 0x000000C0,/* Data direction Mask */ 75 CAM_DATA_VADDR = 0x00000000,/* Data type (000:Virtual) */ 76 CAM_DATA_PADDR = 0x00000010,/* Data type (001:Physical) */ 77 CAM_DATA_SG = 0x00040000,/* Data type (010:sglist) */ 78 CAM_DATA_SG_PADDR = 0x00040010,/* Data type (011:sglist phys) */ 79 CAM_DATA_BIO = 0x00200000,/* Data type (100:bio) */ 80 CAM_DATA_MASK = 0x00240010,/* Data type mask */ 81 CAM_SOFT_RST_OP = 0x00000100,/* Use Soft reset alternative */ 82 CAM_ENG_SYNC = 0x00000200,/* Flush resid bytes on complete */ 83 CAM_DEV_QFRZDIS = 0x00000400,/* Disable DEV Q freezing */ 84 CAM_DEV_QFREEZE = 0x00000800,/* Freeze DEV Q on execution */ 85 CAM_HIGH_POWER = 0x00001000,/* Command takes a lot of power */ 86 CAM_SENSE_PTR = 0x00002000,/* Sense data is a pointer */ 87 CAM_SENSE_PHYS = 0x00004000,/* Sense pointer is physical addr*/ 88 CAM_TAG_ACTION_VALID = 0x00008000,/* Use the tag action in this ccb*/ 89 CAM_PASS_ERR_RECOVER = 0x00010000,/* Pass driver does err. recovery*/ 90 CAM_DIS_DISCONNECT = 0x00020000,/* Disable disconnect */ 91 CAM_MSG_BUF_PHYS = 0x00080000,/* Message buffer ptr is physical*/ 92 CAM_SNS_BUF_PHYS = 0x00100000,/* Autosense data ptr is physical*/ 93 CAM_CDB_PHYS = 0x00400000,/* CDB poiner is physical */ 94 CAM_ENG_SGLIST = 0x00800000,/* SG list is for the HBA engine */ 95 96 /* Phase cognizant mode flags */ 97 CAM_DIS_AUTOSRP = 0x01000000,/* Disable autosave/restore ptrs */ 98 CAM_DIS_AUTODISC = 0x02000000,/* Disable auto disconnect */ 99 CAM_TGT_CCB_AVAIL = 0x04000000,/* Target CCB available */ 100 CAM_TGT_PHASE_MODE = 0x08000000,/* The SIM runs in phase mode */ 101 CAM_MSGB_VALID = 0x10000000,/* Message buffer valid */ 102 CAM_STATUS_VALID = 0x20000000,/* Status buffer valid */ 103 CAM_DATAB_VALID = 0x40000000,/* Data buffer valid */ 104 105 /* Host target Mode flags */ 106 CAM_SEND_SENSE = 0x08000000,/* Send sense data with status */ 107 CAM_TERM_IO = 0x10000000,/* Terminate I/O Message sup. */ 108 CAM_DISCONNECT = 0x20000000,/* Disconnects are mandatory */ 109 CAM_SEND_STATUS = 0x40000000,/* Send status after data phase */ 110 111 CAM_UNLOCKED = 0x80000000 /* Call callback without lock. */ 112 } ccb_flags; 113 114 typedef enum { 115 CAM_USER_DATA_ADDR = 0x00000002,/* Userspace data pointers */ 116 CAM_SG_FORMAT_IOVEC = 0x00000004,/* iovec instead of busdma S/G*/ 117 CAM_UNMAPPED_BUF = 0x00000008 /* use unmapped I/O */ 118 } ccb_xflags; 119 120 /* XPT Opcodes for xpt_action */ 121 typedef enum { 122 /* Function code flags are bits greater than 0xff */ 123 XPT_FC_QUEUED = 0x100, 124 /* Non-immediate function code */ 125 XPT_FC_USER_CCB = 0x200, 126 XPT_FC_XPT_ONLY = 0x400, 127 /* Only for the transport layer device */ 128 XPT_FC_DEV_QUEUED = 0x800 | XPT_FC_QUEUED, 129 /* Passes through the device queues */ 130 /* Common function commands: 0x00->0x0F */ 131 XPT_NOOP = 0x00, 132 /* Execute Nothing */ 133 XPT_SCSI_IO = 0x01 | XPT_FC_DEV_QUEUED, 134 /* Execute the requested I/O operation */ 135 XPT_GDEV_TYPE = 0x02, 136 /* Get type information for specified device */ 137 XPT_GDEVLIST = 0x03, 138 /* Get a list of peripheral devices */ 139 XPT_PATH_INQ = 0x04, 140 /* Path routing inquiry */ 141 XPT_REL_SIMQ = 0x05, 142 /* Release a frozen device queue */ 143 XPT_SASYNC_CB = 0x06, 144 /* Set Asynchronous Callback Parameters */ 145 XPT_SDEV_TYPE = 0x07, 146 /* Set device type information */ 147 XPT_SCAN_BUS = 0x08 | XPT_FC_QUEUED | XPT_FC_USER_CCB 148 | XPT_FC_XPT_ONLY, 149 /* (Re)Scan the SCSI Bus */ 150 XPT_DEV_MATCH = 0x09 | XPT_FC_XPT_ONLY, 151 /* Get EDT entries matching the given pattern */ 152 XPT_DEBUG = 0x0a, 153 /* Turn on debugging for a bus, target or lun */ 154 XPT_PATH_STATS = 0x0b, 155 /* Path statistics (error counts, etc.) */ 156 XPT_GDEV_STATS = 0x0c, 157 /* Device statistics (error counts, etc.) */ 158 XPT_DEV_ADVINFO = 0x0e, 159 /* Get/Set Device advanced information */ 160 XPT_ASYNC = 0x0f | XPT_FC_QUEUED | XPT_FC_USER_CCB 161 | XPT_FC_XPT_ONLY, 162 /* Asynchronous event */ 163 /* SCSI Control Functions: 0x10->0x1F */ 164 XPT_ABORT = 0x10, 165 /* Abort the specified CCB */ 166 XPT_RESET_BUS = 0x11 | XPT_FC_XPT_ONLY, 167 /* Reset the specified SCSI bus */ 168 XPT_RESET_DEV = 0x12 | XPT_FC_DEV_QUEUED, 169 /* Bus Device Reset the specified SCSI device */ 170 XPT_TERM_IO = 0x13, 171 /* Terminate the I/O process */ 172 XPT_SCAN_LUN = 0x14 | XPT_FC_QUEUED | XPT_FC_USER_CCB 173 | XPT_FC_XPT_ONLY, 174 /* Scan Logical Unit */ 175 XPT_GET_TRAN_SETTINGS = 0x15, 176 /* 177 * Get default/user transfer settings 178 * for the target 179 */ 180 XPT_SET_TRAN_SETTINGS = 0x16, 181 /* 182 * Set transfer rate/width 183 * negotiation settings 184 */ 185 XPT_CALC_GEOMETRY = 0x17, 186 /* 187 * Calculate the geometry parameters for 188 * a device give the sector size and 189 * volume size. 190 */ 191 XPT_ATA_IO = 0x18 | XPT_FC_DEV_QUEUED, 192 /* Execute the requested ATA I/O operation */ 193 194 XPT_GET_SIM_KNOB_OLD = 0x18, /* Compat only */ 195 196 XPT_SET_SIM_KNOB = 0x19, 197 /* 198 * Set SIM specific knob values. 199 */ 200 201 XPT_GET_SIM_KNOB = 0x1a, 202 /* 203 * Get SIM specific knob values. 204 */ 205 206 XPT_SMP_IO = 0x1b | XPT_FC_DEV_QUEUED, 207 /* Serial Management Protocol */ 208 209 XPT_NVME_IO = 0x1c | XPT_FC_DEV_QUEUED, 210 /* Execute the requested NVMe I/O operation */ 211 212 XPT_MMC_IO = 0x1d | XPT_FC_DEV_QUEUED, 213 /* Placeholder for MMC / SD / SDIO I/O stuff */ 214 215 XPT_SCAN_TGT = 0x1e | XPT_FC_QUEUED | XPT_FC_USER_CCB 216 | XPT_FC_XPT_ONLY, 217 /* Scan Target */ 218 219 XPT_NVME_ADMIN = 0x1f | XPT_FC_DEV_QUEUED, 220 /* Execute the requested NVMe Admin operation */ 221 222 /* HBA engine commands 0x20->0x2F */ 223 XPT_ENG_INQ = 0x20 | XPT_FC_XPT_ONLY, 224 /* HBA engine feature inquiry */ 225 XPT_ENG_EXEC = 0x21 | XPT_FC_DEV_QUEUED, 226 /* HBA execute engine request */ 227 228 /* Target mode commands: 0x30->0x3F */ 229 XPT_EN_LUN = 0x30, 230 /* Enable LUN as a target */ 231 XPT_TARGET_IO = 0x31 | XPT_FC_DEV_QUEUED, 232 /* Execute target I/O request */ 233 XPT_ACCEPT_TARGET_IO = 0x32 | XPT_FC_QUEUED | XPT_FC_USER_CCB, 234 /* Accept Host Target Mode CDB */ 235 XPT_CONT_TARGET_IO = 0x33 | XPT_FC_DEV_QUEUED, 236 /* Continue Host Target I/O Connection */ 237 XPT_IMMED_NOTIFY = 0x34 | XPT_FC_QUEUED | XPT_FC_USER_CCB, 238 /* Notify Host Target driver of event (obsolete) */ 239 XPT_NOTIFY_ACK = 0x35, 240 /* Acknowledgement of event (obsolete) */ 241 XPT_IMMEDIATE_NOTIFY = 0x36 | XPT_FC_QUEUED | XPT_FC_USER_CCB, 242 /* Notify Host Target driver of event */ 243 XPT_NOTIFY_ACKNOWLEDGE = 0x37 | XPT_FC_QUEUED | XPT_FC_USER_CCB, 244 /* Acknowledgement of event */ 245 XPT_REPROBE_LUN = 0x38 | XPT_FC_QUEUED | XPT_FC_USER_CCB, 246 /* Query device capacity and notify GEOM */ 247 248 /* Vendor Unique codes: 0x80->0x8F */ 249 XPT_VUNIQUE = 0x80 250 } xpt_opcode; 251 252 #define XPT_FC_GROUP_MASK 0xF0 253 #define XPT_FC_GROUP(op) ((op) & XPT_FC_GROUP_MASK) 254 #define XPT_FC_GROUP_COMMON 0x00 255 #define XPT_FC_GROUP_SCSI_CONTROL 0x10 256 #define XPT_FC_GROUP_HBA_ENGINE 0x20 257 #define XPT_FC_GROUP_TMODE 0x30 258 #define XPT_FC_GROUP_VENDOR_UNIQUE 0x80 259 260 #define XPT_FC_IS_DEV_QUEUED(ccb) \ 261 (((ccb)->ccb_h.func_code & XPT_FC_DEV_QUEUED) == XPT_FC_DEV_QUEUED) 262 #define XPT_FC_IS_QUEUED(ccb) \ 263 (((ccb)->ccb_h.func_code & XPT_FC_QUEUED) != 0) 264 265 typedef enum { 266 PROTO_UNKNOWN, 267 PROTO_UNSPECIFIED, 268 PROTO_SCSI, /* Small Computer System Interface */ 269 PROTO_ATA, /* AT Attachment */ 270 PROTO_ATAPI, /* AT Attachment Packetized Interface */ 271 PROTO_SATAPM, /* SATA Port Multiplier */ 272 PROTO_SEMB, /* SATA Enclosure Management Bridge */ 273 PROTO_NVME, /* NVME */ 274 PROTO_MMCSD, /* MMC, SD, SDIO */ 275 } cam_proto; 276 277 typedef enum { 278 XPORT_UNKNOWN, 279 XPORT_UNSPECIFIED, 280 XPORT_SPI, /* SCSI Parallel Interface */ 281 XPORT_FC, /* Fiber Channel */ 282 XPORT_SSA, /* Serial Storage Architecture */ 283 XPORT_USB, /* Universal Serial Bus */ 284 XPORT_PPB, /* Parallel Port Bus */ 285 XPORT_ATA, /* AT Attachment */ 286 XPORT_SAS, /* Serial Attached SCSI */ 287 XPORT_SATA, /* Serial AT Attachment */ 288 XPORT_ISCSI, /* iSCSI */ 289 XPORT_SRP, /* SCSI RDMA Protocol */ 290 XPORT_NVME, /* NVMe over PCIe */ 291 XPORT_MMCSD, /* MMC, SD, SDIO card */ 292 } cam_xport; 293 294 #define XPORT_IS_NVME(t) ((t) == XPORT_NVME) 295 #define XPORT_IS_ATA(t) ((t) == XPORT_ATA || (t) == XPORT_SATA) 296 #define XPORT_IS_SCSI(t) ((t) != XPORT_UNKNOWN && \ 297 (t) != XPORT_UNSPECIFIED && \ 298 !XPORT_IS_ATA(t) && !XPORT_IS_NVME(t)) 299 #define XPORT_DEVSTAT_TYPE(t) (XPORT_IS_ATA(t) ? DEVSTAT_TYPE_IF_IDE : \ 300 XPORT_IS_SCSI(t) ? DEVSTAT_TYPE_IF_SCSI : \ 301 DEVSTAT_TYPE_IF_OTHER) 302 303 #define PROTO_VERSION_UNKNOWN (UINT_MAX - 1) 304 #define PROTO_VERSION_UNSPECIFIED UINT_MAX 305 #define XPORT_VERSION_UNKNOWN (UINT_MAX - 1) 306 #define XPORT_VERSION_UNSPECIFIED UINT_MAX 307 308 typedef union { 309 LIST_ENTRY(ccb_hdr) le; 310 SLIST_ENTRY(ccb_hdr) sle; 311 TAILQ_ENTRY(ccb_hdr) tqe; 312 STAILQ_ENTRY(ccb_hdr) stqe; 313 } camq_entry; 314 315 typedef union { 316 void *ptr; 317 u_long field; 318 u_int8_t bytes[sizeof(uintptr_t)]; 319 } ccb_priv_entry; 320 321 typedef union { 322 ccb_priv_entry entries[CCB_PERIPH_PRIV_SIZE]; 323 u_int8_t bytes[CCB_PERIPH_PRIV_SIZE * sizeof(ccb_priv_entry)]; 324 } ccb_ppriv_area; 325 326 typedef union { 327 ccb_priv_entry entries[CCB_SIM_PRIV_SIZE]; 328 u_int8_t bytes[CCB_SIM_PRIV_SIZE * sizeof(ccb_priv_entry)]; 329 } ccb_spriv_area; 330 331 typedef struct { 332 struct timeval *etime; 333 uintptr_t sim_data; 334 uintptr_t periph_data; 335 } ccb_qos_area; 336 337 struct ccb_hdr { 338 cam_pinfo pinfo; /* Info for priority scheduling */ 339 camq_entry xpt_links; /* For chaining in the XPT layer */ 340 camq_entry sim_links; /* For chaining in the SIM layer */ 341 camq_entry periph_links; /* For chaining in the type driver */ 342 u_int32_t retry_count; 343 void (*cbfcnp)(struct cam_periph *, union ccb *); 344 /* Callback on completion function */ 345 xpt_opcode func_code; /* XPT function code */ 346 u_int32_t status; /* Status returned by CAM subsystem */ 347 struct cam_path *path; /* Compiled path for this ccb */ 348 path_id_t path_id; /* Path ID for the request */ 349 target_id_t target_id; /* Target device ID */ 350 lun_id_t target_lun; /* Target LUN number */ 351 u_int32_t flags; /* ccb_flags */ 352 u_int32_t xflags; /* Extended flags */ 353 ccb_ppriv_area periph_priv; 354 ccb_spriv_area sim_priv; 355 ccb_qos_area qos; 356 u_int32_t timeout; /* Hard timeout value in mseconds */ 357 struct timeval softtimeout; /* Soft timeout value in sec + usec */ 358 }; 359 360 /* Get Device Information CCB */ 361 struct ccb_getdev { 362 struct ccb_hdr ccb_h; 363 cam_proto protocol; 364 struct scsi_inquiry_data inq_data; 365 struct ata_params ident_data; 366 u_int8_t serial_num[252]; 367 u_int8_t inq_flags; 368 u_int8_t serial_num_len; 369 const struct nvme_controller_data *nvme_cdata; 370 const struct nvme_namespace_data *nvme_data; 371 }; 372 373 /* Device Statistics CCB */ 374 struct ccb_getdevstats { 375 struct ccb_hdr ccb_h; 376 int dev_openings; /* Space left for more work on device*/ 377 int dev_active; /* Transactions running on the device */ 378 int allocated; /* CCBs allocated for the device */ 379 int queued; /* CCBs queued to be sent to the device */ 380 int held; /* 381 * CCBs held by peripheral drivers 382 * for this device 383 */ 384 int maxtags; /* 385 * Boundary conditions for number of 386 * tagged operations 387 */ 388 int mintags; 389 struct timeval last_reset; /* Time of last bus reset/loop init */ 390 }; 391 392 typedef enum { 393 CAM_GDEVLIST_LAST_DEVICE, 394 CAM_GDEVLIST_LIST_CHANGED, 395 CAM_GDEVLIST_MORE_DEVS, 396 CAM_GDEVLIST_ERROR 397 } ccb_getdevlist_status_e; 398 399 struct ccb_getdevlist { 400 struct ccb_hdr ccb_h; 401 char periph_name[DEV_IDLEN]; 402 u_int32_t unit_number; 403 unsigned int generation; 404 u_int32_t index; 405 ccb_getdevlist_status_e status; 406 }; 407 408 typedef enum { 409 PERIPH_MATCH_NONE = 0x000, 410 PERIPH_MATCH_PATH = 0x001, 411 PERIPH_MATCH_TARGET = 0x002, 412 PERIPH_MATCH_LUN = 0x004, 413 PERIPH_MATCH_NAME = 0x008, 414 PERIPH_MATCH_UNIT = 0x010, 415 PERIPH_MATCH_ANY = 0x01f 416 } periph_pattern_flags; 417 418 struct periph_match_pattern { 419 char periph_name[DEV_IDLEN]; 420 u_int32_t unit_number; 421 path_id_t path_id; 422 target_id_t target_id; 423 lun_id_t target_lun; 424 periph_pattern_flags flags; 425 }; 426 427 typedef enum { 428 DEV_MATCH_NONE = 0x000, 429 DEV_MATCH_PATH = 0x001, 430 DEV_MATCH_TARGET = 0x002, 431 DEV_MATCH_LUN = 0x004, 432 DEV_MATCH_INQUIRY = 0x008, 433 DEV_MATCH_DEVID = 0x010, 434 DEV_MATCH_ANY = 0x00f 435 } dev_pattern_flags; 436 437 struct device_id_match_pattern { 438 uint8_t id_len; 439 uint8_t id[256]; 440 }; 441 442 struct device_match_pattern { 443 path_id_t path_id; 444 target_id_t target_id; 445 lun_id_t target_lun; 446 dev_pattern_flags flags; 447 union { 448 struct scsi_static_inquiry_pattern inq_pat; 449 struct device_id_match_pattern devid_pat; 450 } data; 451 }; 452 453 typedef enum { 454 BUS_MATCH_NONE = 0x000, 455 BUS_MATCH_PATH = 0x001, 456 BUS_MATCH_NAME = 0x002, 457 BUS_MATCH_UNIT = 0x004, 458 BUS_MATCH_BUS_ID = 0x008, 459 BUS_MATCH_ANY = 0x00f 460 } bus_pattern_flags; 461 462 struct bus_match_pattern { 463 path_id_t path_id; 464 char dev_name[DEV_IDLEN]; 465 u_int32_t unit_number; 466 u_int32_t bus_id; 467 bus_pattern_flags flags; 468 }; 469 470 union match_pattern { 471 struct periph_match_pattern periph_pattern; 472 struct device_match_pattern device_pattern; 473 struct bus_match_pattern bus_pattern; 474 }; 475 476 typedef enum { 477 DEV_MATCH_PERIPH, 478 DEV_MATCH_DEVICE, 479 DEV_MATCH_BUS 480 } dev_match_type; 481 482 struct dev_match_pattern { 483 dev_match_type type; 484 union match_pattern pattern; 485 }; 486 487 struct periph_match_result { 488 char periph_name[DEV_IDLEN]; 489 u_int32_t unit_number; 490 path_id_t path_id; 491 target_id_t target_id; 492 lun_id_t target_lun; 493 }; 494 495 typedef enum { 496 DEV_RESULT_NOFLAG = 0x00, 497 DEV_RESULT_UNCONFIGURED = 0x01 498 } dev_result_flags; 499 500 struct device_match_result { 501 path_id_t path_id; 502 target_id_t target_id; 503 lun_id_t target_lun; 504 cam_proto protocol; 505 struct scsi_inquiry_data inq_data; 506 struct ata_params ident_data; 507 dev_result_flags flags; 508 struct mmc_params mmc_ident_data; 509 }; 510 511 struct bus_match_result { 512 path_id_t path_id; 513 char dev_name[DEV_IDLEN]; 514 u_int32_t unit_number; 515 u_int32_t bus_id; 516 }; 517 518 union match_result { 519 struct periph_match_result periph_result; 520 struct device_match_result device_result; 521 struct bus_match_result bus_result; 522 }; 523 524 struct dev_match_result { 525 dev_match_type type; 526 union match_result result; 527 }; 528 529 typedef enum { 530 CAM_DEV_MATCH_LAST, 531 CAM_DEV_MATCH_MORE, 532 CAM_DEV_MATCH_LIST_CHANGED, 533 CAM_DEV_MATCH_SIZE_ERROR, 534 CAM_DEV_MATCH_ERROR 535 } ccb_dev_match_status; 536 537 typedef enum { 538 CAM_DEV_POS_NONE = 0x000, 539 CAM_DEV_POS_BUS = 0x001, 540 CAM_DEV_POS_TARGET = 0x002, 541 CAM_DEV_POS_DEVICE = 0x004, 542 CAM_DEV_POS_PERIPH = 0x008, 543 CAM_DEV_POS_PDPTR = 0x010, 544 CAM_DEV_POS_TYPEMASK = 0xf00, 545 CAM_DEV_POS_EDT = 0x100, 546 CAM_DEV_POS_PDRV = 0x200 547 } dev_pos_type; 548 549 struct ccb_dm_cookie { 550 void *bus; 551 void *target; 552 void *device; 553 void *periph; 554 void *pdrv; 555 }; 556 557 struct ccb_dev_position { 558 u_int generations[4]; 559 #define CAM_BUS_GENERATION 0x00 560 #define CAM_TARGET_GENERATION 0x01 561 #define CAM_DEV_GENERATION 0x02 562 #define CAM_PERIPH_GENERATION 0x03 563 dev_pos_type position_type; 564 struct ccb_dm_cookie cookie; 565 }; 566 567 struct ccb_dev_match { 568 struct ccb_hdr ccb_h; 569 ccb_dev_match_status status; 570 u_int32_t num_patterns; 571 u_int32_t pattern_buf_len; 572 struct dev_match_pattern *patterns; 573 u_int32_t num_matches; 574 u_int32_t match_buf_len; 575 struct dev_match_result *matches; 576 struct ccb_dev_position pos; 577 }; 578 579 /* 580 * Definitions for the path inquiry CCB fields. 581 */ 582 #define CAM_VERSION 0x19 /* Hex value for current version */ 583 584 typedef enum { 585 PI_MDP_ABLE = 0x80, /* Supports MDP message */ 586 PI_WIDE_32 = 0x40, /* Supports 32 bit wide SCSI */ 587 PI_WIDE_16 = 0x20, /* Supports 16 bit wide SCSI */ 588 PI_SDTR_ABLE = 0x10, /* Supports SDTR message */ 589 PI_LINKED_CDB = 0x08, /* Supports linked CDBs */ 590 PI_SATAPM = 0x04, /* Supports SATA PM */ 591 PI_TAG_ABLE = 0x02, /* Supports tag queue messages */ 592 PI_SOFT_RST = 0x01 /* Supports soft reset alternative */ 593 } pi_inqflag; 594 595 typedef enum { 596 PIT_PROCESSOR = 0x80, /* Target mode processor mode */ 597 PIT_PHASE = 0x40, /* Target mode phase cog. mode */ 598 PIT_DISCONNECT = 0x20, /* Disconnects supported in target mode */ 599 PIT_TERM_IO = 0x10, /* Terminate I/O message supported in TM */ 600 PIT_GRP_6 = 0x08, /* Group 6 commands supported */ 601 PIT_GRP_7 = 0x04 /* Group 7 commands supported */ 602 } pi_tmflag; 603 604 typedef enum { 605 PIM_ATA_EXT = 0x200,/* ATA requests can understand ata_ext requests */ 606 PIM_EXTLUNS = 0x100,/* 64bit extended LUNs supported */ 607 PIM_SCANHILO = 0x80, /* Bus scans from high ID to low ID */ 608 PIM_NOREMOVE = 0x40, /* Removeable devices not included in scan */ 609 PIM_NOINITIATOR = 0x20, /* Initiator role not supported. */ 610 PIM_NOBUSRESET = 0x10, /* User has disabled initial BUS RESET */ 611 PIM_NO_6_BYTE = 0x08, /* Do not send 6-byte commands */ 612 PIM_SEQSCAN = 0x04, /* Do bus scans sequentially, not in parallel */ 613 PIM_UNMAPPED = 0x02, 614 PIM_NOSCAN = 0x01 /* SIM does its own scanning */ 615 } pi_miscflag; 616 617 /* Path Inquiry CCB */ 618 struct ccb_pathinq_settings_spi { 619 u_int8_t ppr_options; 620 }; 621 622 struct ccb_pathinq_settings_fc { 623 u_int64_t wwnn; /* world wide node name */ 624 u_int64_t wwpn; /* world wide port name */ 625 u_int32_t port; /* 24 bit port id, if known */ 626 u_int32_t bitrate; /* Mbps */ 627 }; 628 629 struct ccb_pathinq_settings_sas { 630 u_int32_t bitrate; /* Mbps */ 631 }; 632 633 struct ccb_pathinq_settings_nvme { 634 uint16_t nsid; /* Namespace ID for this path */ 635 }; 636 637 #define PATHINQ_SETTINGS_SIZE 128 638 639 struct ccb_pathinq { 640 struct ccb_hdr ccb_h; 641 u_int8_t version_num; /* Version number for the SIM/HBA */ 642 u_int8_t hba_inquiry; /* Mimic of INQ byte 7 for the HBA */ 643 u_int16_t target_sprt; /* Flags for target mode support */ 644 u_int32_t hba_misc; /* Misc HBA features */ 645 u_int16_t hba_eng_cnt; /* HBA engine count */ 646 /* Vendor Unique capabilities */ 647 u_int8_t vuhba_flags[VUHBALEN]; 648 u_int32_t max_target; /* Maximum supported Target */ 649 u_int32_t max_lun; /* Maximum supported Lun */ 650 u_int32_t async_flags; /* Installed Async handlers */ 651 path_id_t hpath_id; /* Highest Path ID in the subsystem */ 652 target_id_t initiator_id; /* ID of the HBA on the SCSI bus */ 653 char sim_vid[SIM_IDLEN]; /* Vendor ID of the SIM */ 654 char hba_vid[HBA_IDLEN]; /* Vendor ID of the HBA */ 655 char dev_name[DEV_IDLEN];/* Device name for SIM */ 656 u_int32_t unit_number; /* Unit number for SIM */ 657 u_int32_t bus_id; /* Bus ID for SIM */ 658 u_int32_t base_transfer_speed;/* Base bus speed in KB/sec */ 659 cam_proto protocol; 660 u_int protocol_version; 661 cam_xport transport; 662 u_int transport_version; 663 union { 664 struct ccb_pathinq_settings_spi spi; 665 struct ccb_pathinq_settings_fc fc; 666 struct ccb_pathinq_settings_sas sas; 667 struct ccb_pathinq_settings_nvme nvme; 668 char ccb_pathinq_settings_opaque[PATHINQ_SETTINGS_SIZE]; 669 } xport_specific; 670 u_int maxio; /* Max supported I/O size, in bytes. */ 671 u_int16_t hba_vendor; /* HBA vendor ID */ 672 u_int16_t hba_device; /* HBA device ID */ 673 u_int16_t hba_subvendor; /* HBA subvendor ID */ 674 u_int16_t hba_subdevice; /* HBA subdevice ID */ 675 }; 676 677 /* Path Statistics CCB */ 678 struct ccb_pathstats { 679 struct ccb_hdr ccb_h; 680 struct timeval last_reset; /* Time of last bus reset/loop init */ 681 }; 682 683 typedef enum { 684 SMP_FLAG_NONE = 0x00, 685 SMP_FLAG_REQ_SG = 0x01, 686 SMP_FLAG_RSP_SG = 0x02 687 } ccb_smp_pass_flags; 688 689 /* 690 * Serial Management Protocol CCB 691 * XXX Currently the semantics for this CCB are that it is executed either 692 * by the addressed device, or that device's parent (i.e. an expander for 693 * any device on an expander) if the addressed device doesn't support SMP. 694 * Later, once we have the ability to probe SMP-only devices and put them 695 * in CAM's topology, the CCB will only be executed by the addressed device 696 * if possible. 697 */ 698 struct ccb_smpio { 699 struct ccb_hdr ccb_h; 700 uint8_t *smp_request; 701 int smp_request_len; 702 uint16_t smp_request_sglist_cnt; 703 uint8_t *smp_response; 704 int smp_response_len; 705 uint16_t smp_response_sglist_cnt; 706 ccb_smp_pass_flags flags; 707 }; 708 709 typedef union { 710 u_int8_t *sense_ptr; /* 711 * Pointer to storage 712 * for sense information 713 */ 714 /* Storage Area for sense information */ 715 struct scsi_sense_data sense_buf; 716 } sense_t; 717 718 typedef union { 719 u_int8_t *cdb_ptr; /* Pointer to the CDB bytes to send */ 720 /* Area for the CDB send */ 721 u_int8_t cdb_bytes[IOCDBLEN]; 722 } cdb_t; 723 724 /* 725 * SCSI I/O Request CCB used for the XPT_SCSI_IO and XPT_CONT_TARGET_IO 726 * function codes. 727 */ 728 struct ccb_scsiio { 729 struct ccb_hdr ccb_h; 730 union ccb *next_ccb; /* Ptr for next CCB for action */ 731 u_int8_t *req_map; /* Ptr to mapping info */ 732 u_int8_t *data_ptr; /* Ptr to the data buf/SG list */ 733 u_int32_t dxfer_len; /* Data transfer length */ 734 /* Autosense storage */ 735 struct scsi_sense_data sense_data; 736 u_int8_t sense_len; /* Number of bytes to autosense */ 737 u_int8_t cdb_len; /* Number of bytes for the CDB */ 738 u_int16_t sglist_cnt; /* Number of SG list entries */ 739 u_int8_t scsi_status; /* Returned SCSI status */ 740 u_int8_t sense_resid; /* Autosense resid length: 2's comp */ 741 u_int32_t resid; /* Transfer residual length: 2's comp */ 742 cdb_t cdb_io; /* Union for CDB bytes/pointer */ 743 u_int8_t *msg_ptr; /* Pointer to the message buffer */ 744 u_int16_t msg_len; /* Number of bytes for the Message */ 745 u_int8_t tag_action; /* What to do for tag queueing */ 746 /* 747 * The tag action should be either the define below (to send a 748 * non-tagged transaction) or one of the defined scsi tag messages 749 * from scsi_message.h. 750 */ 751 #define CAM_TAG_ACTION_NONE 0x00 752 u_int tag_id; /* tag id from initator (target mode) */ 753 u_int init_id; /* initiator id of who selected */ 754 #if defined(BUF_TRACKING) || defined(FULL_BUF_TRACKING) 755 struct bio *bio; /* Associated bio */ 756 #endif 757 }; 758 759 static __inline uint8_t * 760 scsiio_cdb_ptr(struct ccb_scsiio *ccb) 761 { 762 return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 763 ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes); 764 } 765 766 /* 767 * ATA I/O Request CCB used for the XPT_ATA_IO function code. 768 */ 769 struct ccb_ataio { 770 struct ccb_hdr ccb_h; 771 union ccb *next_ccb; /* Ptr for next CCB for action */ 772 struct ata_cmd cmd; /* ATA command register set */ 773 struct ata_res res; /* ATA result register set */ 774 u_int8_t *data_ptr; /* Ptr to the data buf/SG list */ 775 u_int32_t dxfer_len; /* Data transfer length */ 776 u_int32_t resid; /* Transfer residual length: 2's comp */ 777 u_int8_t ata_flags; /* Flags for the rest of the buffer */ 778 #define ATA_FLAG_AUX 0x1 779 uint32_t aux; 780 uint32_t unused; 781 }; 782 783 /* 784 * MMC I/O Request CCB used for the XPT_MMC_IO function code. 785 */ 786 struct ccb_mmcio { 787 struct ccb_hdr ccb_h; 788 union ccb *next_ccb; /* Ptr for next CCB for action */ 789 struct mmc_command cmd; 790 struct mmc_command stop; 791 }; 792 793 struct ccb_accept_tio { 794 struct ccb_hdr ccb_h; 795 cdb_t cdb_io; /* Union for CDB bytes/pointer */ 796 u_int8_t cdb_len; /* Number of bytes for the CDB */ 797 u_int8_t tag_action; /* What to do for tag queueing */ 798 u_int8_t sense_len; /* Number of bytes of Sense Data */ 799 u_int tag_id; /* tag id from initator (target mode) */ 800 u_int init_id; /* initiator id of who selected */ 801 struct scsi_sense_data sense_data; 802 }; 803 804 static __inline uint8_t * 805 atio_cdb_ptr(struct ccb_accept_tio *ccb) 806 { 807 return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 808 ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes); 809 } 810 811 /* Release SIM Queue */ 812 struct ccb_relsim { 813 struct ccb_hdr ccb_h; 814 u_int32_t release_flags; 815 #define RELSIM_ADJUST_OPENINGS 0x01 816 #define RELSIM_RELEASE_AFTER_TIMEOUT 0x02 817 #define RELSIM_RELEASE_AFTER_CMDCMPLT 0x04 818 #define RELSIM_RELEASE_AFTER_QEMPTY 0x08 819 u_int32_t openings; 820 u_int32_t release_timeout; /* Abstract argument. */ 821 u_int32_t qfrozen_cnt; 822 }; 823 824 /* 825 * NVMe I/O Request CCB used for the XPT_NVME_IO and XPT_NVME_ADMIN function codes. 826 */ 827 struct ccb_nvmeio { 828 struct ccb_hdr ccb_h; 829 union ccb *next_ccb; /* Ptr for next CCB for action */ 830 struct nvme_command cmd; /* NVME command, per NVME standard */ 831 struct nvme_completion cpl; /* NVME completion, per NVME standard */ 832 uint8_t *data_ptr; /* Ptr to the data buf/SG list */ 833 uint32_t dxfer_len; /* Data transfer length */ 834 uint32_t resid; /* Transfer residual length: 2's comp unused ?*/ 835 }; 836 837 /* 838 * Definitions for the asynchronous callback CCB fields. 839 */ 840 typedef enum { 841 AC_UNIT_ATTENTION = 0x4000,/* Device reported UNIT ATTENTION */ 842 AC_ADVINFO_CHANGED = 0x2000,/* Advance info might have changes */ 843 AC_CONTRACT = 0x1000,/* A contractual callback */ 844 AC_GETDEV_CHANGED = 0x800,/* Getdev info might have changed */ 845 AC_INQ_CHANGED = 0x400,/* Inquiry info might have changed */ 846 AC_TRANSFER_NEG = 0x200,/* New transfer settings in effect */ 847 AC_LOST_DEVICE = 0x100,/* A device went away */ 848 AC_FOUND_DEVICE = 0x080,/* A new device was found */ 849 AC_PATH_DEREGISTERED = 0x040,/* A path has de-registered */ 850 AC_PATH_REGISTERED = 0x020,/* A new path has been registered */ 851 AC_SENT_BDR = 0x010,/* A BDR message was sent to target */ 852 AC_SCSI_AEN = 0x008,/* A SCSI AEN has been received */ 853 AC_UNSOL_RESEL = 0x002,/* Unsolicited reselection occurred */ 854 AC_BUS_RESET = 0x001 /* A SCSI bus reset occurred */ 855 } ac_code; 856 857 typedef void ac_callback_t (void *softc, u_int32_t code, 858 struct cam_path *path, void *args); 859 860 /* 861 * Generic Asynchronous callbacks. 862 * 863 * Generic arguments passed bac which are then interpreted between a per-system 864 * contract number. 865 */ 866 #define AC_CONTRACT_DATA_MAX (128 - sizeof (u_int64_t)) 867 struct ac_contract { 868 u_int64_t contract_number; 869 u_int8_t contract_data[AC_CONTRACT_DATA_MAX]; 870 }; 871 872 #define AC_CONTRACT_DEV_CHG 1 873 struct ac_device_changed { 874 u_int64_t wwpn; 875 u_int32_t port; 876 target_id_t target; 877 u_int8_t arrived; 878 }; 879 880 /* Set Asynchronous Callback CCB */ 881 struct ccb_setasync { 882 struct ccb_hdr ccb_h; 883 u_int32_t event_enable; /* Async Event enables */ 884 ac_callback_t *callback; 885 void *callback_arg; 886 }; 887 888 /* Set Device Type CCB */ 889 struct ccb_setdev { 890 struct ccb_hdr ccb_h; 891 u_int8_t dev_type; /* Value for dev type field in EDT */ 892 }; 893 894 /* SCSI Control Functions */ 895 896 /* Abort XPT request CCB */ 897 struct ccb_abort { 898 struct ccb_hdr ccb_h; 899 union ccb *abort_ccb; /* Pointer to CCB to abort */ 900 }; 901 902 /* Reset SCSI Bus CCB */ 903 struct ccb_resetbus { 904 struct ccb_hdr ccb_h; 905 }; 906 907 /* Reset SCSI Device CCB */ 908 struct ccb_resetdev { 909 struct ccb_hdr ccb_h; 910 }; 911 912 /* Terminate I/O Process Request CCB */ 913 struct ccb_termio { 914 struct ccb_hdr ccb_h; 915 union ccb *termio_ccb; /* Pointer to CCB to terminate */ 916 }; 917 918 typedef enum { 919 CTS_TYPE_CURRENT_SETTINGS, 920 CTS_TYPE_USER_SETTINGS 921 } cts_type; 922 923 struct ccb_trans_settings_scsi 924 { 925 u_int valid; /* Which fields to honor */ 926 #define CTS_SCSI_VALID_TQ 0x01 927 u_int flags; 928 #define CTS_SCSI_FLAGS_TAG_ENB 0x01 929 }; 930 931 struct ccb_trans_settings_ata 932 { 933 u_int valid; /* Which fields to honor */ 934 #define CTS_ATA_VALID_TQ 0x01 935 u_int flags; 936 #define CTS_ATA_FLAGS_TAG_ENB 0x01 937 }; 938 939 struct ccb_trans_settings_spi 940 { 941 u_int valid; /* Which fields to honor */ 942 #define CTS_SPI_VALID_SYNC_RATE 0x01 943 #define CTS_SPI_VALID_SYNC_OFFSET 0x02 944 #define CTS_SPI_VALID_BUS_WIDTH 0x04 945 #define CTS_SPI_VALID_DISC 0x08 946 #define CTS_SPI_VALID_PPR_OPTIONS 0x10 947 u_int flags; 948 #define CTS_SPI_FLAGS_DISC_ENB 0x01 949 u_int sync_period; 950 u_int sync_offset; 951 u_int bus_width; 952 u_int ppr_options; 953 }; 954 955 struct ccb_trans_settings_fc { 956 u_int valid; /* Which fields to honor */ 957 #define CTS_FC_VALID_WWNN 0x8000 958 #define CTS_FC_VALID_WWPN 0x4000 959 #define CTS_FC_VALID_PORT 0x2000 960 #define CTS_FC_VALID_SPEED 0x1000 961 u_int64_t wwnn; /* world wide node name */ 962 u_int64_t wwpn; /* world wide port name */ 963 u_int32_t port; /* 24 bit port id, if known */ 964 u_int32_t bitrate; /* Mbps */ 965 }; 966 967 struct ccb_trans_settings_sas { 968 u_int valid; /* Which fields to honor */ 969 #define CTS_SAS_VALID_SPEED 0x1000 970 u_int32_t bitrate; /* Mbps */ 971 }; 972 973 struct ccb_trans_settings_pata { 974 u_int valid; /* Which fields to honor */ 975 #define CTS_ATA_VALID_MODE 0x01 976 #define CTS_ATA_VALID_BYTECOUNT 0x02 977 #define CTS_ATA_VALID_ATAPI 0x20 978 #define CTS_ATA_VALID_CAPS 0x40 979 int mode; /* Mode */ 980 u_int bytecount; /* Length of PIO transaction */ 981 u_int atapi; /* Length of ATAPI CDB */ 982 u_int caps; /* Device and host SATA caps. */ 983 #define CTS_ATA_CAPS_H 0x0000ffff 984 #define CTS_ATA_CAPS_H_DMA48 0x00000001 /* 48-bit DMA */ 985 #define CTS_ATA_CAPS_D 0xffff0000 986 }; 987 988 struct ccb_trans_settings_sata { 989 u_int valid; /* Which fields to honor */ 990 #define CTS_SATA_VALID_MODE 0x01 991 #define CTS_SATA_VALID_BYTECOUNT 0x02 992 #define CTS_SATA_VALID_REVISION 0x04 993 #define CTS_SATA_VALID_PM 0x08 994 #define CTS_SATA_VALID_TAGS 0x10 995 #define CTS_SATA_VALID_ATAPI 0x20 996 #define CTS_SATA_VALID_CAPS 0x40 997 int mode; /* Legacy PATA mode */ 998 u_int bytecount; /* Length of PIO transaction */ 999 int revision; /* SATA revision */ 1000 u_int pm_present; /* PM is present (XPT->SIM) */ 1001 u_int tags; /* Number of allowed tags */ 1002 u_int atapi; /* Length of ATAPI CDB */ 1003 u_int caps; /* Device and host SATA caps. */ 1004 #define CTS_SATA_CAPS_H 0x0000ffff 1005 #define CTS_SATA_CAPS_H_PMREQ 0x00000001 1006 #define CTS_SATA_CAPS_H_APST 0x00000002 1007 #define CTS_SATA_CAPS_H_DMAAA 0x00000010 /* Auto-activation */ 1008 #define CTS_SATA_CAPS_H_AN 0x00000020 /* Async. notification */ 1009 #define CTS_SATA_CAPS_D 0xffff0000 1010 #define CTS_SATA_CAPS_D_PMREQ 0x00010000 1011 #define CTS_SATA_CAPS_D_APST 0x00020000 1012 }; 1013 1014 struct ccb_trans_settings_nvme 1015 { 1016 u_int valid; /* Which fields to honor */ 1017 #define CTS_NVME_VALID_SPEC 0x01 1018 #define CTS_NVME_VALID_CAPS 0x02 1019 u_int spec_major; /* Major version of spec supported */ 1020 u_int spec_minor; /* Minor verison of spec supported */ 1021 u_int spec_tiny; /* Tiny version of spec supported */ 1022 u_int max_xfer; /* Max transfer size (0 -> unlimited */ 1023 u_int caps; 1024 }; 1025 1026 #include <cam/mmc/mmc_bus.h> 1027 struct ccb_trans_settings_mmc { 1028 struct mmc_ios ios; 1029 #define MMC_CLK (1 << 1) 1030 #define MMC_VDD (1 << 2) 1031 #define MMC_CS (1 << 3) 1032 #define MMC_BW (1 << 4) 1033 #define MMC_PM (1 << 5) 1034 #define MMC_BT (1 << 6) 1035 #define MMC_BM (1 << 7) 1036 uint32_t ios_valid; 1037 /* The folowing is used only for GET_TRAN_SETTINGS */ 1038 uint32_t host_ocr; 1039 int host_f_min; 1040 int host_f_max; 1041 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can do 4-bit data transfers */ 1042 #define MMC_CAP_8_BIT_DATA (1 << 1) /* Can do 8-bit data transfers */ 1043 #define MMC_CAP_HSPEED (1 << 2) /* Can do High Speed transfers */ 1044 uint32_t host_caps; 1045 }; 1046 1047 /* Get/Set transfer rate/width/disconnection/tag queueing settings */ 1048 struct ccb_trans_settings { 1049 struct ccb_hdr ccb_h; 1050 cts_type type; /* Current or User settings */ 1051 cam_proto protocol; 1052 u_int protocol_version; 1053 cam_xport transport; 1054 u_int transport_version; 1055 union { 1056 u_int valid; /* Which fields to honor */ 1057 struct ccb_trans_settings_ata ata; 1058 struct ccb_trans_settings_scsi scsi; 1059 struct ccb_trans_settings_nvme nvme; 1060 struct ccb_trans_settings_mmc mmc; 1061 } proto_specific; 1062 union { 1063 u_int valid; /* Which fields to honor */ 1064 struct ccb_trans_settings_spi spi; 1065 struct ccb_trans_settings_fc fc; 1066 struct ccb_trans_settings_sas sas; 1067 struct ccb_trans_settings_pata ata; 1068 struct ccb_trans_settings_sata sata; 1069 struct ccb_trans_settings_nvme nvme; 1070 } xport_specific; 1071 }; 1072 1073 1074 /* 1075 * Calculate the geometry parameters for a device 1076 * give the block size and volume size in blocks. 1077 */ 1078 struct ccb_calc_geometry { 1079 struct ccb_hdr ccb_h; 1080 u_int32_t block_size; 1081 u_int64_t volume_size; 1082 u_int32_t cylinders; 1083 u_int8_t heads; 1084 u_int8_t secs_per_track; 1085 }; 1086 1087 /* 1088 * Set or get SIM (and transport) specific knobs 1089 */ 1090 1091 #define KNOB_VALID_ADDRESS 0x1 1092 #define KNOB_VALID_ROLE 0x2 1093 1094 1095 #define KNOB_ROLE_NONE 0x0 1096 #define KNOB_ROLE_INITIATOR 0x1 1097 #define KNOB_ROLE_TARGET 0x2 1098 #define KNOB_ROLE_BOTH 0x3 1099 1100 struct ccb_sim_knob_settings_spi { 1101 u_int valid; 1102 u_int initiator_id; 1103 u_int role; 1104 }; 1105 1106 struct ccb_sim_knob_settings_fc { 1107 u_int valid; 1108 u_int64_t wwnn; /* world wide node name */ 1109 u_int64_t wwpn; /* world wide port name */ 1110 u_int role; 1111 }; 1112 1113 struct ccb_sim_knob_settings_sas { 1114 u_int valid; 1115 u_int64_t wwnn; /* world wide node name */ 1116 u_int role; 1117 }; 1118 #define KNOB_SETTINGS_SIZE 128 1119 1120 struct ccb_sim_knob { 1121 struct ccb_hdr ccb_h; 1122 union { 1123 u_int valid; /* Which fields to honor */ 1124 struct ccb_sim_knob_settings_spi spi; 1125 struct ccb_sim_knob_settings_fc fc; 1126 struct ccb_sim_knob_settings_sas sas; 1127 char pad[KNOB_SETTINGS_SIZE]; 1128 } xport_specific; 1129 }; 1130 1131 /* 1132 * Rescan the given bus, or bus/target/lun 1133 */ 1134 struct ccb_rescan { 1135 struct ccb_hdr ccb_h; 1136 cam_flags flags; 1137 }; 1138 1139 /* 1140 * Turn on debugging for the given bus, bus/target, or bus/target/lun. 1141 */ 1142 struct ccb_debug { 1143 struct ccb_hdr ccb_h; 1144 cam_debug_flags flags; 1145 }; 1146 1147 /* Target mode structures. */ 1148 1149 struct ccb_en_lun { 1150 struct ccb_hdr ccb_h; 1151 u_int16_t grp6_len; /* Group 6 VU CDB length */ 1152 u_int16_t grp7_len; /* Group 7 VU CDB length */ 1153 u_int8_t enable; 1154 }; 1155 1156 /* old, barely used immediate notify, binary compatibility */ 1157 struct ccb_immed_notify { 1158 struct ccb_hdr ccb_h; 1159 struct scsi_sense_data sense_data; 1160 u_int8_t sense_len; /* Number of bytes in sense buffer */ 1161 u_int8_t initiator_id; /* Id of initiator that selected */ 1162 u_int8_t message_args[7]; /* Message Arguments */ 1163 }; 1164 1165 struct ccb_notify_ack { 1166 struct ccb_hdr ccb_h; 1167 u_int16_t seq_id; /* Sequence identifier */ 1168 u_int8_t event; /* Event flags */ 1169 }; 1170 1171 struct ccb_immediate_notify { 1172 struct ccb_hdr ccb_h; 1173 u_int tag_id; /* Tag for immediate notify */ 1174 u_int seq_id; /* Tag for target of notify */ 1175 u_int initiator_id; /* Initiator Identifier */ 1176 u_int arg; /* Function specific */ 1177 }; 1178 1179 struct ccb_notify_acknowledge { 1180 struct ccb_hdr ccb_h; 1181 u_int tag_id; /* Tag for immediate notify */ 1182 u_int seq_id; /* Tar for target of notify */ 1183 u_int initiator_id; /* Initiator Identifier */ 1184 u_int arg; /* Response information */ 1185 /* 1186 * Lower byte of arg is one of RESPONSE CODE values defined below 1187 * (subset of response codes from SPL-4 and FCP-4 specifications), 1188 * upper 3 bytes is code-specific ADDITIONAL RESPONSE INFORMATION. 1189 */ 1190 #define CAM_RSP_TMF_COMPLETE 0x00 1191 #define CAM_RSP_TMF_REJECTED 0x04 1192 #define CAM_RSP_TMF_FAILED 0x05 1193 #define CAM_RSP_TMF_SUCCEEDED 0x08 1194 #define CAM_RSP_TMF_INCORRECT_LUN 0x09 1195 }; 1196 1197 /* HBA engine structures. */ 1198 1199 typedef enum { 1200 EIT_BUFFER, /* Engine type: buffer memory */ 1201 EIT_LOSSLESS, /* Engine type: lossless compression */ 1202 EIT_LOSSY, /* Engine type: lossy compression */ 1203 EIT_ENCRYPT /* Engine type: encryption */ 1204 } ei_type; 1205 1206 typedef enum { 1207 EAD_VUNIQUE, /* Engine algorithm ID: vendor unique */ 1208 EAD_LZ1V1, /* Engine algorithm ID: LZ1 var.1 */ 1209 EAD_LZ2V1, /* Engine algorithm ID: LZ2 var.1 */ 1210 EAD_LZ2V2 /* Engine algorithm ID: LZ2 var.2 */ 1211 } ei_algo; 1212 1213 struct ccb_eng_inq { 1214 struct ccb_hdr ccb_h; 1215 u_int16_t eng_num; /* The engine number for this inquiry */ 1216 ei_type eng_type; /* Returned engine type */ 1217 ei_algo eng_algo; /* Returned engine algorithm type */ 1218 u_int32_t eng_memeory; /* Returned engine memory size */ 1219 }; 1220 1221 struct ccb_eng_exec { /* This structure must match SCSIIO size */ 1222 struct ccb_hdr ccb_h; 1223 u_int8_t *pdrv_ptr; /* Ptr used by the peripheral driver */ 1224 u_int8_t *req_map; /* Ptr for mapping info on the req. */ 1225 u_int8_t *data_ptr; /* Pointer to the data buf/SG list */ 1226 u_int32_t dxfer_len; /* Data transfer length */ 1227 u_int8_t *engdata_ptr; /* Pointer to the engine buffer data */ 1228 u_int16_t sglist_cnt; /* Num of scatter gather list entries */ 1229 u_int32_t dmax_len; /* Destination data maximum length */ 1230 u_int32_t dest_len; /* Destination data length */ 1231 int32_t src_resid; /* Source residual length: 2's comp */ 1232 u_int32_t timeout; /* Timeout value */ 1233 u_int16_t eng_num; /* Engine number for this request */ 1234 u_int16_t vu_flags; /* Vendor Unique flags */ 1235 }; 1236 1237 /* 1238 * Definitions for the timeout field in the SCSI I/O CCB. 1239 */ 1240 #define CAM_TIME_DEFAULT 0x00000000 /* Use SIM default value */ 1241 #define CAM_TIME_INFINITY 0xFFFFFFFF /* Infinite timeout */ 1242 1243 #define CAM_SUCCESS 0 /* For signaling general success */ 1244 #define CAM_FAILURE 1 /* For signaling general failure */ 1245 1246 #define CAM_FALSE 0 1247 #define CAM_TRUE 1 1248 1249 #define XPT_CCB_INVALID -1 /* for signaling a bad CCB to free */ 1250 1251 /* 1252 * CCB for working with advanced device information. This operates in a fashion 1253 * similar to XPT_GDEV_TYPE. Specify the target in ccb_h, the buffer 1254 * type requested, and provide a buffer size/buffer to write to. If the 1255 * buffer is too small, provsiz will be larger than bufsiz. 1256 */ 1257 struct ccb_dev_advinfo { 1258 struct ccb_hdr ccb_h; 1259 uint32_t flags; 1260 #define CDAI_FLAG_NONE 0x0 /* No flags set */ 1261 #define CDAI_FLAG_STORE 0x1 /* If set, action becomes store */ 1262 uint32_t buftype; /* IN: Type of data being requested */ 1263 /* NB: buftype is interpreted on a per-transport basis */ 1264 #define CDAI_TYPE_SCSI_DEVID 1 1265 #define CDAI_TYPE_SERIAL_NUM 2 1266 #define CDAI_TYPE_PHYS_PATH 3 1267 #define CDAI_TYPE_RCAPLONG 4 1268 #define CDAI_TYPE_EXT_INQ 5 1269 off_t bufsiz; /* IN: Size of external buffer */ 1270 #define CAM_SCSI_DEVID_MAXLEN 65536 /* length in buffer is an uint16_t */ 1271 off_t provsiz; /* OUT: Size required/used */ 1272 uint8_t *buf; /* IN/OUT: Buffer for requested data */ 1273 }; 1274 1275 /* 1276 * CCB for sending async events 1277 */ 1278 struct ccb_async { 1279 struct ccb_hdr ccb_h; 1280 uint32_t async_code; 1281 off_t async_arg_size; 1282 void *async_arg_ptr; 1283 }; 1284 1285 /* 1286 * Union of all CCB types for kernel space allocation. This union should 1287 * never be used for manipulating CCBs - its only use is for the allocation 1288 * and deallocation of raw CCB space and is the return type of xpt_ccb_alloc 1289 * and the argument to xpt_ccb_free. 1290 */ 1291 union ccb { 1292 struct ccb_hdr ccb_h; /* For convenience */ 1293 struct ccb_scsiio csio; 1294 struct ccb_getdev cgd; 1295 struct ccb_getdevlist cgdl; 1296 struct ccb_pathinq cpi; 1297 struct ccb_relsim crs; 1298 struct ccb_setasync csa; 1299 struct ccb_setdev csd; 1300 struct ccb_pathstats cpis; 1301 struct ccb_getdevstats cgds; 1302 struct ccb_dev_match cdm; 1303 struct ccb_trans_settings cts; 1304 struct ccb_calc_geometry ccg; 1305 struct ccb_sim_knob knob; 1306 struct ccb_abort cab; 1307 struct ccb_resetbus crb; 1308 struct ccb_resetdev crd; 1309 struct ccb_termio tio; 1310 struct ccb_accept_tio atio; 1311 struct ccb_scsiio ctio; 1312 struct ccb_en_lun cel; 1313 struct ccb_immed_notify cin; 1314 struct ccb_notify_ack cna; 1315 struct ccb_immediate_notify cin1; 1316 struct ccb_notify_acknowledge cna2; 1317 struct ccb_eng_inq cei; 1318 struct ccb_eng_exec cee; 1319 struct ccb_smpio smpio; 1320 struct ccb_rescan crcn; 1321 struct ccb_debug cdbg; 1322 struct ccb_ataio ataio; 1323 struct ccb_dev_advinfo cdai; 1324 struct ccb_async casync; 1325 struct ccb_nvmeio nvmeio; 1326 struct ccb_mmcio mmcio; 1327 }; 1328 1329 #define CCB_CLEAR_ALL_EXCEPT_HDR(ccbp) \ 1330 bzero((char *)(ccbp) + sizeof((ccbp)->ccb_h), \ 1331 sizeof(*(ccbp)) - sizeof((ccbp)->ccb_h)) 1332 1333 __BEGIN_DECLS 1334 static __inline void 1335 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries, 1336 void (*cbfcnp)(struct cam_periph *, union ccb *), 1337 u_int32_t flags, u_int8_t tag_action, 1338 u_int8_t *data_ptr, u_int32_t dxfer_len, 1339 u_int8_t sense_len, u_int8_t cdb_len, 1340 u_int32_t timeout); 1341 1342 static __inline void 1343 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries, 1344 void (*cbfcnp)(struct cam_periph *, union ccb *), 1345 u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len, 1346 u_int32_t timeout); 1347 1348 static __inline void 1349 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries, 1350 void (*cbfcnp)(struct cam_periph *, union ccb *), 1351 u_int32_t flags, u_int tag_action, u_int tag_id, 1352 u_int init_id, u_int scsi_status, u_int8_t *data_ptr, 1353 u_int32_t dxfer_len, u_int32_t timeout); 1354 1355 static __inline void 1356 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries, 1357 void (*cbfcnp)(struct cam_periph *, union ccb *), 1358 u_int32_t flags, u_int tag_action, 1359 u_int8_t *data_ptr, u_int32_t dxfer_len, 1360 u_int32_t timeout); 1361 1362 static __inline void 1363 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries, 1364 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags, 1365 uint8_t *smp_request, int smp_request_len, 1366 uint8_t *smp_response, int smp_response_len, 1367 uint32_t timeout); 1368 1369 static __inline void 1370 cam_fill_mmcio(struct ccb_mmcio *mmcio, uint32_t retries, 1371 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags, 1372 uint32_t mmc_opcode, uint32_t mmc_arg, uint32_t mmc_flags, 1373 struct mmc_data *mmc_d, 1374 uint32_t timeout); 1375 1376 static __inline void 1377 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries, 1378 void (*cbfcnp)(struct cam_periph *, union ccb *), 1379 u_int32_t flags, u_int8_t tag_action, 1380 u_int8_t *data_ptr, u_int32_t dxfer_len, 1381 u_int8_t sense_len, u_int8_t cdb_len, 1382 u_int32_t timeout) 1383 { 1384 csio->ccb_h.func_code = XPT_SCSI_IO; 1385 csio->ccb_h.flags = flags; 1386 csio->ccb_h.xflags = 0; 1387 csio->ccb_h.retry_count = retries; 1388 csio->ccb_h.cbfcnp = cbfcnp; 1389 csio->ccb_h.timeout = timeout; 1390 csio->data_ptr = data_ptr; 1391 csio->dxfer_len = dxfer_len; 1392 csio->sense_len = sense_len; 1393 csio->cdb_len = cdb_len; 1394 csio->tag_action = tag_action; 1395 #if defined(BUF_TRACKING) || defined(FULL_BUF_TRACKING) 1396 csio->bio = NULL; 1397 #endif 1398 } 1399 1400 static __inline void 1401 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries, 1402 void (*cbfcnp)(struct cam_periph *, union ccb *), 1403 u_int32_t flags, u_int tag_action, u_int tag_id, 1404 u_int init_id, u_int scsi_status, u_int8_t *data_ptr, 1405 u_int32_t dxfer_len, u_int32_t timeout) 1406 { 1407 csio->ccb_h.func_code = XPT_CONT_TARGET_IO; 1408 csio->ccb_h.flags = flags; 1409 csio->ccb_h.xflags = 0; 1410 csio->ccb_h.retry_count = retries; 1411 csio->ccb_h.cbfcnp = cbfcnp; 1412 csio->ccb_h.timeout = timeout; 1413 csio->data_ptr = data_ptr; 1414 csio->dxfer_len = dxfer_len; 1415 csio->scsi_status = scsi_status; 1416 csio->tag_action = tag_action; 1417 csio->tag_id = tag_id; 1418 csio->init_id = init_id; 1419 } 1420 1421 static __inline void 1422 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries, 1423 void (*cbfcnp)(struct cam_periph *, union ccb *), 1424 u_int32_t flags, u_int tag_action __unused, 1425 u_int8_t *data_ptr, u_int32_t dxfer_len, 1426 u_int32_t timeout) 1427 { 1428 ataio->ccb_h.func_code = XPT_ATA_IO; 1429 ataio->ccb_h.flags = flags; 1430 ataio->ccb_h.retry_count = retries; 1431 ataio->ccb_h.cbfcnp = cbfcnp; 1432 ataio->ccb_h.timeout = timeout; 1433 ataio->data_ptr = data_ptr; 1434 ataio->dxfer_len = dxfer_len; 1435 ataio->ata_flags = 0; 1436 } 1437 1438 static __inline void 1439 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries, 1440 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags, 1441 uint8_t *smp_request, int smp_request_len, 1442 uint8_t *smp_response, int smp_response_len, 1443 uint32_t timeout) 1444 { 1445 #ifdef _KERNEL 1446 KASSERT((flags & CAM_DIR_MASK) == CAM_DIR_BOTH, 1447 ("direction != CAM_DIR_BOTH")); 1448 KASSERT((smp_request != NULL) && (smp_response != NULL), 1449 ("need valid request and response buffers")); 1450 KASSERT((smp_request_len != 0) && (smp_response_len != 0), 1451 ("need non-zero request and response lengths")); 1452 #endif /*_KERNEL*/ 1453 smpio->ccb_h.func_code = XPT_SMP_IO; 1454 smpio->ccb_h.flags = flags; 1455 smpio->ccb_h.retry_count = retries; 1456 smpio->ccb_h.cbfcnp = cbfcnp; 1457 smpio->ccb_h.timeout = timeout; 1458 smpio->smp_request = smp_request; 1459 smpio->smp_request_len = smp_request_len; 1460 smpio->smp_response = smp_response; 1461 smpio->smp_response_len = smp_response_len; 1462 } 1463 1464 static __inline void 1465 cam_fill_mmcio(struct ccb_mmcio *mmcio, uint32_t retries, 1466 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags, 1467 uint32_t mmc_opcode, uint32_t mmc_arg, uint32_t mmc_flags, 1468 struct mmc_data *mmc_d, 1469 uint32_t timeout) 1470 { 1471 mmcio->ccb_h.func_code = XPT_MMC_IO; 1472 mmcio->ccb_h.flags = flags; 1473 mmcio->ccb_h.retry_count = retries; 1474 mmcio->ccb_h.cbfcnp = cbfcnp; 1475 mmcio->ccb_h.timeout = timeout; 1476 mmcio->cmd.opcode = mmc_opcode; 1477 mmcio->cmd.arg = mmc_arg; 1478 mmcio->cmd.flags = mmc_flags; 1479 mmcio->stop.opcode = 0; 1480 mmcio->stop.arg = 0; 1481 mmcio->stop.flags = 0; 1482 if (mmc_d != NULL) { 1483 mmcio->cmd.data = mmc_d; 1484 } else 1485 mmcio->cmd.data = NULL; 1486 mmcio->cmd.resp[0] = 0; 1487 mmcio->cmd.resp[1] = 0; 1488 mmcio->cmd.resp[2] = 0; 1489 mmcio->cmd.resp[3] = 0; 1490 } 1491 1492 static __inline void 1493 cam_set_ccbstatus(union ccb *ccb, cam_status status) 1494 { 1495 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1496 ccb->ccb_h.status |= status; 1497 } 1498 1499 static __inline cam_status 1500 cam_ccb_status(union ccb *ccb) 1501 { 1502 return ((cam_status)(ccb->ccb_h.status & CAM_STATUS_MASK)); 1503 } 1504 1505 void cam_calc_geometry(struct ccb_calc_geometry *ccg, int extended); 1506 1507 static __inline void 1508 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries, 1509 void (*cbfcnp)(struct cam_periph *, union ccb *), 1510 u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len, 1511 u_int32_t timeout) 1512 { 1513 nvmeio->ccb_h.func_code = XPT_NVME_IO; 1514 nvmeio->ccb_h.flags = flags; 1515 nvmeio->ccb_h.retry_count = retries; 1516 nvmeio->ccb_h.cbfcnp = cbfcnp; 1517 nvmeio->ccb_h.timeout = timeout; 1518 nvmeio->data_ptr = data_ptr; 1519 nvmeio->dxfer_len = dxfer_len; 1520 } 1521 1522 static __inline void 1523 cam_fill_nvmeadmin(struct ccb_nvmeio *nvmeio, u_int32_t retries, 1524 void (*cbfcnp)(struct cam_periph *, union ccb *), 1525 u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len, 1526 u_int32_t timeout) 1527 { 1528 nvmeio->ccb_h.func_code = XPT_NVME_ADMIN; 1529 nvmeio->ccb_h.flags = flags; 1530 nvmeio->ccb_h.retry_count = retries; 1531 nvmeio->ccb_h.cbfcnp = cbfcnp; 1532 nvmeio->ccb_h.timeout = timeout; 1533 nvmeio->data_ptr = data_ptr; 1534 nvmeio->dxfer_len = dxfer_len; 1535 } 1536 __END_DECLS 1537 1538 #endif /* _CAM_CAM_CCB_H */ 1539