xref: /freebsd/sys/cam/cam_ccb.h (revision 884d26c84cba3ffc3d4e626306098fcdfe6a0c2b)
1 /*-
2  * Data structures and definitions for CAM Control Blocks (CCBs).
3  *
4  * Copyright (c) 1997, 1998 Justin T. Gibbs.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer,
12  *    without modification, immediately at the beginning of the file.
13  * 2. The name of the author may not be used to endorse or promote products
14  *    derived from this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 #ifndef _CAM_CAM_CCB_H
32 #define _CAM_CAM_CCB_H 1
33 
34 #include <sys/queue.h>
35 #include <sys/cdefs.h>
36 #include <sys/time.h>
37 #include <sys/limits.h>
38 #ifndef _KERNEL
39 #include <sys/callout.h>
40 #endif
41 #include <cam/cam_debug.h>
42 #include <cam/scsi/scsi_all.h>
43 #include <cam/ata/ata_all.h>
44 #include <cam/nvme/nvme_all.h>
45 
46 /* General allocation length definitions for CCB structures */
47 #define	IOCDBLEN	CAM_MAX_CDBLEN	/* Space for CDB bytes/pointer */
48 #define	VUHBALEN	14		/* Vendor Unique HBA length */
49 #define	SIM_IDLEN	16		/* ASCII string len for SIM ID */
50 #define	HBA_IDLEN	16		/* ASCII string len for HBA ID */
51 #define	DEV_IDLEN	16		/* ASCII string len for device names */
52 #define CCB_PERIPH_PRIV_SIZE 	2	/* size of peripheral private area */
53 #define CCB_SIM_PRIV_SIZE 	2	/* size of sim private area */
54 
55 /* Struct definitions for CAM control blocks */
56 
57 /* Common CCB header */
58 /* CAM CCB flags */
59 typedef enum {
60 	CAM_CDB_POINTER		= 0x00000001,/* The CDB field is a pointer    */
61 	CAM_QUEUE_ENABLE	= 0x00000002,/* SIM queue actions are enabled */
62 	CAM_CDB_LINKED		= 0x00000004,/* CCB contains a linked CDB     */
63 	CAM_NEGOTIATE		= 0x00000008,/*
64 					      * Perform transport negotiation
65 					      * with this command.
66 					      */
67 	CAM_DATA_ISPHYS		= 0x00000010,/* Data type with physical addrs */
68 	CAM_DIS_AUTOSENSE	= 0x00000020,/* Disable autosense feature     */
69 	CAM_DIR_BOTH		= 0x00000000,/* Data direction (00:IN/OUT)    */
70 	CAM_DIR_IN		= 0x00000040,/* Data direction (01:DATA IN)   */
71 	CAM_DIR_OUT		= 0x00000080,/* Data direction (10:DATA OUT)  */
72 	CAM_DIR_NONE		= 0x000000C0,/* Data direction (11:no data)   */
73 	CAM_DIR_MASK		= 0x000000C0,/* Data direction Mask	      */
74 	CAM_DATA_VADDR		= 0x00000000,/* Data type (000:Virtual)       */
75 	CAM_DATA_PADDR		= 0x00000010,/* Data type (001:Physical)      */
76 	CAM_DATA_SG		= 0x00040000,/* Data type (010:sglist)        */
77 	CAM_DATA_SG_PADDR	= 0x00040010,/* Data type (011:sglist phys)   */
78 	CAM_DATA_BIO		= 0x00200000,/* Data type (100:bio)           */
79 	CAM_DATA_MASK		= 0x00240010,/* Data type mask                */
80 	CAM_SOFT_RST_OP		= 0x00000100,/* Use Soft reset alternative    */
81 	CAM_ENG_SYNC		= 0x00000200,/* Flush resid bytes on complete */
82 	CAM_DEV_QFRZDIS		= 0x00000400,/* Disable DEV Q freezing	      */
83 	CAM_DEV_QFREEZE		= 0x00000800,/* Freeze DEV Q on execution     */
84 	CAM_HIGH_POWER		= 0x00001000,/* Command takes a lot of power  */
85 	CAM_SENSE_PTR		= 0x00002000,/* Sense data is a pointer	      */
86 	CAM_SENSE_PHYS		= 0x00004000,/* Sense pointer is physical addr*/
87 	CAM_TAG_ACTION_VALID	= 0x00008000,/* Use the tag action in this ccb*/
88 	CAM_PASS_ERR_RECOVER	= 0x00010000,/* Pass driver does err. recovery*/
89 	CAM_DIS_DISCONNECT	= 0x00020000,/* Disable disconnect	      */
90 	CAM_MSG_BUF_PHYS	= 0x00080000,/* Message buffer ptr is physical*/
91 	CAM_SNS_BUF_PHYS	= 0x00100000,/* Autosense data ptr is physical*/
92 	CAM_CDB_PHYS		= 0x00400000,/* CDB poiner is physical	      */
93 	CAM_ENG_SGLIST		= 0x00800000,/* SG list is for the HBA engine */
94 
95 /* Phase cognizant mode flags */
96 	CAM_DIS_AUTOSRP		= 0x01000000,/* Disable autosave/restore ptrs */
97 	CAM_DIS_AUTODISC	= 0x02000000,/* Disable auto disconnect	      */
98 	CAM_TGT_CCB_AVAIL	= 0x04000000,/* Target CCB available	      */
99 	CAM_TGT_PHASE_MODE	= 0x08000000,/* The SIM runs in phase mode    */
100 	CAM_MSGB_VALID		= 0x10000000,/* Message buffer valid	      */
101 	CAM_STATUS_VALID	= 0x20000000,/* Status buffer valid	      */
102 	CAM_DATAB_VALID		= 0x40000000,/* Data buffer valid	      */
103 
104 /* Host target Mode flags */
105 	CAM_SEND_SENSE		= 0x08000000,/* Send sense data with status   */
106 	CAM_TERM_IO		= 0x10000000,/* Terminate I/O Message sup.    */
107 	CAM_DISCONNECT		= 0x20000000,/* Disconnects are mandatory     */
108 	CAM_SEND_STATUS		= 0x40000000,/* Send status after data phase  */
109 
110 	CAM_UNLOCKED		= 0x80000000 /* Call callback without lock.   */
111 } ccb_flags;
112 
113 typedef enum {
114 	CAM_USER_DATA_ADDR	= 0x00000002,/* Userspace data pointers */
115 	CAM_SG_FORMAT_IOVEC	= 0x00000004,/* iovec instead of busdma S/G*/
116 	CAM_UNMAPPED_BUF	= 0x00000008 /* use unmapped I/O */
117 } ccb_xflags;
118 
119 /* XPT Opcodes for xpt_action */
120 typedef enum {
121 /* Function code flags are bits greater than 0xff */
122 	XPT_FC_QUEUED		= 0x100,
123 				/* Non-immediate function code */
124 	XPT_FC_USER_CCB		= 0x200,
125 	XPT_FC_XPT_ONLY		= 0x400,
126 				/* Only for the transport layer device */
127 	XPT_FC_DEV_QUEUED	= 0x800 | XPT_FC_QUEUED,
128 				/* Passes through the device queues */
129 /* Common function commands: 0x00->0x0F */
130 	XPT_NOOP 		= 0x00,
131 				/* Execute Nothing */
132 	XPT_SCSI_IO		= 0x01 | XPT_FC_DEV_QUEUED,
133 				/* Execute the requested I/O operation */
134 	XPT_GDEV_TYPE		= 0x02,
135 				/* Get type information for specified device */
136 	XPT_GDEVLIST		= 0x03,
137 				/* Get a list of peripheral devices */
138 	XPT_PATH_INQ		= 0x04,
139 				/* Path routing inquiry */
140 	XPT_REL_SIMQ		= 0x05,
141 				/* Release a frozen device queue */
142 	XPT_SASYNC_CB		= 0x06,
143 				/* Set Asynchronous Callback Parameters */
144 	XPT_SDEV_TYPE		= 0x07,
145 				/* Set device type information */
146 	XPT_SCAN_BUS		= 0x08 | XPT_FC_QUEUED | XPT_FC_USER_CCB
147 				       | XPT_FC_XPT_ONLY,
148 				/* (Re)Scan the SCSI Bus */
149 	XPT_DEV_MATCH		= 0x09 | XPT_FC_XPT_ONLY,
150 				/* Get EDT entries matching the given pattern */
151 	XPT_DEBUG		= 0x0a,
152 				/* Turn on debugging for a bus, target or lun */
153 	XPT_PATH_STATS		= 0x0b,
154 				/* Path statistics (error counts, etc.) */
155 	XPT_GDEV_STATS		= 0x0c,
156 				/* Device statistics (error counts, etc.) */
157 	XPT_DEV_ADVINFO		= 0x0e,
158 				/* Get/Set Device advanced information */
159 	XPT_ASYNC		= 0x0f | XPT_FC_QUEUED | XPT_FC_USER_CCB
160 				       | XPT_FC_XPT_ONLY,
161 				/* Asynchronous event */
162 /* SCSI Control Functions: 0x10->0x1F */
163 	XPT_ABORT		= 0x10,
164 				/* Abort the specified CCB */
165 	XPT_RESET_BUS		= 0x11 | XPT_FC_XPT_ONLY,
166 				/* Reset the specified SCSI bus */
167 	XPT_RESET_DEV		= 0x12 | XPT_FC_DEV_QUEUED,
168 				/* Bus Device Reset the specified SCSI device */
169 	XPT_TERM_IO		= 0x13,
170 				/* Terminate the I/O process */
171 	XPT_SCAN_LUN		= 0x14 | XPT_FC_QUEUED | XPT_FC_USER_CCB
172 				       | XPT_FC_XPT_ONLY,
173 				/* Scan Logical Unit */
174 	XPT_GET_TRAN_SETTINGS	= 0x15,
175 				/*
176 				 * Get default/user transfer settings
177 				 * for the target
178 				 */
179 	XPT_SET_TRAN_SETTINGS	= 0x16,
180 				/*
181 				 * Set transfer rate/width
182 				 * negotiation settings
183 				 */
184 	XPT_CALC_GEOMETRY	= 0x17,
185 				/*
186 				 * Calculate the geometry parameters for
187 				 * a device give the sector size and
188 				 * volume size.
189 				 */
190 	XPT_ATA_IO		= 0x18 | XPT_FC_DEV_QUEUED,
191 				/* Execute the requested ATA I/O operation */
192 
193 	XPT_GET_SIM_KNOB_OLD	= 0x18, /* Compat only */
194 
195 	XPT_SET_SIM_KNOB	= 0x19,
196 				/*
197 				 * Set SIM specific knob values.
198 				 */
199 
200 	XPT_GET_SIM_KNOB	= 0x1a,
201 				/*
202 				 * Get SIM specific knob values.
203 				 */
204 
205 	XPT_SMP_IO		= 0x1b | XPT_FC_DEV_QUEUED,
206 				/* Serial Management Protocol */
207 
208 	XPT_NVME_IO		= 0x1c | XPT_FC_DEV_QUEUED,
209 				/* Execiute the requestred NVMe I/O operation */
210 
211 	XPT_MMCSD_IO		= 0x1d | XPT_FC_DEV_QUEUED,
212 				/* Placeholder for MMC / SD / SDIO I/O stuff */
213 
214 	XPT_SCAN_TGT		= 0x1E | XPT_FC_QUEUED | XPT_FC_USER_CCB
215 				       | XPT_FC_XPT_ONLY,
216 				/* Scan Target */
217 
218 /* HBA engine commands 0x20->0x2F */
219 	XPT_ENG_INQ		= 0x20 | XPT_FC_XPT_ONLY,
220 				/* HBA engine feature inquiry */
221 	XPT_ENG_EXEC		= 0x21 | XPT_FC_DEV_QUEUED,
222 				/* HBA execute engine request */
223 
224 /* Target mode commands: 0x30->0x3F */
225 	XPT_EN_LUN		= 0x30,
226 				/* Enable LUN as a target */
227 	XPT_TARGET_IO		= 0x31 | XPT_FC_DEV_QUEUED,
228 				/* Execute target I/O request */
229 	XPT_ACCEPT_TARGET_IO	= 0x32 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
230 				/* Accept Host Target Mode CDB */
231 	XPT_CONT_TARGET_IO	= 0x33 | XPT_FC_DEV_QUEUED,
232 				/* Continue Host Target I/O Connection */
233 	XPT_IMMED_NOTIFY	= 0x34 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
234 				/* Notify Host Target driver of event (obsolete) */
235 	XPT_NOTIFY_ACK		= 0x35,
236 				/* Acknowledgement of event (obsolete) */
237 	XPT_IMMEDIATE_NOTIFY	= 0x36 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
238 				/* Notify Host Target driver of event */
239 	XPT_NOTIFY_ACKNOWLEDGE	= 0x37 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
240 				/* Acknowledgement of event */
241 	XPT_REPROBE_LUN		= 0x38 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
242 				/* Query device capacity and notify GEOM */
243 
244 /* Vendor Unique codes: 0x80->0x8F */
245 	XPT_VUNIQUE		= 0x80
246 } xpt_opcode;
247 
248 #define XPT_FC_GROUP_MASK		0xF0
249 #define XPT_FC_GROUP(op) ((op) & XPT_FC_GROUP_MASK)
250 #define XPT_FC_GROUP_COMMON		0x00
251 #define XPT_FC_GROUP_SCSI_CONTROL	0x10
252 #define XPT_FC_GROUP_HBA_ENGINE		0x20
253 #define XPT_FC_GROUP_TMODE		0x30
254 #define XPT_FC_GROUP_VENDOR_UNIQUE	0x80
255 
256 #define XPT_FC_IS_DEV_QUEUED(ccb) 	\
257     (((ccb)->ccb_h.func_code & XPT_FC_DEV_QUEUED) == XPT_FC_DEV_QUEUED)
258 #define XPT_FC_IS_QUEUED(ccb) 	\
259     (((ccb)->ccb_h.func_code & XPT_FC_QUEUED) != 0)
260 
261 typedef enum {
262 	PROTO_UNKNOWN,
263 	PROTO_UNSPECIFIED,
264 	PROTO_SCSI,	/* Small Computer System Interface */
265 	PROTO_ATA,	/* AT Attachment */
266 	PROTO_ATAPI,	/* AT Attachment Packetized Interface */
267 	PROTO_SATAPM,	/* SATA Port Multiplier */
268 	PROTO_SEMB,	/* SATA Enclosure Management Bridge */
269 	PROTO_NVME,	/* NVME */
270 } cam_proto;
271 
272 typedef enum {
273 	XPORT_UNKNOWN,
274 	XPORT_UNSPECIFIED,
275 	XPORT_SPI,	/* SCSI Parallel Interface */
276 	XPORT_FC,	/* Fiber Channel */
277 	XPORT_SSA,	/* Serial Storage Architecture */
278 	XPORT_USB,	/* Universal Serial Bus */
279 	XPORT_PPB,	/* Parallel Port Bus */
280 	XPORT_ATA,	/* AT Attachment */
281 	XPORT_SAS,	/* Serial Attached SCSI */
282 	XPORT_SATA,	/* Serial AT Attachment */
283 	XPORT_ISCSI,	/* iSCSI */
284 	XPORT_SRP,	/* SCSI RDMA Protocol */
285 	XPORT_NVME,	/* NVMe over PCIe */
286 } cam_xport;
287 
288 #define XPORT_IS_ATA(t)		((t) == XPORT_ATA || (t) == XPORT_SATA)
289 #define XPORT_IS_SCSI(t)	((t) != XPORT_UNKNOWN && \
290 				 (t) != XPORT_UNSPECIFIED && \
291 				 !XPORT_IS_ATA(t))
292 #define XPORT_DEVSTAT_TYPE(t)	(XPORT_IS_ATA(t) ? DEVSTAT_TYPE_IF_IDE : \
293 				 XPORT_IS_SCSI(t) ? DEVSTAT_TYPE_IF_SCSI : \
294 				 DEVSTAT_TYPE_IF_OTHER)
295 
296 #define PROTO_VERSION_UNKNOWN (UINT_MAX - 1)
297 #define PROTO_VERSION_UNSPECIFIED UINT_MAX
298 #define XPORT_VERSION_UNKNOWN (UINT_MAX - 1)
299 #define XPORT_VERSION_UNSPECIFIED UINT_MAX
300 
301 typedef union {
302 	LIST_ENTRY(ccb_hdr) le;
303 	SLIST_ENTRY(ccb_hdr) sle;
304 	TAILQ_ENTRY(ccb_hdr) tqe;
305 	STAILQ_ENTRY(ccb_hdr) stqe;
306 } camq_entry;
307 
308 typedef union {
309 	void		*ptr;
310 	u_long		field;
311 	u_int8_t	bytes[sizeof(uintptr_t)];
312 } ccb_priv_entry;
313 
314 typedef union {
315 	ccb_priv_entry	entries[CCB_PERIPH_PRIV_SIZE];
316 	u_int8_t	bytes[CCB_PERIPH_PRIV_SIZE * sizeof(ccb_priv_entry)];
317 } ccb_ppriv_area;
318 
319 typedef union {
320 	ccb_priv_entry	entries[CCB_SIM_PRIV_SIZE];
321 	u_int8_t	bytes[CCB_SIM_PRIV_SIZE * sizeof(ccb_priv_entry)];
322 } ccb_spriv_area;
323 
324 typedef struct {
325 	struct timeval	*etime;
326 	uintptr_t	sim_data;
327 	uintptr_t	periph_data;
328 } ccb_qos_area;
329 
330 struct ccb_hdr {
331 	cam_pinfo	pinfo;		/* Info for priority scheduling */
332 	camq_entry	xpt_links;	/* For chaining in the XPT layer */
333 	camq_entry	sim_links;	/* For chaining in the SIM layer */
334 	camq_entry	periph_links;	/* For chaining in the type driver */
335 	u_int32_t	retry_count;
336 	void		(*cbfcnp)(struct cam_periph *, union ccb *);
337 					/* Callback on completion function */
338 	xpt_opcode	func_code;	/* XPT function code */
339 	u_int32_t	status;		/* Status returned by CAM subsystem */
340 	struct		cam_path *path;	/* Compiled path for this ccb */
341 	path_id_t	path_id;	/* Path ID for the request */
342 	target_id_t	target_id;	/* Target device ID */
343 	lun_id_t	target_lun;	/* Target LUN number */
344 	u_int32_t	flags;		/* ccb_flags */
345 	u_int32_t	xflags;		/* Extended flags */
346 	ccb_ppriv_area	periph_priv;
347 	ccb_spriv_area	sim_priv;
348 	ccb_qos_area	qos;
349 	u_int32_t	timeout;	/* Hard timeout value in mseconds */
350 	struct timeval	softtimeout;	/* Soft timeout value in sec + usec */
351 };
352 
353 /* Get Device Information CCB */
354 struct ccb_getdev {
355 	struct	  ccb_hdr ccb_h;
356 	cam_proto protocol;
357 	struct scsi_inquiry_data inq_data;
358 	struct ata_params ident_data;
359 	u_int8_t  serial_num[252];
360 	u_int8_t  inq_flags;
361 	u_int8_t  serial_num_len;
362 	const struct nvme_controller_data	*nvme_cdata;
363 	const struct nvme_namespace_data	*nvme_data;
364 };
365 
366 /* Device Statistics CCB */
367 struct ccb_getdevstats {
368 	struct	ccb_hdr	ccb_h;
369 	int	dev_openings;	/* Space left for more work on device*/
370 	int	dev_active;	/* Transactions running on the device */
371 	int	allocated;	/* CCBs allocated for the device */
372 	int	queued;		/* CCBs queued to be sent to the device */
373 	int	held;		/*
374 				 * CCBs held by peripheral drivers
375 				 * for this device
376 				 */
377 	int	maxtags;	/*
378 				 * Boundary conditions for number of
379 				 * tagged operations
380 				 */
381 	int	mintags;
382 	struct	timeval last_reset;	/* Time of last bus reset/loop init */
383 };
384 
385 typedef enum {
386 	CAM_GDEVLIST_LAST_DEVICE,
387 	CAM_GDEVLIST_LIST_CHANGED,
388 	CAM_GDEVLIST_MORE_DEVS,
389 	CAM_GDEVLIST_ERROR
390 } ccb_getdevlist_status_e;
391 
392 struct ccb_getdevlist {
393 	struct ccb_hdr		ccb_h;
394 	char 			periph_name[DEV_IDLEN];
395 	u_int32_t		unit_number;
396 	unsigned int		generation;
397 	u_int32_t		index;
398 	ccb_getdevlist_status_e	status;
399 };
400 
401 typedef enum {
402 	PERIPH_MATCH_NONE	= 0x000,
403 	PERIPH_MATCH_PATH	= 0x001,
404 	PERIPH_MATCH_TARGET	= 0x002,
405 	PERIPH_MATCH_LUN	= 0x004,
406 	PERIPH_MATCH_NAME	= 0x008,
407 	PERIPH_MATCH_UNIT	= 0x010,
408 	PERIPH_MATCH_ANY	= 0x01f
409 } periph_pattern_flags;
410 
411 struct periph_match_pattern {
412 	char			periph_name[DEV_IDLEN];
413 	u_int32_t		unit_number;
414 	path_id_t		path_id;
415 	target_id_t		target_id;
416 	lun_id_t		target_lun;
417 	periph_pattern_flags	flags;
418 };
419 
420 typedef enum {
421 	DEV_MATCH_NONE		= 0x000,
422 	DEV_MATCH_PATH		= 0x001,
423 	DEV_MATCH_TARGET	= 0x002,
424 	DEV_MATCH_LUN		= 0x004,
425 	DEV_MATCH_INQUIRY	= 0x008,
426 	DEV_MATCH_DEVID		= 0x010,
427 	DEV_MATCH_ANY		= 0x00f
428 } dev_pattern_flags;
429 
430 struct device_id_match_pattern {
431 	uint8_t id_len;
432 	uint8_t id[256];
433 };
434 
435 struct device_match_pattern {
436 	path_id_t					path_id;
437 	target_id_t					target_id;
438 	lun_id_t					target_lun;
439 	dev_pattern_flags				flags;
440 	union {
441 		struct scsi_static_inquiry_pattern	inq_pat;
442 		struct device_id_match_pattern		devid_pat;
443 	} data;
444 };
445 
446 typedef enum {
447 	BUS_MATCH_NONE		= 0x000,
448 	BUS_MATCH_PATH		= 0x001,
449 	BUS_MATCH_NAME		= 0x002,
450 	BUS_MATCH_UNIT		= 0x004,
451 	BUS_MATCH_BUS_ID	= 0x008,
452 	BUS_MATCH_ANY		= 0x00f
453 } bus_pattern_flags;
454 
455 struct bus_match_pattern {
456 	path_id_t		path_id;
457 	char			dev_name[DEV_IDLEN];
458 	u_int32_t		unit_number;
459 	u_int32_t		bus_id;
460 	bus_pattern_flags	flags;
461 };
462 
463 union match_pattern {
464 	struct periph_match_pattern	periph_pattern;
465 	struct device_match_pattern	device_pattern;
466 	struct bus_match_pattern	bus_pattern;
467 };
468 
469 typedef enum {
470 	DEV_MATCH_PERIPH,
471 	DEV_MATCH_DEVICE,
472 	DEV_MATCH_BUS
473 } dev_match_type;
474 
475 struct dev_match_pattern {
476 	dev_match_type		type;
477 	union match_pattern	pattern;
478 };
479 
480 struct periph_match_result {
481 	char			periph_name[DEV_IDLEN];
482 	u_int32_t		unit_number;
483 	path_id_t		path_id;
484 	target_id_t		target_id;
485 	lun_id_t		target_lun;
486 };
487 
488 typedef enum {
489 	DEV_RESULT_NOFLAG		= 0x00,
490 	DEV_RESULT_UNCONFIGURED		= 0x01
491 } dev_result_flags;
492 
493 struct device_match_result {
494 	path_id_t			path_id;
495 	target_id_t			target_id;
496 	lun_id_t			target_lun;
497 	cam_proto			protocol;
498 	struct scsi_inquiry_data	inq_data;
499 	struct ata_params		ident_data;
500 	dev_result_flags		flags;
501 };
502 
503 struct bus_match_result {
504 	path_id_t	path_id;
505 	char		dev_name[DEV_IDLEN];
506 	u_int32_t	unit_number;
507 	u_int32_t	bus_id;
508 };
509 
510 union match_result {
511 	struct periph_match_result	periph_result;
512 	struct device_match_result	device_result;
513 	struct bus_match_result		bus_result;
514 };
515 
516 struct dev_match_result {
517 	dev_match_type		type;
518 	union match_result	result;
519 };
520 
521 typedef enum {
522 	CAM_DEV_MATCH_LAST,
523 	CAM_DEV_MATCH_MORE,
524 	CAM_DEV_MATCH_LIST_CHANGED,
525 	CAM_DEV_MATCH_SIZE_ERROR,
526 	CAM_DEV_MATCH_ERROR
527 } ccb_dev_match_status;
528 
529 typedef enum {
530 	CAM_DEV_POS_NONE	= 0x000,
531 	CAM_DEV_POS_BUS		= 0x001,
532 	CAM_DEV_POS_TARGET	= 0x002,
533 	CAM_DEV_POS_DEVICE	= 0x004,
534 	CAM_DEV_POS_PERIPH	= 0x008,
535 	CAM_DEV_POS_PDPTR	= 0x010,
536 	CAM_DEV_POS_TYPEMASK	= 0xf00,
537 	CAM_DEV_POS_EDT		= 0x100,
538 	CAM_DEV_POS_PDRV	= 0x200
539 } dev_pos_type;
540 
541 struct ccb_dm_cookie {
542 	void 	*bus;
543 	void	*target;
544 	void	*device;
545 	void	*periph;
546 	void	*pdrv;
547 };
548 
549 struct ccb_dev_position {
550 	u_int			generations[4];
551 #define	CAM_BUS_GENERATION	0x00
552 #define CAM_TARGET_GENERATION	0x01
553 #define CAM_DEV_GENERATION	0x02
554 #define CAM_PERIPH_GENERATION	0x03
555 	dev_pos_type		position_type;
556 	struct ccb_dm_cookie	cookie;
557 };
558 
559 struct ccb_dev_match {
560 	struct ccb_hdr			ccb_h;
561 	ccb_dev_match_status		status;
562 	u_int32_t			num_patterns;
563 	u_int32_t			pattern_buf_len;
564 	struct dev_match_pattern	*patterns;
565 	u_int32_t			num_matches;
566 	u_int32_t			match_buf_len;
567 	struct dev_match_result		*matches;
568 	struct ccb_dev_position		pos;
569 };
570 
571 /*
572  * Definitions for the path inquiry CCB fields.
573  */
574 #define CAM_VERSION	0x19	/* Hex value for current version */
575 
576 typedef enum {
577 	PI_MDP_ABLE	= 0x80,	/* Supports MDP message */
578 	PI_WIDE_32	= 0x40,	/* Supports 32 bit wide SCSI */
579 	PI_WIDE_16	= 0x20, /* Supports 16 bit wide SCSI */
580 	PI_SDTR_ABLE	= 0x10,	/* Supports SDTR message */
581 	PI_LINKED_CDB	= 0x08, /* Supports linked CDBs */
582 	PI_SATAPM	= 0x04,	/* Supports SATA PM */
583 	PI_TAG_ABLE	= 0x02,	/* Supports tag queue messages */
584 	PI_SOFT_RST	= 0x01	/* Supports soft reset alternative */
585 } pi_inqflag;
586 
587 typedef enum {
588 	PIT_PROCESSOR	= 0x80,	/* Target mode processor mode */
589 	PIT_PHASE	= 0x40,	/* Target mode phase cog. mode */
590 	PIT_DISCONNECT	= 0x20,	/* Disconnects supported in target mode */
591 	PIT_TERM_IO	= 0x10,	/* Terminate I/O message supported in TM */
592 	PIT_GRP_6	= 0x08,	/* Group 6 commands supported */
593 	PIT_GRP_7	= 0x04	/* Group 7 commands supported */
594 } pi_tmflag;
595 
596 typedef enum {
597 	PIM_ATA_EXT	= 0x200,/* ATA requests can understand ata_ext requests */
598 	PIM_EXTLUNS	= 0x100,/* 64bit extended LUNs supported */
599 	PIM_SCANHILO	= 0x80,	/* Bus scans from high ID to low ID */
600 	PIM_NOREMOVE	= 0x40,	/* Removeable devices not included in scan */
601 	PIM_NOINITIATOR	= 0x20,	/* Initiator role not supported. */
602 	PIM_NOBUSRESET	= 0x10,	/* User has disabled initial BUS RESET */
603 	PIM_NO_6_BYTE	= 0x08,	/* Do not send 6-byte commands */
604 	PIM_SEQSCAN	= 0x04,	/* Do bus scans sequentially, not in parallel */
605 	PIM_UNMAPPED	= 0x02,
606 	PIM_NOSCAN	= 0x01	/* SIM does its own scanning */
607 } pi_miscflag;
608 
609 /* Path Inquiry CCB */
610 struct ccb_pathinq_settings_spi {
611 	u_int8_t ppr_options;
612 };
613 
614 struct ccb_pathinq_settings_fc {
615 	u_int64_t wwnn;		/* world wide node name */
616 	u_int64_t wwpn;		/* world wide port name */
617 	u_int32_t port;		/* 24 bit port id, if known */
618 	u_int32_t bitrate;	/* Mbps */
619 };
620 
621 struct ccb_pathinq_settings_sas {
622 	u_int32_t bitrate;	/* Mbps */
623 };
624 
625 struct ccb_pathinq_settings_nvme {
626 	uint16_t nsid;		/* Namespace ID for this path */
627 };
628 
629 #define	PATHINQ_SETTINGS_SIZE	128
630 
631 struct ccb_pathinq {
632 	struct 	    ccb_hdr ccb_h;
633 	u_int8_t    version_num;	/* Version number for the SIM/HBA */
634 	u_int8_t    hba_inquiry;	/* Mimic of INQ byte 7 for the HBA */
635 	u_int16_t   target_sprt;	/* Flags for target mode support */
636 	u_int32_t   hba_misc;		/* Misc HBA features */
637 	u_int16_t   hba_eng_cnt;	/* HBA engine count */
638 					/* Vendor Unique capabilities */
639 	u_int8_t    vuhba_flags[VUHBALEN];
640 	u_int32_t   max_target;		/* Maximum supported Target */
641 	u_int32_t   max_lun;		/* Maximum supported Lun */
642 	u_int32_t   async_flags;	/* Installed Async handlers */
643 	path_id_t   hpath_id;		/* Highest Path ID in the subsystem */
644 	target_id_t initiator_id;	/* ID of the HBA on the SCSI bus */
645 	char	    sim_vid[SIM_IDLEN];	/* Vendor ID of the SIM */
646 	char	    hba_vid[HBA_IDLEN];	/* Vendor ID of the HBA */
647 	char 	    dev_name[DEV_IDLEN];/* Device name for SIM */
648 	u_int32_t   unit_number;	/* Unit number for SIM */
649 	u_int32_t   bus_id;		/* Bus ID for SIM */
650 	u_int32_t   base_transfer_speed;/* Base bus speed in KB/sec */
651 	cam_proto   protocol;
652 	u_int	    protocol_version;
653 	cam_xport   transport;
654 	u_int	    transport_version;
655 	union {
656 		struct ccb_pathinq_settings_spi spi;
657 		struct ccb_pathinq_settings_fc fc;
658 		struct ccb_pathinq_settings_sas sas;
659 		struct ccb_pathinq_settings_nvme nvme;
660 		char ccb_pathinq_settings_opaque[PATHINQ_SETTINGS_SIZE];
661 	} xport_specific;
662 	u_int		maxio;		/* Max supported I/O size, in bytes. */
663 	u_int16_t	hba_vendor;	/* HBA vendor ID */
664 	u_int16_t	hba_device;	/* HBA device ID */
665 	u_int16_t	hba_subvendor;	/* HBA subvendor ID */
666 	u_int16_t	hba_subdevice;	/* HBA subdevice ID */
667 };
668 
669 /* Path Statistics CCB */
670 struct ccb_pathstats {
671 	struct	ccb_hdr	ccb_h;
672 	struct	timeval last_reset;	/* Time of last bus reset/loop init */
673 };
674 
675 typedef enum {
676 	SMP_FLAG_NONE		= 0x00,
677 	SMP_FLAG_REQ_SG		= 0x01,
678 	SMP_FLAG_RSP_SG		= 0x02
679 } ccb_smp_pass_flags;
680 
681 /*
682  * Serial Management Protocol CCB
683  * XXX Currently the semantics for this CCB are that it is executed either
684  * by the addressed device, or that device's parent (i.e. an expander for
685  * any device on an expander) if the addressed device doesn't support SMP.
686  * Later, once we have the ability to probe SMP-only devices and put them
687  * in CAM's topology, the CCB will only be executed by the addressed device
688  * if possible.
689  */
690 struct ccb_smpio {
691 	struct ccb_hdr		ccb_h;
692 	uint8_t			*smp_request;
693 	int			smp_request_len;
694 	uint16_t		smp_request_sglist_cnt;
695 	uint8_t			*smp_response;
696 	int			smp_response_len;
697 	uint16_t		smp_response_sglist_cnt;
698 	ccb_smp_pass_flags	flags;
699 };
700 
701 typedef union {
702 	u_int8_t *sense_ptr;		/*
703 					 * Pointer to storage
704 					 * for sense information
705 					 */
706 	                                /* Storage Area for sense information */
707 	struct	 scsi_sense_data sense_buf;
708 } sense_t;
709 
710 typedef union {
711 	u_int8_t  *cdb_ptr;		/* Pointer to the CDB bytes to send */
712 					/* Area for the CDB send */
713 	u_int8_t  cdb_bytes[IOCDBLEN];
714 } cdb_t;
715 
716 /*
717  * SCSI I/O Request CCB used for the XPT_SCSI_IO and XPT_CONT_TARGET_IO
718  * function codes.
719  */
720 struct ccb_scsiio {
721 	struct	   ccb_hdr ccb_h;
722 	union	   ccb *next_ccb;	/* Ptr for next CCB for action */
723 	u_int8_t   *req_map;		/* Ptr to mapping info */
724 	u_int8_t   *data_ptr;		/* Ptr to the data buf/SG list */
725 	u_int32_t  dxfer_len;		/* Data transfer length */
726 					/* Autosense storage */
727 	struct     scsi_sense_data sense_data;
728 	u_int8_t   sense_len;		/* Number of bytes to autosense */
729 	u_int8_t   cdb_len;		/* Number of bytes for the CDB */
730 	u_int16_t  sglist_cnt;		/* Number of SG list entries */
731 	u_int8_t   scsi_status;		/* Returned SCSI status */
732 	u_int8_t   sense_resid;		/* Autosense resid length: 2's comp */
733 	u_int32_t  resid;		/* Transfer residual length: 2's comp */
734 	cdb_t	   cdb_io;		/* Union for CDB bytes/pointer */
735 	u_int8_t   *msg_ptr;		/* Pointer to the message buffer */
736 	u_int16_t  msg_len;		/* Number of bytes for the Message */
737 	u_int8_t   tag_action;		/* What to do for tag queueing */
738 	/*
739 	 * The tag action should be either the define below (to send a
740 	 * non-tagged transaction) or one of the defined scsi tag messages
741 	 * from scsi_message.h.
742 	 */
743 #define		CAM_TAG_ACTION_NONE	0x00
744 	u_int	   tag_id;		/* tag id from initator (target mode) */
745 	u_int	   init_id;		/* initiator id of who selected */
746 };
747 
748 static __inline uint8_t *
749 scsiio_cdb_ptr(struct ccb_scsiio *ccb)
750 {
751 	return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ?
752 	    ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes);
753 }
754 
755 /*
756  * ATA I/O Request CCB used for the XPT_ATA_IO function code.
757  */
758 struct ccb_ataio {
759 	struct	   ccb_hdr ccb_h;
760 	union	   ccb *next_ccb;	/* Ptr for next CCB for action */
761 	struct ata_cmd	cmd;		/* ATA command register set */
762 	struct ata_res	res;		/* ATA result register set */
763 	u_int8_t   *data_ptr;		/* Ptr to the data buf/SG list */
764 	u_int32_t  dxfer_len;		/* Data transfer length */
765 	u_int32_t  resid;		/* Transfer residual length: 2's comp */
766 	u_int8_t   ata_flags;		/* Flags for the rest of the buffer */
767 #define ATA_FLAG_AUX 0x1
768 	uint32_t   aux;
769 	uint32_t   unused;
770 };
771 
772 struct ccb_accept_tio {
773 	struct	   ccb_hdr ccb_h;
774 	cdb_t	   cdb_io;		/* Union for CDB bytes/pointer */
775 	u_int8_t   cdb_len;		/* Number of bytes for the CDB */
776 	u_int8_t   tag_action;		/* What to do for tag queueing */
777 	u_int8_t   sense_len;		/* Number of bytes of Sense Data */
778 	u_int      tag_id;		/* tag id from initator (target mode) */
779 	u_int      init_id;		/* initiator id of who selected */
780 	struct     scsi_sense_data sense_data;
781 };
782 
783 /* Release SIM Queue */
784 struct ccb_relsim {
785 	struct ccb_hdr ccb_h;
786 	u_int32_t      release_flags;
787 #define RELSIM_ADJUST_OPENINGS		0x01
788 #define RELSIM_RELEASE_AFTER_TIMEOUT	0x02
789 #define RELSIM_RELEASE_AFTER_CMDCMPLT	0x04
790 #define RELSIM_RELEASE_AFTER_QEMPTY	0x08
791 	u_int32_t      openings;
792 	u_int32_t      release_timeout;	/* Abstract argument. */
793 	u_int32_t      qfrozen_cnt;
794 };
795 
796 /*
797  * NVMe I/O Request CCB used for the XPT_NVME_IO function code.
798  */
799 struct ccb_nvmeio {
800 	struct	   ccb_hdr ccb_h;
801 	union	   ccb *next_ccb;	/* Ptr for next CCB for action */
802 	struct nvme_command cmd;	/* NVME command, per NVME standard */
803 	struct nvme_completion cpl;	/* NVME completion, per NVME standard */
804 	uint8_t   *data_ptr;		/* Ptr to the data buf/SG list */
805 	uint32_t  dxfer_len;		/* Data transfer length */
806 	uint32_t  resid;		/* Transfer residual length: 2's comp unused ?*/
807 };
808 
809 /*
810  * Definitions for the asynchronous callback CCB fields.
811  */
812 typedef enum {
813 	AC_UNIT_ATTENTION	= 0x4000,/* Device reported UNIT ATTENTION */
814 	AC_ADVINFO_CHANGED	= 0x2000,/* Advance info might have changes */
815 	AC_CONTRACT		= 0x1000,/* A contractual callback */
816 	AC_GETDEV_CHANGED	= 0x800,/* Getdev info might have changed */
817 	AC_INQ_CHANGED		= 0x400,/* Inquiry info might have changed */
818 	AC_TRANSFER_NEG		= 0x200,/* New transfer settings in effect */
819 	AC_LOST_DEVICE		= 0x100,/* A device went away */
820 	AC_FOUND_DEVICE		= 0x080,/* A new device was found */
821 	AC_PATH_DEREGISTERED	= 0x040,/* A path has de-registered */
822 	AC_PATH_REGISTERED	= 0x020,/* A new path has been registered */
823 	AC_SENT_BDR		= 0x010,/* A BDR message was sent to target */
824 	AC_SCSI_AEN		= 0x008,/* A SCSI AEN has been received */
825 	AC_UNSOL_RESEL		= 0x002,/* Unsolicited reselection occurred */
826 	AC_BUS_RESET		= 0x001	/* A SCSI bus reset occurred */
827 } ac_code;
828 
829 typedef void ac_callback_t (void *softc, u_int32_t code,
830 			    struct cam_path *path, void *args);
831 
832 /*
833  * Generic Asynchronous callbacks.
834  *
835  * Generic arguments passed bac which are then interpreted between a per-system
836  * contract number.
837  */
838 #define	AC_CONTRACT_DATA_MAX (128 - sizeof (u_int64_t))
839 struct ac_contract {
840 	u_int64_t	contract_number;
841 	u_int8_t	contract_data[AC_CONTRACT_DATA_MAX];
842 };
843 
844 #define	AC_CONTRACT_DEV_CHG	1
845 struct ac_device_changed {
846 	u_int64_t	wwpn;
847 	u_int32_t	port;
848 	target_id_t	target;
849 	u_int8_t	arrived;
850 };
851 
852 /* Set Asynchronous Callback CCB */
853 struct ccb_setasync {
854 	struct ccb_hdr	 ccb_h;
855 	u_int32_t	 event_enable;	/* Async Event enables */
856 	ac_callback_t	*callback;
857 	void		*callback_arg;
858 };
859 
860 /* Set Device Type CCB */
861 struct ccb_setdev {
862 	struct	   ccb_hdr ccb_h;
863 	u_int8_t   dev_type;	/* Value for dev type field in EDT */
864 };
865 
866 /* SCSI Control Functions */
867 
868 /* Abort XPT request CCB */
869 struct ccb_abort {
870 	struct 	ccb_hdr ccb_h;
871 	union	ccb *abort_ccb;	/* Pointer to CCB to abort */
872 };
873 
874 /* Reset SCSI Bus CCB */
875 struct ccb_resetbus {
876 	struct	ccb_hdr ccb_h;
877 };
878 
879 /* Reset SCSI Device CCB */
880 struct ccb_resetdev {
881 	struct	ccb_hdr ccb_h;
882 };
883 
884 /* Terminate I/O Process Request CCB */
885 struct ccb_termio {
886 	struct	ccb_hdr ccb_h;
887 	union	ccb *termio_ccb;	/* Pointer to CCB to terminate */
888 };
889 
890 typedef enum {
891 	CTS_TYPE_CURRENT_SETTINGS,
892 	CTS_TYPE_USER_SETTINGS
893 } cts_type;
894 
895 struct ccb_trans_settings_scsi
896 {
897 	u_int	valid;	/* Which fields to honor */
898 #define	CTS_SCSI_VALID_TQ		0x01
899 	u_int	flags;
900 #define	CTS_SCSI_FLAGS_TAG_ENB		0x01
901 };
902 
903 struct ccb_trans_settings_ata
904 {
905 	u_int	valid;	/* Which fields to honor */
906 #define	CTS_ATA_VALID_TQ		0x01
907 	u_int	flags;
908 #define	CTS_ATA_FLAGS_TAG_ENB		0x01
909 };
910 
911 struct ccb_trans_settings_spi
912 {
913 	u_int	  valid;	/* Which fields to honor */
914 #define	CTS_SPI_VALID_SYNC_RATE		0x01
915 #define	CTS_SPI_VALID_SYNC_OFFSET	0x02
916 #define	CTS_SPI_VALID_BUS_WIDTH		0x04
917 #define	CTS_SPI_VALID_DISC		0x08
918 #define CTS_SPI_VALID_PPR_OPTIONS	0x10
919 	u_int	flags;
920 #define	CTS_SPI_FLAGS_DISC_ENB		0x01
921 	u_int	sync_period;
922 	u_int	sync_offset;
923 	u_int	bus_width;
924 	u_int	ppr_options;
925 };
926 
927 struct ccb_trans_settings_fc {
928 	u_int     	valid;		/* Which fields to honor */
929 #define	CTS_FC_VALID_WWNN		0x8000
930 #define	CTS_FC_VALID_WWPN		0x4000
931 #define	CTS_FC_VALID_PORT		0x2000
932 #define	CTS_FC_VALID_SPEED		0x1000
933 	u_int64_t	wwnn;		/* world wide node name */
934 	u_int64_t 	wwpn;		/* world wide port name */
935 	u_int32_t 	port;		/* 24 bit port id, if known */
936 	u_int32_t 	bitrate;	/* Mbps */
937 };
938 
939 struct ccb_trans_settings_sas {
940 	u_int     	valid;		/* Which fields to honor */
941 #define	CTS_SAS_VALID_SPEED		0x1000
942 	u_int32_t 	bitrate;	/* Mbps */
943 };
944 
945 struct ccb_trans_settings_pata {
946 	u_int     	valid;		/* Which fields to honor */
947 #define	CTS_ATA_VALID_MODE		0x01
948 #define	CTS_ATA_VALID_BYTECOUNT		0x02
949 #define	CTS_ATA_VALID_ATAPI		0x20
950 #define	CTS_ATA_VALID_CAPS		0x40
951 	int		mode;		/* Mode */
952 	u_int 		bytecount;	/* Length of PIO transaction */
953 	u_int 		atapi;		/* Length of ATAPI CDB */
954 	u_int 		caps;		/* Device and host SATA caps. */
955 #define	CTS_ATA_CAPS_H			0x0000ffff
956 #define	CTS_ATA_CAPS_H_DMA48		0x00000001 /* 48-bit DMA */
957 #define	CTS_ATA_CAPS_D			0xffff0000
958 };
959 
960 struct ccb_trans_settings_sata {
961 	u_int     	valid;		/* Which fields to honor */
962 #define	CTS_SATA_VALID_MODE		0x01
963 #define	CTS_SATA_VALID_BYTECOUNT	0x02
964 #define	CTS_SATA_VALID_REVISION		0x04
965 #define	CTS_SATA_VALID_PM		0x08
966 #define	CTS_SATA_VALID_TAGS		0x10
967 #define	CTS_SATA_VALID_ATAPI		0x20
968 #define	CTS_SATA_VALID_CAPS		0x40
969 	int		mode;		/* Legacy PATA mode */
970 	u_int 		bytecount;	/* Length of PIO transaction */
971 	int		revision;	/* SATA revision */
972 	u_int 		pm_present;	/* PM is present (XPT->SIM) */
973 	u_int 		tags;		/* Number of allowed tags */
974 	u_int 		atapi;		/* Length of ATAPI CDB */
975 	u_int 		caps;		/* Device and host SATA caps. */
976 #define	CTS_SATA_CAPS_H			0x0000ffff
977 #define	CTS_SATA_CAPS_H_PMREQ		0x00000001
978 #define	CTS_SATA_CAPS_H_APST		0x00000002
979 #define	CTS_SATA_CAPS_H_DMAAA		0x00000010 /* Auto-activation */
980 #define	CTS_SATA_CAPS_H_AN		0x00000020 /* Async. notification */
981 #define	CTS_SATA_CAPS_D			0xffff0000
982 #define	CTS_SATA_CAPS_D_PMREQ		0x00010000
983 #define	CTS_SATA_CAPS_D_APST		0x00020000
984 };
985 
986 struct ccb_trans_settings_nvme
987 {
988 	u_int     	valid;		/* Which fields to honor */
989 #define CTS_NVME_VALID_SPEC	0x01
990 #define CTS_NVME_VALID_CAPS	0x02
991 	u_int		spec_major;	/* Major version of spec supported */
992 	u_int		spec_minor;	/* Minor verison of spec supported */
993 	u_int		spec_tiny;	/* Tiny version of spec supported */
994 	u_int		max_xfer;	/* Max transfer size (0 -> unlimited */
995 	u_int		caps;
996 };
997 
998 /* Get/Set transfer rate/width/disconnection/tag queueing settings */
999 struct ccb_trans_settings {
1000 	struct	  ccb_hdr ccb_h;
1001 	cts_type  type;		/* Current or User settings */
1002 	cam_proto protocol;
1003 	u_int	  protocol_version;
1004 	cam_xport transport;
1005 	u_int	  transport_version;
1006 	union {
1007 		u_int  valid;	/* Which fields to honor */
1008 		struct ccb_trans_settings_ata ata;
1009 		struct ccb_trans_settings_scsi scsi;
1010 		struct ccb_trans_settings_nvme nvme;
1011 	} proto_specific;
1012 	union {
1013 		u_int  valid;	/* Which fields to honor */
1014 		struct ccb_trans_settings_spi spi;
1015 		struct ccb_trans_settings_fc fc;
1016 		struct ccb_trans_settings_sas sas;
1017 		struct ccb_trans_settings_pata ata;
1018 		struct ccb_trans_settings_sata sata;
1019 		struct ccb_trans_settings_nvme nvme;
1020 	} xport_specific;
1021 };
1022 
1023 
1024 /*
1025  * Calculate the geometry parameters for a device
1026  * give the block size and volume size in blocks.
1027  */
1028 struct ccb_calc_geometry {
1029 	struct	  ccb_hdr ccb_h;
1030 	u_int32_t block_size;
1031 	u_int64_t volume_size;
1032 	u_int32_t cylinders;
1033 	u_int8_t  heads;
1034 	u_int8_t  secs_per_track;
1035 };
1036 
1037 /*
1038  * Set or get SIM (and transport) specific knobs
1039  */
1040 
1041 #define	KNOB_VALID_ADDRESS	0x1
1042 #define	KNOB_VALID_ROLE		0x2
1043 
1044 
1045 #define	KNOB_ROLE_NONE		0x0
1046 #define	KNOB_ROLE_INITIATOR	0x1
1047 #define	KNOB_ROLE_TARGET	0x2
1048 #define	KNOB_ROLE_BOTH		0x3
1049 
1050 struct ccb_sim_knob_settings_spi {
1051 	u_int		valid;
1052 	u_int		initiator_id;
1053 	u_int		role;
1054 };
1055 
1056 struct ccb_sim_knob_settings_fc {
1057 	u_int		valid;
1058 	u_int64_t	wwnn;		/* world wide node name */
1059 	u_int64_t 	wwpn;		/* world wide port name */
1060 	u_int		role;
1061 };
1062 
1063 struct ccb_sim_knob_settings_sas {
1064 	u_int		valid;
1065 	u_int64_t	wwnn;		/* world wide node name */
1066 	u_int		role;
1067 };
1068 #define	KNOB_SETTINGS_SIZE	128
1069 
1070 struct ccb_sim_knob {
1071 	struct	  ccb_hdr ccb_h;
1072 	union {
1073 		u_int  valid;	/* Which fields to honor */
1074 		struct ccb_sim_knob_settings_spi spi;
1075 		struct ccb_sim_knob_settings_fc fc;
1076 		struct ccb_sim_knob_settings_sas sas;
1077 		char pad[KNOB_SETTINGS_SIZE];
1078 	} xport_specific;
1079 };
1080 
1081 /*
1082  * Rescan the given bus, or bus/target/lun
1083  */
1084 struct ccb_rescan {
1085 	struct	ccb_hdr ccb_h;
1086 	cam_flags	flags;
1087 };
1088 
1089 /*
1090  * Turn on debugging for the given bus, bus/target, or bus/target/lun.
1091  */
1092 struct ccb_debug {
1093 	struct	ccb_hdr ccb_h;
1094 	cam_debug_flags flags;
1095 };
1096 
1097 /* Target mode structures. */
1098 
1099 struct ccb_en_lun {
1100 	struct	  ccb_hdr ccb_h;
1101 	u_int16_t grp6_len;		/* Group 6 VU CDB length */
1102 	u_int16_t grp7_len;		/* Group 7 VU CDB length */
1103 	u_int8_t  enable;
1104 };
1105 
1106 /* old, barely used immediate notify, binary compatibility */
1107 struct ccb_immed_notify {
1108 	struct	  ccb_hdr ccb_h;
1109 	struct    scsi_sense_data sense_data;
1110 	u_int8_t  sense_len;		/* Number of bytes in sense buffer */
1111 	u_int8_t  initiator_id;		/* Id of initiator that selected */
1112 	u_int8_t  message_args[7];	/* Message Arguments */
1113 };
1114 
1115 struct ccb_notify_ack {
1116 	struct	  ccb_hdr ccb_h;
1117 	u_int16_t seq_id;		/* Sequence identifier */
1118 	u_int8_t  event;		/* Event flags */
1119 };
1120 
1121 struct ccb_immediate_notify {
1122 	struct    ccb_hdr ccb_h;
1123 	u_int     tag_id;		/* Tag for immediate notify */
1124 	u_int     seq_id;		/* Tag for target of notify */
1125 	u_int     initiator_id;		/* Initiator Identifier */
1126 	u_int     arg;			/* Function specific */
1127 };
1128 
1129 struct ccb_notify_acknowledge {
1130 	struct    ccb_hdr ccb_h;
1131 	u_int     tag_id;		/* Tag for immediate notify */
1132 	u_int     seq_id;		/* Tar for target of notify */
1133 	u_int     initiator_id;		/* Initiator Identifier */
1134 	u_int     arg;			/* Response information */
1135 	/*
1136 	 * Lower byte of arg is one of RESPONSE CODE values defined below
1137 	 * (subset of response codes from SPL-4 and FCP-4 specifications),
1138 	 * upper 3 bytes is code-specific ADDITIONAL RESPONSE INFORMATION.
1139 	 */
1140 #define	CAM_RSP_TMF_COMPLETE		0x00
1141 #define	CAM_RSP_TMF_REJECTED		0x04
1142 #define	CAM_RSP_TMF_FAILED		0x05
1143 #define	CAM_RSP_TMF_SUCCEEDED		0x08
1144 #define	CAM_RSP_TMF_INCORRECT_LUN	0x09
1145 };
1146 
1147 /* HBA engine structures. */
1148 
1149 typedef enum {
1150 	EIT_BUFFER,	/* Engine type: buffer memory */
1151 	EIT_LOSSLESS,	/* Engine type: lossless compression */
1152 	EIT_LOSSY,	/* Engine type: lossy compression */
1153 	EIT_ENCRYPT	/* Engine type: encryption */
1154 } ei_type;
1155 
1156 typedef enum {
1157 	EAD_VUNIQUE,	/* Engine algorithm ID: vendor unique */
1158 	EAD_LZ1V1,	/* Engine algorithm ID: LZ1 var.1 */
1159 	EAD_LZ2V1,	/* Engine algorithm ID: LZ2 var.1 */
1160 	EAD_LZ2V2	/* Engine algorithm ID: LZ2 var.2 */
1161 } ei_algo;
1162 
1163 struct ccb_eng_inq {
1164 	struct	  ccb_hdr ccb_h;
1165 	u_int16_t eng_num;	/* The engine number for this inquiry */
1166 	ei_type   eng_type;	/* Returned engine type */
1167 	ei_algo   eng_algo;	/* Returned engine algorithm type */
1168 	u_int32_t eng_memeory;	/* Returned engine memory size */
1169 };
1170 
1171 struct ccb_eng_exec {	/* This structure must match SCSIIO size */
1172 	struct	  ccb_hdr ccb_h;
1173 	u_int8_t  *pdrv_ptr;	/* Ptr used by the peripheral driver */
1174 	u_int8_t  *req_map;	/* Ptr for mapping info on the req. */
1175 	u_int8_t  *data_ptr;	/* Pointer to the data buf/SG list */
1176 	u_int32_t dxfer_len;	/* Data transfer length */
1177 	u_int8_t  *engdata_ptr;	/* Pointer to the engine buffer data */
1178 	u_int16_t sglist_cnt;	/* Num of scatter gather list entries */
1179 	u_int32_t dmax_len;	/* Destination data maximum length */
1180 	u_int32_t dest_len;	/* Destination data length */
1181 	int32_t	  src_resid;	/* Source residual length: 2's comp */
1182 	u_int32_t timeout;	/* Timeout value */
1183 	u_int16_t eng_num;	/* Engine number for this request */
1184 	u_int16_t vu_flags;	/* Vendor Unique flags */
1185 };
1186 
1187 /*
1188  * Definitions for the timeout field in the SCSI I/O CCB.
1189  */
1190 #define	CAM_TIME_DEFAULT	0x00000000	/* Use SIM default value */
1191 #define	CAM_TIME_INFINITY	0xFFFFFFFF	/* Infinite timeout */
1192 
1193 #define	CAM_SUCCESS	0	/* For signaling general success */
1194 #define	CAM_FAILURE	1	/* For signaling general failure */
1195 
1196 #define CAM_FALSE	0
1197 #define CAM_TRUE	1
1198 
1199 #define XPT_CCB_INVALID	-1	/* for signaling a bad CCB to free */
1200 
1201 /*
1202  * CCB for working with advanced device information.  This operates in a fashion
1203  * similar to XPT_GDEV_TYPE.  Specify the target in ccb_h, the buffer
1204  * type requested, and provide a buffer size/buffer to write to.  If the
1205  * buffer is too small, provsiz will be larger than bufsiz.
1206  */
1207 struct ccb_dev_advinfo {
1208 	struct ccb_hdr ccb_h;
1209 	uint32_t flags;
1210 #define	CDAI_FLAG_NONE		0x0	/* No flags set */
1211 #define	CDAI_FLAG_STORE		0x1	/* If set, action becomes store */
1212 	uint32_t buftype;		/* IN: Type of data being requested */
1213 	/* NB: buftype is interpreted on a per-transport basis */
1214 #define	CDAI_TYPE_SCSI_DEVID	1
1215 #define	CDAI_TYPE_SERIAL_NUM	2
1216 #define	CDAI_TYPE_PHYS_PATH	3
1217 #define	CDAI_TYPE_RCAPLONG	4
1218 #define	CDAI_TYPE_EXT_INQ	5
1219 	off_t bufsiz;			/* IN: Size of external buffer */
1220 #define	CAM_SCSI_DEVID_MAXLEN	65536	/* length in buffer is an uint16_t */
1221 	off_t provsiz;			/* OUT: Size required/used */
1222 	uint8_t *buf;			/* IN/OUT: Buffer for requested data */
1223 };
1224 
1225 /*
1226  * CCB for sending async events
1227  */
1228 struct ccb_async {
1229 	struct ccb_hdr ccb_h;
1230 	uint32_t async_code;
1231 	off_t async_arg_size;
1232 	void *async_arg_ptr;
1233 };
1234 
1235 /*
1236  * Union of all CCB types for kernel space allocation.  This union should
1237  * never be used for manipulating CCBs - its only use is for the allocation
1238  * and deallocation of raw CCB space and is the return type of xpt_ccb_alloc
1239  * and the argument to xpt_ccb_free.
1240  */
1241 union ccb {
1242 	struct	ccb_hdr			ccb_h;	/* For convenience */
1243 	struct	ccb_scsiio		csio;
1244 	struct	ccb_getdev		cgd;
1245 	struct	ccb_getdevlist		cgdl;
1246 	struct	ccb_pathinq		cpi;
1247 	struct	ccb_relsim		crs;
1248 	struct	ccb_setasync		csa;
1249 	struct	ccb_setdev		csd;
1250 	struct	ccb_pathstats		cpis;
1251 	struct	ccb_getdevstats		cgds;
1252 	struct	ccb_dev_match		cdm;
1253 	struct	ccb_trans_settings	cts;
1254 	struct	ccb_calc_geometry	ccg;
1255 	struct	ccb_sim_knob		knob;
1256 	struct	ccb_abort		cab;
1257 	struct	ccb_resetbus		crb;
1258 	struct	ccb_resetdev		crd;
1259 	struct	ccb_termio		tio;
1260 	struct	ccb_accept_tio		atio;
1261 	struct	ccb_scsiio		ctio;
1262 	struct	ccb_en_lun		cel;
1263 	struct	ccb_immed_notify	cin;
1264 	struct	ccb_notify_ack		cna;
1265 	struct	ccb_immediate_notify	cin1;
1266 	struct	ccb_notify_acknowledge	cna2;
1267 	struct	ccb_eng_inq		cei;
1268 	struct	ccb_eng_exec		cee;
1269 	struct	ccb_smpio		smpio;
1270 	struct 	ccb_rescan		crcn;
1271 	struct  ccb_debug		cdbg;
1272 	struct	ccb_ataio		ataio;
1273 	struct	ccb_dev_advinfo		cdai;
1274 	struct	ccb_async		casync;
1275 	struct	ccb_nvmeio		nvmeio;
1276 };
1277 
1278 #define CCB_CLEAR_ALL_EXCEPT_HDR(ccbp)			\
1279 	bzero((char *)(ccbp) + sizeof((ccbp)->ccb_h),	\
1280 	    sizeof(*(ccbp)) - sizeof((ccbp)->ccb_h))
1281 
1282 __BEGIN_DECLS
1283 static __inline void
1284 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries,
1285 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1286 	      u_int32_t flags, u_int8_t tag_action,
1287 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1288 	      u_int8_t sense_len, u_int8_t cdb_len,
1289 	      u_int32_t timeout);
1290 
1291 static __inline void
1292 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1293 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1294 	      u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1295 	      u_int32_t timeout);
1296 
1297 static __inline void
1298 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries,
1299 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1300 	      u_int32_t flags, u_int tag_action, u_int tag_id,
1301 	      u_int init_id, u_int scsi_status, u_int8_t *data_ptr,
1302 	      u_int32_t dxfer_len, u_int32_t timeout);
1303 
1304 static __inline void
1305 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries,
1306 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1307 	      u_int32_t flags, u_int tag_action,
1308 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1309 	      u_int32_t timeout);
1310 
1311 static __inline void
1312 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries,
1313 	       void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1314 	       uint8_t *smp_request, int smp_request_len,
1315 	       uint8_t *smp_response, int smp_response_len,
1316 	       uint32_t timeout);
1317 
1318 static __inline void
1319 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries,
1320 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1321 	      u_int32_t flags, u_int8_t tag_action,
1322 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1323 	      u_int8_t sense_len, u_int8_t cdb_len,
1324 	      u_int32_t timeout)
1325 {
1326 	csio->ccb_h.func_code = XPT_SCSI_IO;
1327 	csio->ccb_h.flags = flags;
1328 	csio->ccb_h.xflags = 0;
1329 	csio->ccb_h.retry_count = retries;
1330 	csio->ccb_h.cbfcnp = cbfcnp;
1331 	csio->ccb_h.timeout = timeout;
1332 	csio->data_ptr = data_ptr;
1333 	csio->dxfer_len = dxfer_len;
1334 	csio->sense_len = sense_len;
1335 	csio->cdb_len = cdb_len;
1336 	csio->tag_action = tag_action;
1337 }
1338 
1339 static __inline void
1340 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries,
1341 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1342 	      u_int32_t flags, u_int tag_action, u_int tag_id,
1343 	      u_int init_id, u_int scsi_status, u_int8_t *data_ptr,
1344 	      u_int32_t dxfer_len, u_int32_t timeout)
1345 {
1346 	csio->ccb_h.func_code = XPT_CONT_TARGET_IO;
1347 	csio->ccb_h.flags = flags;
1348 	csio->ccb_h.xflags = 0;
1349 	csio->ccb_h.retry_count = retries;
1350 	csio->ccb_h.cbfcnp = cbfcnp;
1351 	csio->ccb_h.timeout = timeout;
1352 	csio->data_ptr = data_ptr;
1353 	csio->dxfer_len = dxfer_len;
1354 	csio->scsi_status = scsi_status;
1355 	csio->tag_action = tag_action;
1356 	csio->tag_id = tag_id;
1357 	csio->init_id = init_id;
1358 }
1359 
1360 static __inline void
1361 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries,
1362 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1363 	      u_int32_t flags, u_int tag_action __unused,
1364 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1365 	      u_int32_t timeout)
1366 {
1367 	ataio->ccb_h.func_code = XPT_ATA_IO;
1368 	ataio->ccb_h.flags = flags;
1369 	ataio->ccb_h.retry_count = retries;
1370 	ataio->ccb_h.cbfcnp = cbfcnp;
1371 	ataio->ccb_h.timeout = timeout;
1372 	ataio->data_ptr = data_ptr;
1373 	ataio->dxfer_len = dxfer_len;
1374 	ataio->ata_flags = 0;
1375 }
1376 
1377 static __inline void
1378 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries,
1379 	       void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1380 	       uint8_t *smp_request, int smp_request_len,
1381 	       uint8_t *smp_response, int smp_response_len,
1382 	       uint32_t timeout)
1383 {
1384 #ifdef _KERNEL
1385 	KASSERT((flags & CAM_DIR_MASK) == CAM_DIR_BOTH,
1386 		("direction != CAM_DIR_BOTH"));
1387 	KASSERT((smp_request != NULL) && (smp_response != NULL),
1388 		("need valid request and response buffers"));
1389 	KASSERT((smp_request_len != 0) && (smp_response_len != 0),
1390 		("need non-zero request and response lengths"));
1391 #endif /*_KERNEL*/
1392 	smpio->ccb_h.func_code = XPT_SMP_IO;
1393 	smpio->ccb_h.flags = flags;
1394 	smpio->ccb_h.retry_count = retries;
1395 	smpio->ccb_h.cbfcnp = cbfcnp;
1396 	smpio->ccb_h.timeout = timeout;
1397 	smpio->smp_request = smp_request;
1398 	smpio->smp_request_len = smp_request_len;
1399 	smpio->smp_response = smp_response;
1400 	smpio->smp_response_len = smp_response_len;
1401 }
1402 
1403 static __inline void
1404 cam_set_ccbstatus(union ccb *ccb, cam_status status)
1405 {
1406 	ccb->ccb_h.status &= ~CAM_STATUS_MASK;
1407 	ccb->ccb_h.status |= status;
1408 }
1409 
1410 static __inline cam_status
1411 cam_ccb_status(union ccb *ccb)
1412 {
1413 	return ((cam_status)(ccb->ccb_h.status & CAM_STATUS_MASK));
1414 }
1415 
1416 void cam_calc_geometry(struct ccb_calc_geometry *ccg, int extended);
1417 
1418 static __inline void
1419 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1420 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1421 	      u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1422 	      u_int32_t timeout)
1423 {
1424 	nvmeio->ccb_h.func_code = XPT_NVME_IO;
1425 	nvmeio->ccb_h.flags = flags;
1426 	nvmeio->ccb_h.retry_count = retries;
1427 	nvmeio->ccb_h.cbfcnp = cbfcnp;
1428 	nvmeio->ccb_h.timeout = timeout;
1429 	nvmeio->data_ptr = data_ptr;
1430 	nvmeio->dxfer_len = dxfer_len;
1431 }
1432 __END_DECLS
1433 
1434 #endif /* _CAM_CAM_CCB_H */
1435