xref: /freebsd/sys/cam/cam_ccb.h (revision 640235e2c2ba32947f7c59d168437ffa1280f1e6)
1 /*-
2  * Data structures and definitions for CAM Control Blocks (CCBs).
3  *
4  * Copyright (c) 1997, 1998 Justin T. Gibbs.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer,
12  *    without modification, immediately at the beginning of the file.
13  * 2. The name of the author may not be used to endorse or promote products
14  *    derived from this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 #ifndef _CAM_CAM_CCB_H
32 #define _CAM_CAM_CCB_H 1
33 
34 #include <sys/queue.h>
35 #include <sys/cdefs.h>
36 #include <sys/time.h>
37 #include <sys/limits.h>
38 #ifndef _KERNEL
39 #include <sys/callout.h>
40 #endif
41 #include <cam/cam_debug.h>
42 #include <cam/scsi/scsi_all.h>
43 #include <cam/ata/ata_all.h>
44 #include <cam/nvme/nvme_all.h>
45 
46 /* General allocation length definitions for CCB structures */
47 #define	IOCDBLEN	CAM_MAX_CDBLEN	/* Space for CDB bytes/pointer */
48 #define	VUHBALEN	14		/* Vendor Unique HBA length */
49 #define	SIM_IDLEN	16		/* ASCII string len for SIM ID */
50 #define	HBA_IDLEN	16		/* ASCII string len for HBA ID */
51 #define	DEV_IDLEN	16		/* ASCII string len for device names */
52 #define CCB_PERIPH_PRIV_SIZE 	2	/* size of peripheral private area */
53 #define CCB_SIM_PRIV_SIZE 	2	/* size of sim private area */
54 
55 /* Struct definitions for CAM control blocks */
56 
57 /* Common CCB header */
58 /* CAM CCB flags */
59 typedef enum {
60 	CAM_CDB_POINTER		= 0x00000001,/* The CDB field is a pointer    */
61 	CAM_QUEUE_ENABLE	= 0x00000002,/* SIM queue actions are enabled */
62 	CAM_CDB_LINKED		= 0x00000004,/* CCB contains a linked CDB     */
63 	CAM_NEGOTIATE		= 0x00000008,/*
64 					      * Perform transport negotiation
65 					      * with this command.
66 					      */
67 	CAM_DATA_ISPHYS		= 0x00000010,/* Data type with physical addrs */
68 	CAM_DIS_AUTOSENSE	= 0x00000020,/* Disable autosense feature     */
69 	CAM_DIR_BOTH		= 0x00000000,/* Data direction (00:IN/OUT)    */
70 	CAM_DIR_IN		= 0x00000040,/* Data direction (01:DATA IN)   */
71 	CAM_DIR_OUT		= 0x00000080,/* Data direction (10:DATA OUT)  */
72 	CAM_DIR_NONE		= 0x000000C0,/* Data direction (11:no data)   */
73 	CAM_DIR_MASK		= 0x000000C0,/* Data direction Mask	      */
74 	CAM_DATA_VADDR		= 0x00000000,/* Data type (000:Virtual)       */
75 	CAM_DATA_PADDR		= 0x00000010,/* Data type (001:Physical)      */
76 	CAM_DATA_SG		= 0x00040000,/* Data type (010:sglist)        */
77 	CAM_DATA_SG_PADDR	= 0x00040010,/* Data type (011:sglist phys)   */
78 	CAM_DATA_BIO		= 0x00200000,/* Data type (100:bio)           */
79 	CAM_DATA_MASK		= 0x00240010,/* Data type mask                */
80 	CAM_SOFT_RST_OP		= 0x00000100,/* Use Soft reset alternative    */
81 	CAM_ENG_SYNC		= 0x00000200,/* Flush resid bytes on complete */
82 	CAM_DEV_QFRZDIS		= 0x00000400,/* Disable DEV Q freezing	      */
83 	CAM_DEV_QFREEZE		= 0x00000800,/* Freeze DEV Q on execution     */
84 	CAM_HIGH_POWER		= 0x00001000,/* Command takes a lot of power  */
85 	CAM_SENSE_PTR		= 0x00002000,/* Sense data is a pointer	      */
86 	CAM_SENSE_PHYS		= 0x00004000,/* Sense pointer is physical addr*/
87 	CAM_TAG_ACTION_VALID	= 0x00008000,/* Use the tag action in this ccb*/
88 	CAM_PASS_ERR_RECOVER	= 0x00010000,/* Pass driver does err. recovery*/
89 	CAM_DIS_DISCONNECT	= 0x00020000,/* Disable disconnect	      */
90 	CAM_MSG_BUF_PHYS	= 0x00080000,/* Message buffer ptr is physical*/
91 	CAM_SNS_BUF_PHYS	= 0x00100000,/* Autosense data ptr is physical*/
92 	CAM_CDB_PHYS		= 0x00400000,/* CDB poiner is physical	      */
93 	CAM_ENG_SGLIST		= 0x00800000,/* SG list is for the HBA engine */
94 
95 /* Phase cognizant mode flags */
96 	CAM_DIS_AUTOSRP		= 0x01000000,/* Disable autosave/restore ptrs */
97 	CAM_DIS_AUTODISC	= 0x02000000,/* Disable auto disconnect	      */
98 	CAM_TGT_CCB_AVAIL	= 0x04000000,/* Target CCB available	      */
99 	CAM_TGT_PHASE_MODE	= 0x08000000,/* The SIM runs in phase mode    */
100 	CAM_MSGB_VALID		= 0x10000000,/* Message buffer valid	      */
101 	CAM_STATUS_VALID	= 0x20000000,/* Status buffer valid	      */
102 	CAM_DATAB_VALID		= 0x40000000,/* Data buffer valid	      */
103 
104 /* Host target Mode flags */
105 	CAM_SEND_SENSE		= 0x08000000,/* Send sense data with status   */
106 	CAM_TERM_IO		= 0x10000000,/* Terminate I/O Message sup.    */
107 	CAM_DISCONNECT		= 0x20000000,/* Disconnects are mandatory     */
108 	CAM_SEND_STATUS		= 0x40000000,/* Send status after data phase  */
109 
110 	CAM_UNLOCKED		= 0x80000000 /* Call callback without lock.   */
111 } ccb_flags;
112 
113 typedef enum {
114 	CAM_USER_DATA_ADDR	= 0x00000002,/* Userspace data pointers */
115 	CAM_SG_FORMAT_IOVEC	= 0x00000004,/* iovec instead of busdma S/G*/
116 	CAM_UNMAPPED_BUF	= 0x00000008 /* use unmapped I/O */
117 } ccb_xflags;
118 
119 /* XPT Opcodes for xpt_action */
120 typedef enum {
121 /* Function code flags are bits greater than 0xff */
122 	XPT_FC_QUEUED		= 0x100,
123 				/* Non-immediate function code */
124 	XPT_FC_USER_CCB		= 0x200,
125 	XPT_FC_XPT_ONLY		= 0x400,
126 				/* Only for the transport layer device */
127 	XPT_FC_DEV_QUEUED	= 0x800 | XPT_FC_QUEUED,
128 				/* Passes through the device queues */
129 /* Common function commands: 0x00->0x0F */
130 	XPT_NOOP 		= 0x00,
131 				/* Execute Nothing */
132 	XPT_SCSI_IO		= 0x01 | XPT_FC_DEV_QUEUED,
133 				/* Execute the requested I/O operation */
134 	XPT_GDEV_TYPE		= 0x02,
135 				/* Get type information for specified device */
136 	XPT_GDEVLIST		= 0x03,
137 				/* Get a list of peripheral devices */
138 	XPT_PATH_INQ		= 0x04,
139 				/* Path routing inquiry */
140 	XPT_REL_SIMQ		= 0x05,
141 				/* Release a frozen device queue */
142 	XPT_SASYNC_CB		= 0x06,
143 				/* Set Asynchronous Callback Parameters */
144 	XPT_SDEV_TYPE		= 0x07,
145 				/* Set device type information */
146 	XPT_SCAN_BUS		= 0x08 | XPT_FC_QUEUED | XPT_FC_USER_CCB
147 				       | XPT_FC_XPT_ONLY,
148 				/* (Re)Scan the SCSI Bus */
149 	XPT_DEV_MATCH		= 0x09 | XPT_FC_XPT_ONLY,
150 				/* Get EDT entries matching the given pattern */
151 	XPT_DEBUG		= 0x0a,
152 				/* Turn on debugging for a bus, target or lun */
153 	XPT_PATH_STATS		= 0x0b,
154 				/* Path statistics (error counts, etc.) */
155 	XPT_GDEV_STATS		= 0x0c,
156 				/* Device statistics (error counts, etc.) */
157 	XPT_DEV_ADVINFO		= 0x0e,
158 				/* Get/Set Device advanced information */
159 	XPT_ASYNC		= 0x0f | XPT_FC_QUEUED | XPT_FC_USER_CCB
160 				       | XPT_FC_XPT_ONLY,
161 				/* Asynchronous event */
162 /* SCSI Control Functions: 0x10->0x1F */
163 	XPT_ABORT		= 0x10,
164 				/* Abort the specified CCB */
165 	XPT_RESET_BUS		= 0x11 | XPT_FC_XPT_ONLY,
166 				/* Reset the specified SCSI bus */
167 	XPT_RESET_DEV		= 0x12 | XPT_FC_DEV_QUEUED,
168 				/* Bus Device Reset the specified SCSI device */
169 	XPT_TERM_IO		= 0x13,
170 				/* Terminate the I/O process */
171 	XPT_SCAN_LUN		= 0x14 | XPT_FC_QUEUED | XPT_FC_USER_CCB
172 				       | XPT_FC_XPT_ONLY,
173 				/* Scan Logical Unit */
174 	XPT_GET_TRAN_SETTINGS	= 0x15,
175 				/*
176 				 * Get default/user transfer settings
177 				 * for the target
178 				 */
179 	XPT_SET_TRAN_SETTINGS	= 0x16,
180 				/*
181 				 * Set transfer rate/width
182 				 * negotiation settings
183 				 */
184 	XPT_CALC_GEOMETRY	= 0x17,
185 				/*
186 				 * Calculate the geometry parameters for
187 				 * a device give the sector size and
188 				 * volume size.
189 				 */
190 	XPT_ATA_IO		= 0x18 | XPT_FC_DEV_QUEUED,
191 				/* Execute the requested ATA I/O operation */
192 
193 	XPT_GET_SIM_KNOB_OLD	= 0x18, /* Compat only */
194 
195 	XPT_SET_SIM_KNOB	= 0x19,
196 				/*
197 				 * Set SIM specific knob values.
198 				 */
199 
200 	XPT_GET_SIM_KNOB	= 0x1a,
201 				/*
202 				 * Get SIM specific knob values.
203 				 */
204 
205 	XPT_SMP_IO		= 0x1b | XPT_FC_DEV_QUEUED,
206 				/* Serial Management Protocol */
207 
208 	XPT_NVME_IO		= 0x1c | XPT_FC_DEV_QUEUED,
209 				/* Execiute the requestred NVMe I/O operation */
210 
211 	XPT_MMCSD_IO		= 0x1d | XPT_FC_DEV_QUEUED,
212 				/* Placeholder for MMC / SD / SDIO I/O stuff */
213 
214 	XPT_SCAN_TGT		= 0x1E | XPT_FC_QUEUED | XPT_FC_USER_CCB
215 				       | XPT_FC_XPT_ONLY,
216 				/* Scan Target */
217 
218 /* HBA engine commands 0x20->0x2F */
219 	XPT_ENG_INQ		= 0x20 | XPT_FC_XPT_ONLY,
220 				/* HBA engine feature inquiry */
221 	XPT_ENG_EXEC		= 0x21 | XPT_FC_DEV_QUEUED,
222 				/* HBA execute engine request */
223 
224 /* Target mode commands: 0x30->0x3F */
225 	XPT_EN_LUN		= 0x30,
226 				/* Enable LUN as a target */
227 	XPT_TARGET_IO		= 0x31 | XPT_FC_DEV_QUEUED,
228 				/* Execute target I/O request */
229 	XPT_ACCEPT_TARGET_IO	= 0x32 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
230 				/* Accept Host Target Mode CDB */
231 	XPT_CONT_TARGET_IO	= 0x33 | XPT_FC_DEV_QUEUED,
232 				/* Continue Host Target I/O Connection */
233 	XPT_IMMED_NOTIFY	= 0x34 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
234 				/* Notify Host Target driver of event (obsolete) */
235 	XPT_NOTIFY_ACK		= 0x35,
236 				/* Acknowledgement of event (obsolete) */
237 	XPT_IMMEDIATE_NOTIFY	= 0x36 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
238 				/* Notify Host Target driver of event */
239 	XPT_NOTIFY_ACKNOWLEDGE	= 0x37 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
240 				/* Acknowledgement of event */
241 	XPT_REPROBE_LUN		= 0x38 | XPT_FC_QUEUED | XPT_FC_USER_CCB,
242 				/* Query device capacity and notify GEOM */
243 
244 /* Vendor Unique codes: 0x80->0x8F */
245 	XPT_VUNIQUE		= 0x80
246 } xpt_opcode;
247 
248 #define XPT_FC_GROUP_MASK		0xF0
249 #define XPT_FC_GROUP(op) ((op) & XPT_FC_GROUP_MASK)
250 #define XPT_FC_GROUP_COMMON		0x00
251 #define XPT_FC_GROUP_SCSI_CONTROL	0x10
252 #define XPT_FC_GROUP_HBA_ENGINE		0x20
253 #define XPT_FC_GROUP_TMODE		0x30
254 #define XPT_FC_GROUP_VENDOR_UNIQUE	0x80
255 
256 #define XPT_FC_IS_DEV_QUEUED(ccb) 	\
257     (((ccb)->ccb_h.func_code & XPT_FC_DEV_QUEUED) == XPT_FC_DEV_QUEUED)
258 #define XPT_FC_IS_QUEUED(ccb) 	\
259     (((ccb)->ccb_h.func_code & XPT_FC_QUEUED) != 0)
260 
261 typedef enum {
262 	PROTO_UNKNOWN,
263 	PROTO_UNSPECIFIED,
264 	PROTO_SCSI,	/* Small Computer System Interface */
265 	PROTO_ATA,	/* AT Attachment */
266 	PROTO_ATAPI,	/* AT Attachment Packetized Interface */
267 	PROTO_SATAPM,	/* SATA Port Multiplier */
268 	PROTO_SEMB,	/* SATA Enclosure Management Bridge */
269 	PROTO_NVME,	/* NVME */
270 } cam_proto;
271 
272 typedef enum {
273 	XPORT_UNKNOWN,
274 	XPORT_UNSPECIFIED,
275 	XPORT_SPI,	/* SCSI Parallel Interface */
276 	XPORT_FC,	/* Fiber Channel */
277 	XPORT_SSA,	/* Serial Storage Architecture */
278 	XPORT_USB,	/* Universal Serial Bus */
279 	XPORT_PPB,	/* Parallel Port Bus */
280 	XPORT_ATA,	/* AT Attachment */
281 	XPORT_SAS,	/* Serial Attached SCSI */
282 	XPORT_SATA,	/* Serial AT Attachment */
283 	XPORT_ISCSI,	/* iSCSI */
284 	XPORT_SRP,	/* SCSI RDMA Protocol */
285 	XPORT_NVME,	/* NVMe over PCIe */
286 } cam_xport;
287 
288 #define XPORT_IS_NVME(t)	((t) == XPORT_NVME)
289 #define XPORT_IS_ATA(t)		((t) == XPORT_ATA || (t) == XPORT_SATA)
290 #define XPORT_IS_SCSI(t)	((t) != XPORT_UNKNOWN && \
291 				 (t) != XPORT_UNSPECIFIED && \
292 				 !XPORT_IS_ATA(t) && !XPORT_IS_NVME(t))
293 #define XPORT_DEVSTAT_TYPE(t)	(XPORT_IS_ATA(t) ? DEVSTAT_TYPE_IF_IDE : \
294 				 XPORT_IS_SCSI(t) ? DEVSTAT_TYPE_IF_SCSI : \
295 				 DEVSTAT_TYPE_IF_OTHER)
296 
297 #define PROTO_VERSION_UNKNOWN (UINT_MAX - 1)
298 #define PROTO_VERSION_UNSPECIFIED UINT_MAX
299 #define XPORT_VERSION_UNKNOWN (UINT_MAX - 1)
300 #define XPORT_VERSION_UNSPECIFIED UINT_MAX
301 
302 typedef union {
303 	LIST_ENTRY(ccb_hdr) le;
304 	SLIST_ENTRY(ccb_hdr) sle;
305 	TAILQ_ENTRY(ccb_hdr) tqe;
306 	STAILQ_ENTRY(ccb_hdr) stqe;
307 } camq_entry;
308 
309 typedef union {
310 	void		*ptr;
311 	u_long		field;
312 	u_int8_t	bytes[sizeof(uintptr_t)];
313 } ccb_priv_entry;
314 
315 typedef union {
316 	ccb_priv_entry	entries[CCB_PERIPH_PRIV_SIZE];
317 	u_int8_t	bytes[CCB_PERIPH_PRIV_SIZE * sizeof(ccb_priv_entry)];
318 } ccb_ppriv_area;
319 
320 typedef union {
321 	ccb_priv_entry	entries[CCB_SIM_PRIV_SIZE];
322 	u_int8_t	bytes[CCB_SIM_PRIV_SIZE * sizeof(ccb_priv_entry)];
323 } ccb_spriv_area;
324 
325 typedef struct {
326 	struct timeval	*etime;
327 	uintptr_t	sim_data;
328 	uintptr_t	periph_data;
329 } ccb_qos_area;
330 
331 struct ccb_hdr {
332 	cam_pinfo	pinfo;		/* Info for priority scheduling */
333 	camq_entry	xpt_links;	/* For chaining in the XPT layer */
334 	camq_entry	sim_links;	/* For chaining in the SIM layer */
335 	camq_entry	periph_links;	/* For chaining in the type driver */
336 	u_int32_t	retry_count;
337 	void		(*cbfcnp)(struct cam_periph *, union ccb *);
338 					/* Callback on completion function */
339 	xpt_opcode	func_code;	/* XPT function code */
340 	u_int32_t	status;		/* Status returned by CAM subsystem */
341 	struct		cam_path *path;	/* Compiled path for this ccb */
342 	path_id_t	path_id;	/* Path ID for the request */
343 	target_id_t	target_id;	/* Target device ID */
344 	lun_id_t	target_lun;	/* Target LUN number */
345 	u_int32_t	flags;		/* ccb_flags */
346 	u_int32_t	xflags;		/* Extended flags */
347 	ccb_ppriv_area	periph_priv;
348 	ccb_spriv_area	sim_priv;
349 	ccb_qos_area	qos;
350 	u_int32_t	timeout;	/* Hard timeout value in mseconds */
351 	struct timeval	softtimeout;	/* Soft timeout value in sec + usec */
352 };
353 
354 /* Get Device Information CCB */
355 struct ccb_getdev {
356 	struct	  ccb_hdr ccb_h;
357 	cam_proto protocol;
358 	struct scsi_inquiry_data inq_data;
359 	struct ata_params ident_data;
360 	u_int8_t  serial_num[252];
361 	u_int8_t  inq_flags;
362 	u_int8_t  serial_num_len;
363 	const struct nvme_controller_data	*nvme_cdata;
364 	const struct nvme_namespace_data	*nvme_data;
365 };
366 
367 /* Device Statistics CCB */
368 struct ccb_getdevstats {
369 	struct	ccb_hdr	ccb_h;
370 	int	dev_openings;	/* Space left for more work on device*/
371 	int	dev_active;	/* Transactions running on the device */
372 	int	allocated;	/* CCBs allocated for the device */
373 	int	queued;		/* CCBs queued to be sent to the device */
374 	int	held;		/*
375 				 * CCBs held by peripheral drivers
376 				 * for this device
377 				 */
378 	int	maxtags;	/*
379 				 * Boundary conditions for number of
380 				 * tagged operations
381 				 */
382 	int	mintags;
383 	struct	timeval last_reset;	/* Time of last bus reset/loop init */
384 };
385 
386 typedef enum {
387 	CAM_GDEVLIST_LAST_DEVICE,
388 	CAM_GDEVLIST_LIST_CHANGED,
389 	CAM_GDEVLIST_MORE_DEVS,
390 	CAM_GDEVLIST_ERROR
391 } ccb_getdevlist_status_e;
392 
393 struct ccb_getdevlist {
394 	struct ccb_hdr		ccb_h;
395 	char 			periph_name[DEV_IDLEN];
396 	u_int32_t		unit_number;
397 	unsigned int		generation;
398 	u_int32_t		index;
399 	ccb_getdevlist_status_e	status;
400 };
401 
402 typedef enum {
403 	PERIPH_MATCH_NONE	= 0x000,
404 	PERIPH_MATCH_PATH	= 0x001,
405 	PERIPH_MATCH_TARGET	= 0x002,
406 	PERIPH_MATCH_LUN	= 0x004,
407 	PERIPH_MATCH_NAME	= 0x008,
408 	PERIPH_MATCH_UNIT	= 0x010,
409 	PERIPH_MATCH_ANY	= 0x01f
410 } periph_pattern_flags;
411 
412 struct periph_match_pattern {
413 	char			periph_name[DEV_IDLEN];
414 	u_int32_t		unit_number;
415 	path_id_t		path_id;
416 	target_id_t		target_id;
417 	lun_id_t		target_lun;
418 	periph_pattern_flags	flags;
419 };
420 
421 typedef enum {
422 	DEV_MATCH_NONE		= 0x000,
423 	DEV_MATCH_PATH		= 0x001,
424 	DEV_MATCH_TARGET	= 0x002,
425 	DEV_MATCH_LUN		= 0x004,
426 	DEV_MATCH_INQUIRY	= 0x008,
427 	DEV_MATCH_DEVID		= 0x010,
428 	DEV_MATCH_ANY		= 0x00f
429 } dev_pattern_flags;
430 
431 struct device_id_match_pattern {
432 	uint8_t id_len;
433 	uint8_t id[256];
434 };
435 
436 struct device_match_pattern {
437 	path_id_t					path_id;
438 	target_id_t					target_id;
439 	lun_id_t					target_lun;
440 	dev_pattern_flags				flags;
441 	union {
442 		struct scsi_static_inquiry_pattern	inq_pat;
443 		struct device_id_match_pattern		devid_pat;
444 	} data;
445 };
446 
447 typedef enum {
448 	BUS_MATCH_NONE		= 0x000,
449 	BUS_MATCH_PATH		= 0x001,
450 	BUS_MATCH_NAME		= 0x002,
451 	BUS_MATCH_UNIT		= 0x004,
452 	BUS_MATCH_BUS_ID	= 0x008,
453 	BUS_MATCH_ANY		= 0x00f
454 } bus_pattern_flags;
455 
456 struct bus_match_pattern {
457 	path_id_t		path_id;
458 	char			dev_name[DEV_IDLEN];
459 	u_int32_t		unit_number;
460 	u_int32_t		bus_id;
461 	bus_pattern_flags	flags;
462 };
463 
464 union match_pattern {
465 	struct periph_match_pattern	periph_pattern;
466 	struct device_match_pattern	device_pattern;
467 	struct bus_match_pattern	bus_pattern;
468 };
469 
470 typedef enum {
471 	DEV_MATCH_PERIPH,
472 	DEV_MATCH_DEVICE,
473 	DEV_MATCH_BUS
474 } dev_match_type;
475 
476 struct dev_match_pattern {
477 	dev_match_type		type;
478 	union match_pattern	pattern;
479 };
480 
481 struct periph_match_result {
482 	char			periph_name[DEV_IDLEN];
483 	u_int32_t		unit_number;
484 	path_id_t		path_id;
485 	target_id_t		target_id;
486 	lun_id_t		target_lun;
487 };
488 
489 typedef enum {
490 	DEV_RESULT_NOFLAG		= 0x00,
491 	DEV_RESULT_UNCONFIGURED		= 0x01
492 } dev_result_flags;
493 
494 struct device_match_result {
495 	path_id_t			path_id;
496 	target_id_t			target_id;
497 	lun_id_t			target_lun;
498 	cam_proto			protocol;
499 	struct scsi_inquiry_data	inq_data;
500 	struct ata_params		ident_data;
501 	dev_result_flags		flags;
502 };
503 
504 struct bus_match_result {
505 	path_id_t	path_id;
506 	char		dev_name[DEV_IDLEN];
507 	u_int32_t	unit_number;
508 	u_int32_t	bus_id;
509 };
510 
511 union match_result {
512 	struct periph_match_result	periph_result;
513 	struct device_match_result	device_result;
514 	struct bus_match_result		bus_result;
515 };
516 
517 struct dev_match_result {
518 	dev_match_type		type;
519 	union match_result	result;
520 };
521 
522 typedef enum {
523 	CAM_DEV_MATCH_LAST,
524 	CAM_DEV_MATCH_MORE,
525 	CAM_DEV_MATCH_LIST_CHANGED,
526 	CAM_DEV_MATCH_SIZE_ERROR,
527 	CAM_DEV_MATCH_ERROR
528 } ccb_dev_match_status;
529 
530 typedef enum {
531 	CAM_DEV_POS_NONE	= 0x000,
532 	CAM_DEV_POS_BUS		= 0x001,
533 	CAM_DEV_POS_TARGET	= 0x002,
534 	CAM_DEV_POS_DEVICE	= 0x004,
535 	CAM_DEV_POS_PERIPH	= 0x008,
536 	CAM_DEV_POS_PDPTR	= 0x010,
537 	CAM_DEV_POS_TYPEMASK	= 0xf00,
538 	CAM_DEV_POS_EDT		= 0x100,
539 	CAM_DEV_POS_PDRV	= 0x200
540 } dev_pos_type;
541 
542 struct ccb_dm_cookie {
543 	void 	*bus;
544 	void	*target;
545 	void	*device;
546 	void	*periph;
547 	void	*pdrv;
548 };
549 
550 struct ccb_dev_position {
551 	u_int			generations[4];
552 #define	CAM_BUS_GENERATION	0x00
553 #define CAM_TARGET_GENERATION	0x01
554 #define CAM_DEV_GENERATION	0x02
555 #define CAM_PERIPH_GENERATION	0x03
556 	dev_pos_type		position_type;
557 	struct ccb_dm_cookie	cookie;
558 };
559 
560 struct ccb_dev_match {
561 	struct ccb_hdr			ccb_h;
562 	ccb_dev_match_status		status;
563 	u_int32_t			num_patterns;
564 	u_int32_t			pattern_buf_len;
565 	struct dev_match_pattern	*patterns;
566 	u_int32_t			num_matches;
567 	u_int32_t			match_buf_len;
568 	struct dev_match_result		*matches;
569 	struct ccb_dev_position		pos;
570 };
571 
572 /*
573  * Definitions for the path inquiry CCB fields.
574  */
575 #define CAM_VERSION	0x19	/* Hex value for current version */
576 
577 typedef enum {
578 	PI_MDP_ABLE	= 0x80,	/* Supports MDP message */
579 	PI_WIDE_32	= 0x40,	/* Supports 32 bit wide SCSI */
580 	PI_WIDE_16	= 0x20, /* Supports 16 bit wide SCSI */
581 	PI_SDTR_ABLE	= 0x10,	/* Supports SDTR message */
582 	PI_LINKED_CDB	= 0x08, /* Supports linked CDBs */
583 	PI_SATAPM	= 0x04,	/* Supports SATA PM */
584 	PI_TAG_ABLE	= 0x02,	/* Supports tag queue messages */
585 	PI_SOFT_RST	= 0x01	/* Supports soft reset alternative */
586 } pi_inqflag;
587 
588 typedef enum {
589 	PIT_PROCESSOR	= 0x80,	/* Target mode processor mode */
590 	PIT_PHASE	= 0x40,	/* Target mode phase cog. mode */
591 	PIT_DISCONNECT	= 0x20,	/* Disconnects supported in target mode */
592 	PIT_TERM_IO	= 0x10,	/* Terminate I/O message supported in TM */
593 	PIT_GRP_6	= 0x08,	/* Group 6 commands supported */
594 	PIT_GRP_7	= 0x04	/* Group 7 commands supported */
595 } pi_tmflag;
596 
597 typedef enum {
598 	PIM_ATA_EXT	= 0x200,/* ATA requests can understand ata_ext requests */
599 	PIM_EXTLUNS	= 0x100,/* 64bit extended LUNs supported */
600 	PIM_SCANHILO	= 0x80,	/* Bus scans from high ID to low ID */
601 	PIM_NOREMOVE	= 0x40,	/* Removeable devices not included in scan */
602 	PIM_NOINITIATOR	= 0x20,	/* Initiator role not supported. */
603 	PIM_NOBUSRESET	= 0x10,	/* User has disabled initial BUS RESET */
604 	PIM_NO_6_BYTE	= 0x08,	/* Do not send 6-byte commands */
605 	PIM_SEQSCAN	= 0x04,	/* Do bus scans sequentially, not in parallel */
606 	PIM_UNMAPPED	= 0x02,
607 	PIM_NOSCAN	= 0x01	/* SIM does its own scanning */
608 } pi_miscflag;
609 
610 /* Path Inquiry CCB */
611 struct ccb_pathinq_settings_spi {
612 	u_int8_t ppr_options;
613 };
614 
615 struct ccb_pathinq_settings_fc {
616 	u_int64_t wwnn;		/* world wide node name */
617 	u_int64_t wwpn;		/* world wide port name */
618 	u_int32_t port;		/* 24 bit port id, if known */
619 	u_int32_t bitrate;	/* Mbps */
620 };
621 
622 struct ccb_pathinq_settings_sas {
623 	u_int32_t bitrate;	/* Mbps */
624 };
625 
626 struct ccb_pathinq_settings_nvme {
627 	uint16_t nsid;		/* Namespace ID for this path */
628 };
629 
630 #define	PATHINQ_SETTINGS_SIZE	128
631 
632 struct ccb_pathinq {
633 	struct 	    ccb_hdr ccb_h;
634 	u_int8_t    version_num;	/* Version number for the SIM/HBA */
635 	u_int8_t    hba_inquiry;	/* Mimic of INQ byte 7 for the HBA */
636 	u_int16_t   target_sprt;	/* Flags for target mode support */
637 	u_int32_t   hba_misc;		/* Misc HBA features */
638 	u_int16_t   hba_eng_cnt;	/* HBA engine count */
639 					/* Vendor Unique capabilities */
640 	u_int8_t    vuhba_flags[VUHBALEN];
641 	u_int32_t   max_target;		/* Maximum supported Target */
642 	u_int32_t   max_lun;		/* Maximum supported Lun */
643 	u_int32_t   async_flags;	/* Installed Async handlers */
644 	path_id_t   hpath_id;		/* Highest Path ID in the subsystem */
645 	target_id_t initiator_id;	/* ID of the HBA on the SCSI bus */
646 	char	    sim_vid[SIM_IDLEN];	/* Vendor ID of the SIM */
647 	char	    hba_vid[HBA_IDLEN];	/* Vendor ID of the HBA */
648 	char 	    dev_name[DEV_IDLEN];/* Device name for SIM */
649 	u_int32_t   unit_number;	/* Unit number for SIM */
650 	u_int32_t   bus_id;		/* Bus ID for SIM */
651 	u_int32_t   base_transfer_speed;/* Base bus speed in KB/sec */
652 	cam_proto   protocol;
653 	u_int	    protocol_version;
654 	cam_xport   transport;
655 	u_int	    transport_version;
656 	union {
657 		struct ccb_pathinq_settings_spi spi;
658 		struct ccb_pathinq_settings_fc fc;
659 		struct ccb_pathinq_settings_sas sas;
660 		struct ccb_pathinq_settings_nvme nvme;
661 		char ccb_pathinq_settings_opaque[PATHINQ_SETTINGS_SIZE];
662 	} xport_specific;
663 	u_int		maxio;		/* Max supported I/O size, in bytes. */
664 	u_int16_t	hba_vendor;	/* HBA vendor ID */
665 	u_int16_t	hba_device;	/* HBA device ID */
666 	u_int16_t	hba_subvendor;	/* HBA subvendor ID */
667 	u_int16_t	hba_subdevice;	/* HBA subdevice ID */
668 };
669 
670 /* Path Statistics CCB */
671 struct ccb_pathstats {
672 	struct	ccb_hdr	ccb_h;
673 	struct	timeval last_reset;	/* Time of last bus reset/loop init */
674 };
675 
676 typedef enum {
677 	SMP_FLAG_NONE		= 0x00,
678 	SMP_FLAG_REQ_SG		= 0x01,
679 	SMP_FLAG_RSP_SG		= 0x02
680 } ccb_smp_pass_flags;
681 
682 /*
683  * Serial Management Protocol CCB
684  * XXX Currently the semantics for this CCB are that it is executed either
685  * by the addressed device, or that device's parent (i.e. an expander for
686  * any device on an expander) if the addressed device doesn't support SMP.
687  * Later, once we have the ability to probe SMP-only devices and put them
688  * in CAM's topology, the CCB will only be executed by the addressed device
689  * if possible.
690  */
691 struct ccb_smpio {
692 	struct ccb_hdr		ccb_h;
693 	uint8_t			*smp_request;
694 	int			smp_request_len;
695 	uint16_t		smp_request_sglist_cnt;
696 	uint8_t			*smp_response;
697 	int			smp_response_len;
698 	uint16_t		smp_response_sglist_cnt;
699 	ccb_smp_pass_flags	flags;
700 };
701 
702 typedef union {
703 	u_int8_t *sense_ptr;		/*
704 					 * Pointer to storage
705 					 * for sense information
706 					 */
707 	                                /* Storage Area for sense information */
708 	struct	 scsi_sense_data sense_buf;
709 } sense_t;
710 
711 typedef union {
712 	u_int8_t  *cdb_ptr;		/* Pointer to the CDB bytes to send */
713 					/* Area for the CDB send */
714 	u_int8_t  cdb_bytes[IOCDBLEN];
715 } cdb_t;
716 
717 /*
718  * SCSI I/O Request CCB used for the XPT_SCSI_IO and XPT_CONT_TARGET_IO
719  * function codes.
720  */
721 struct ccb_scsiio {
722 	struct	   ccb_hdr ccb_h;
723 	union	   ccb *next_ccb;	/* Ptr for next CCB for action */
724 	u_int8_t   *req_map;		/* Ptr to mapping info */
725 	u_int8_t   *data_ptr;		/* Ptr to the data buf/SG list */
726 	u_int32_t  dxfer_len;		/* Data transfer length */
727 					/* Autosense storage */
728 	struct     scsi_sense_data sense_data;
729 	u_int8_t   sense_len;		/* Number of bytes to autosense */
730 	u_int8_t   cdb_len;		/* Number of bytes for the CDB */
731 	u_int16_t  sglist_cnt;		/* Number of SG list entries */
732 	u_int8_t   scsi_status;		/* Returned SCSI status */
733 	u_int8_t   sense_resid;		/* Autosense resid length: 2's comp */
734 	u_int32_t  resid;		/* Transfer residual length: 2's comp */
735 	cdb_t	   cdb_io;		/* Union for CDB bytes/pointer */
736 	u_int8_t   *msg_ptr;		/* Pointer to the message buffer */
737 	u_int16_t  msg_len;		/* Number of bytes for the Message */
738 	u_int8_t   tag_action;		/* What to do for tag queueing */
739 	/*
740 	 * The tag action should be either the define below (to send a
741 	 * non-tagged transaction) or one of the defined scsi tag messages
742 	 * from scsi_message.h.
743 	 */
744 #define		CAM_TAG_ACTION_NONE	0x00
745 	u_int	   tag_id;		/* tag id from initator (target mode) */
746 	u_int	   init_id;		/* initiator id of who selected */
747 };
748 
749 static __inline uint8_t *
750 scsiio_cdb_ptr(struct ccb_scsiio *ccb)
751 {
752 	return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ?
753 	    ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes);
754 }
755 
756 /*
757  * ATA I/O Request CCB used for the XPT_ATA_IO function code.
758  */
759 struct ccb_ataio {
760 	struct	   ccb_hdr ccb_h;
761 	union	   ccb *next_ccb;	/* Ptr for next CCB for action */
762 	struct ata_cmd	cmd;		/* ATA command register set */
763 	struct ata_res	res;		/* ATA result register set */
764 	u_int8_t   *data_ptr;		/* Ptr to the data buf/SG list */
765 	u_int32_t  dxfer_len;		/* Data transfer length */
766 	u_int32_t  resid;		/* Transfer residual length: 2's comp */
767 	u_int8_t   ata_flags;		/* Flags for the rest of the buffer */
768 #define ATA_FLAG_AUX 0x1
769 	uint32_t   aux;
770 	uint32_t   unused;
771 };
772 
773 struct ccb_accept_tio {
774 	struct	   ccb_hdr ccb_h;
775 	cdb_t	   cdb_io;		/* Union for CDB bytes/pointer */
776 	u_int8_t   cdb_len;		/* Number of bytes for the CDB */
777 	u_int8_t   tag_action;		/* What to do for tag queueing */
778 	u_int8_t   sense_len;		/* Number of bytes of Sense Data */
779 	u_int      tag_id;		/* tag id from initator (target mode) */
780 	u_int      init_id;		/* initiator id of who selected */
781 	struct     scsi_sense_data sense_data;
782 };
783 
784 /* Release SIM Queue */
785 struct ccb_relsim {
786 	struct ccb_hdr ccb_h;
787 	u_int32_t      release_flags;
788 #define RELSIM_ADJUST_OPENINGS		0x01
789 #define RELSIM_RELEASE_AFTER_TIMEOUT	0x02
790 #define RELSIM_RELEASE_AFTER_CMDCMPLT	0x04
791 #define RELSIM_RELEASE_AFTER_QEMPTY	0x08
792 	u_int32_t      openings;
793 	u_int32_t      release_timeout;	/* Abstract argument. */
794 	u_int32_t      qfrozen_cnt;
795 };
796 
797 /*
798  * NVMe I/O Request CCB used for the XPT_NVME_IO function code.
799  */
800 struct ccb_nvmeio {
801 	struct	   ccb_hdr ccb_h;
802 	union	   ccb *next_ccb;	/* Ptr for next CCB for action */
803 	struct nvme_command cmd;	/* NVME command, per NVME standard */
804 	struct nvme_completion cpl;	/* NVME completion, per NVME standard */
805 	uint8_t   *data_ptr;		/* Ptr to the data buf/SG list */
806 	uint32_t  dxfer_len;		/* Data transfer length */
807 	uint32_t  resid;		/* Transfer residual length: 2's comp unused ?*/
808 };
809 
810 /*
811  * Definitions for the asynchronous callback CCB fields.
812  */
813 typedef enum {
814 	AC_UNIT_ATTENTION	= 0x4000,/* Device reported UNIT ATTENTION */
815 	AC_ADVINFO_CHANGED	= 0x2000,/* Advance info might have changes */
816 	AC_CONTRACT		= 0x1000,/* A contractual callback */
817 	AC_GETDEV_CHANGED	= 0x800,/* Getdev info might have changed */
818 	AC_INQ_CHANGED		= 0x400,/* Inquiry info might have changed */
819 	AC_TRANSFER_NEG		= 0x200,/* New transfer settings in effect */
820 	AC_LOST_DEVICE		= 0x100,/* A device went away */
821 	AC_FOUND_DEVICE		= 0x080,/* A new device was found */
822 	AC_PATH_DEREGISTERED	= 0x040,/* A path has de-registered */
823 	AC_PATH_REGISTERED	= 0x020,/* A new path has been registered */
824 	AC_SENT_BDR		= 0x010,/* A BDR message was sent to target */
825 	AC_SCSI_AEN		= 0x008,/* A SCSI AEN has been received */
826 	AC_UNSOL_RESEL		= 0x002,/* Unsolicited reselection occurred */
827 	AC_BUS_RESET		= 0x001	/* A SCSI bus reset occurred */
828 } ac_code;
829 
830 typedef void ac_callback_t (void *softc, u_int32_t code,
831 			    struct cam_path *path, void *args);
832 
833 /*
834  * Generic Asynchronous callbacks.
835  *
836  * Generic arguments passed bac which are then interpreted between a per-system
837  * contract number.
838  */
839 #define	AC_CONTRACT_DATA_MAX (128 - sizeof (u_int64_t))
840 struct ac_contract {
841 	u_int64_t	contract_number;
842 	u_int8_t	contract_data[AC_CONTRACT_DATA_MAX];
843 };
844 
845 #define	AC_CONTRACT_DEV_CHG	1
846 struct ac_device_changed {
847 	u_int64_t	wwpn;
848 	u_int32_t	port;
849 	target_id_t	target;
850 	u_int8_t	arrived;
851 };
852 
853 /* Set Asynchronous Callback CCB */
854 struct ccb_setasync {
855 	struct ccb_hdr	 ccb_h;
856 	u_int32_t	 event_enable;	/* Async Event enables */
857 	ac_callback_t	*callback;
858 	void		*callback_arg;
859 };
860 
861 /* Set Device Type CCB */
862 struct ccb_setdev {
863 	struct	   ccb_hdr ccb_h;
864 	u_int8_t   dev_type;	/* Value for dev type field in EDT */
865 };
866 
867 /* SCSI Control Functions */
868 
869 /* Abort XPT request CCB */
870 struct ccb_abort {
871 	struct 	ccb_hdr ccb_h;
872 	union	ccb *abort_ccb;	/* Pointer to CCB to abort */
873 };
874 
875 /* Reset SCSI Bus CCB */
876 struct ccb_resetbus {
877 	struct	ccb_hdr ccb_h;
878 };
879 
880 /* Reset SCSI Device CCB */
881 struct ccb_resetdev {
882 	struct	ccb_hdr ccb_h;
883 };
884 
885 /* Terminate I/O Process Request CCB */
886 struct ccb_termio {
887 	struct	ccb_hdr ccb_h;
888 	union	ccb *termio_ccb;	/* Pointer to CCB to terminate */
889 };
890 
891 typedef enum {
892 	CTS_TYPE_CURRENT_SETTINGS,
893 	CTS_TYPE_USER_SETTINGS
894 } cts_type;
895 
896 struct ccb_trans_settings_scsi
897 {
898 	u_int	valid;	/* Which fields to honor */
899 #define	CTS_SCSI_VALID_TQ		0x01
900 	u_int	flags;
901 #define	CTS_SCSI_FLAGS_TAG_ENB		0x01
902 };
903 
904 struct ccb_trans_settings_ata
905 {
906 	u_int	valid;	/* Which fields to honor */
907 #define	CTS_ATA_VALID_TQ		0x01
908 	u_int	flags;
909 #define	CTS_ATA_FLAGS_TAG_ENB		0x01
910 };
911 
912 struct ccb_trans_settings_spi
913 {
914 	u_int	  valid;	/* Which fields to honor */
915 #define	CTS_SPI_VALID_SYNC_RATE		0x01
916 #define	CTS_SPI_VALID_SYNC_OFFSET	0x02
917 #define	CTS_SPI_VALID_BUS_WIDTH		0x04
918 #define	CTS_SPI_VALID_DISC		0x08
919 #define CTS_SPI_VALID_PPR_OPTIONS	0x10
920 	u_int	flags;
921 #define	CTS_SPI_FLAGS_DISC_ENB		0x01
922 	u_int	sync_period;
923 	u_int	sync_offset;
924 	u_int	bus_width;
925 	u_int	ppr_options;
926 };
927 
928 struct ccb_trans_settings_fc {
929 	u_int     	valid;		/* Which fields to honor */
930 #define	CTS_FC_VALID_WWNN		0x8000
931 #define	CTS_FC_VALID_WWPN		0x4000
932 #define	CTS_FC_VALID_PORT		0x2000
933 #define	CTS_FC_VALID_SPEED		0x1000
934 	u_int64_t	wwnn;		/* world wide node name */
935 	u_int64_t 	wwpn;		/* world wide port name */
936 	u_int32_t 	port;		/* 24 bit port id, if known */
937 	u_int32_t 	bitrate;	/* Mbps */
938 };
939 
940 struct ccb_trans_settings_sas {
941 	u_int     	valid;		/* Which fields to honor */
942 #define	CTS_SAS_VALID_SPEED		0x1000
943 	u_int32_t 	bitrate;	/* Mbps */
944 };
945 
946 struct ccb_trans_settings_pata {
947 	u_int     	valid;		/* Which fields to honor */
948 #define	CTS_ATA_VALID_MODE		0x01
949 #define	CTS_ATA_VALID_BYTECOUNT		0x02
950 #define	CTS_ATA_VALID_ATAPI		0x20
951 #define	CTS_ATA_VALID_CAPS		0x40
952 	int		mode;		/* Mode */
953 	u_int 		bytecount;	/* Length of PIO transaction */
954 	u_int 		atapi;		/* Length of ATAPI CDB */
955 	u_int 		caps;		/* Device and host SATA caps. */
956 #define	CTS_ATA_CAPS_H			0x0000ffff
957 #define	CTS_ATA_CAPS_H_DMA48		0x00000001 /* 48-bit DMA */
958 #define	CTS_ATA_CAPS_D			0xffff0000
959 };
960 
961 struct ccb_trans_settings_sata {
962 	u_int     	valid;		/* Which fields to honor */
963 #define	CTS_SATA_VALID_MODE		0x01
964 #define	CTS_SATA_VALID_BYTECOUNT	0x02
965 #define	CTS_SATA_VALID_REVISION		0x04
966 #define	CTS_SATA_VALID_PM		0x08
967 #define	CTS_SATA_VALID_TAGS		0x10
968 #define	CTS_SATA_VALID_ATAPI		0x20
969 #define	CTS_SATA_VALID_CAPS		0x40
970 	int		mode;		/* Legacy PATA mode */
971 	u_int 		bytecount;	/* Length of PIO transaction */
972 	int		revision;	/* SATA revision */
973 	u_int 		pm_present;	/* PM is present (XPT->SIM) */
974 	u_int 		tags;		/* Number of allowed tags */
975 	u_int 		atapi;		/* Length of ATAPI CDB */
976 	u_int 		caps;		/* Device and host SATA caps. */
977 #define	CTS_SATA_CAPS_H			0x0000ffff
978 #define	CTS_SATA_CAPS_H_PMREQ		0x00000001
979 #define	CTS_SATA_CAPS_H_APST		0x00000002
980 #define	CTS_SATA_CAPS_H_DMAAA		0x00000010 /* Auto-activation */
981 #define	CTS_SATA_CAPS_H_AN		0x00000020 /* Async. notification */
982 #define	CTS_SATA_CAPS_D			0xffff0000
983 #define	CTS_SATA_CAPS_D_PMREQ		0x00010000
984 #define	CTS_SATA_CAPS_D_APST		0x00020000
985 };
986 
987 struct ccb_trans_settings_nvme
988 {
989 	u_int     	valid;		/* Which fields to honor */
990 #define CTS_NVME_VALID_SPEC	0x01
991 #define CTS_NVME_VALID_CAPS	0x02
992 	u_int		spec_major;	/* Major version of spec supported */
993 	u_int		spec_minor;	/* Minor verison of spec supported */
994 	u_int		spec_tiny;	/* Tiny version of spec supported */
995 	u_int		max_xfer;	/* Max transfer size (0 -> unlimited */
996 	u_int		caps;
997 };
998 
999 /* Get/Set transfer rate/width/disconnection/tag queueing settings */
1000 struct ccb_trans_settings {
1001 	struct	  ccb_hdr ccb_h;
1002 	cts_type  type;		/* Current or User settings */
1003 	cam_proto protocol;
1004 	u_int	  protocol_version;
1005 	cam_xport transport;
1006 	u_int	  transport_version;
1007 	union {
1008 		u_int  valid;	/* Which fields to honor */
1009 		struct ccb_trans_settings_ata ata;
1010 		struct ccb_trans_settings_scsi scsi;
1011 		struct ccb_trans_settings_nvme nvme;
1012 	} proto_specific;
1013 	union {
1014 		u_int  valid;	/* Which fields to honor */
1015 		struct ccb_trans_settings_spi spi;
1016 		struct ccb_trans_settings_fc fc;
1017 		struct ccb_trans_settings_sas sas;
1018 		struct ccb_trans_settings_pata ata;
1019 		struct ccb_trans_settings_sata sata;
1020 		struct ccb_trans_settings_nvme nvme;
1021 	} xport_specific;
1022 };
1023 
1024 
1025 /*
1026  * Calculate the geometry parameters for a device
1027  * give the block size and volume size in blocks.
1028  */
1029 struct ccb_calc_geometry {
1030 	struct	  ccb_hdr ccb_h;
1031 	u_int32_t block_size;
1032 	u_int64_t volume_size;
1033 	u_int32_t cylinders;
1034 	u_int8_t  heads;
1035 	u_int8_t  secs_per_track;
1036 };
1037 
1038 /*
1039  * Set or get SIM (and transport) specific knobs
1040  */
1041 
1042 #define	KNOB_VALID_ADDRESS	0x1
1043 #define	KNOB_VALID_ROLE		0x2
1044 
1045 
1046 #define	KNOB_ROLE_NONE		0x0
1047 #define	KNOB_ROLE_INITIATOR	0x1
1048 #define	KNOB_ROLE_TARGET	0x2
1049 #define	KNOB_ROLE_BOTH		0x3
1050 
1051 struct ccb_sim_knob_settings_spi {
1052 	u_int		valid;
1053 	u_int		initiator_id;
1054 	u_int		role;
1055 };
1056 
1057 struct ccb_sim_knob_settings_fc {
1058 	u_int		valid;
1059 	u_int64_t	wwnn;		/* world wide node name */
1060 	u_int64_t 	wwpn;		/* world wide port name */
1061 	u_int		role;
1062 };
1063 
1064 struct ccb_sim_knob_settings_sas {
1065 	u_int		valid;
1066 	u_int64_t	wwnn;		/* world wide node name */
1067 	u_int		role;
1068 };
1069 #define	KNOB_SETTINGS_SIZE	128
1070 
1071 struct ccb_sim_knob {
1072 	struct	  ccb_hdr ccb_h;
1073 	union {
1074 		u_int  valid;	/* Which fields to honor */
1075 		struct ccb_sim_knob_settings_spi spi;
1076 		struct ccb_sim_knob_settings_fc fc;
1077 		struct ccb_sim_knob_settings_sas sas;
1078 		char pad[KNOB_SETTINGS_SIZE];
1079 	} xport_specific;
1080 };
1081 
1082 /*
1083  * Rescan the given bus, or bus/target/lun
1084  */
1085 struct ccb_rescan {
1086 	struct	ccb_hdr ccb_h;
1087 	cam_flags	flags;
1088 };
1089 
1090 /*
1091  * Turn on debugging for the given bus, bus/target, or bus/target/lun.
1092  */
1093 struct ccb_debug {
1094 	struct	ccb_hdr ccb_h;
1095 	cam_debug_flags flags;
1096 };
1097 
1098 /* Target mode structures. */
1099 
1100 struct ccb_en_lun {
1101 	struct	  ccb_hdr ccb_h;
1102 	u_int16_t grp6_len;		/* Group 6 VU CDB length */
1103 	u_int16_t grp7_len;		/* Group 7 VU CDB length */
1104 	u_int8_t  enable;
1105 };
1106 
1107 /* old, barely used immediate notify, binary compatibility */
1108 struct ccb_immed_notify {
1109 	struct	  ccb_hdr ccb_h;
1110 	struct    scsi_sense_data sense_data;
1111 	u_int8_t  sense_len;		/* Number of bytes in sense buffer */
1112 	u_int8_t  initiator_id;		/* Id of initiator that selected */
1113 	u_int8_t  message_args[7];	/* Message Arguments */
1114 };
1115 
1116 struct ccb_notify_ack {
1117 	struct	  ccb_hdr ccb_h;
1118 	u_int16_t seq_id;		/* Sequence identifier */
1119 	u_int8_t  event;		/* Event flags */
1120 };
1121 
1122 struct ccb_immediate_notify {
1123 	struct    ccb_hdr ccb_h;
1124 	u_int     tag_id;		/* Tag for immediate notify */
1125 	u_int     seq_id;		/* Tag for target of notify */
1126 	u_int     initiator_id;		/* Initiator Identifier */
1127 	u_int     arg;			/* Function specific */
1128 };
1129 
1130 struct ccb_notify_acknowledge {
1131 	struct    ccb_hdr ccb_h;
1132 	u_int     tag_id;		/* Tag for immediate notify */
1133 	u_int     seq_id;		/* Tar for target of notify */
1134 	u_int     initiator_id;		/* Initiator Identifier */
1135 	u_int     arg;			/* Response information */
1136 	/*
1137 	 * Lower byte of arg is one of RESPONSE CODE values defined below
1138 	 * (subset of response codes from SPL-4 and FCP-4 specifications),
1139 	 * upper 3 bytes is code-specific ADDITIONAL RESPONSE INFORMATION.
1140 	 */
1141 #define	CAM_RSP_TMF_COMPLETE		0x00
1142 #define	CAM_RSP_TMF_REJECTED		0x04
1143 #define	CAM_RSP_TMF_FAILED		0x05
1144 #define	CAM_RSP_TMF_SUCCEEDED		0x08
1145 #define	CAM_RSP_TMF_INCORRECT_LUN	0x09
1146 };
1147 
1148 /* HBA engine structures. */
1149 
1150 typedef enum {
1151 	EIT_BUFFER,	/* Engine type: buffer memory */
1152 	EIT_LOSSLESS,	/* Engine type: lossless compression */
1153 	EIT_LOSSY,	/* Engine type: lossy compression */
1154 	EIT_ENCRYPT	/* Engine type: encryption */
1155 } ei_type;
1156 
1157 typedef enum {
1158 	EAD_VUNIQUE,	/* Engine algorithm ID: vendor unique */
1159 	EAD_LZ1V1,	/* Engine algorithm ID: LZ1 var.1 */
1160 	EAD_LZ2V1,	/* Engine algorithm ID: LZ2 var.1 */
1161 	EAD_LZ2V2	/* Engine algorithm ID: LZ2 var.2 */
1162 } ei_algo;
1163 
1164 struct ccb_eng_inq {
1165 	struct	  ccb_hdr ccb_h;
1166 	u_int16_t eng_num;	/* The engine number for this inquiry */
1167 	ei_type   eng_type;	/* Returned engine type */
1168 	ei_algo   eng_algo;	/* Returned engine algorithm type */
1169 	u_int32_t eng_memeory;	/* Returned engine memory size */
1170 };
1171 
1172 struct ccb_eng_exec {	/* This structure must match SCSIIO size */
1173 	struct	  ccb_hdr ccb_h;
1174 	u_int8_t  *pdrv_ptr;	/* Ptr used by the peripheral driver */
1175 	u_int8_t  *req_map;	/* Ptr for mapping info on the req. */
1176 	u_int8_t  *data_ptr;	/* Pointer to the data buf/SG list */
1177 	u_int32_t dxfer_len;	/* Data transfer length */
1178 	u_int8_t  *engdata_ptr;	/* Pointer to the engine buffer data */
1179 	u_int16_t sglist_cnt;	/* Num of scatter gather list entries */
1180 	u_int32_t dmax_len;	/* Destination data maximum length */
1181 	u_int32_t dest_len;	/* Destination data length */
1182 	int32_t	  src_resid;	/* Source residual length: 2's comp */
1183 	u_int32_t timeout;	/* Timeout value */
1184 	u_int16_t eng_num;	/* Engine number for this request */
1185 	u_int16_t vu_flags;	/* Vendor Unique flags */
1186 };
1187 
1188 /*
1189  * Definitions for the timeout field in the SCSI I/O CCB.
1190  */
1191 #define	CAM_TIME_DEFAULT	0x00000000	/* Use SIM default value */
1192 #define	CAM_TIME_INFINITY	0xFFFFFFFF	/* Infinite timeout */
1193 
1194 #define	CAM_SUCCESS	0	/* For signaling general success */
1195 #define	CAM_FAILURE	1	/* For signaling general failure */
1196 
1197 #define CAM_FALSE	0
1198 #define CAM_TRUE	1
1199 
1200 #define XPT_CCB_INVALID	-1	/* for signaling a bad CCB to free */
1201 
1202 /*
1203  * CCB for working with advanced device information.  This operates in a fashion
1204  * similar to XPT_GDEV_TYPE.  Specify the target in ccb_h, the buffer
1205  * type requested, and provide a buffer size/buffer to write to.  If the
1206  * buffer is too small, provsiz will be larger than bufsiz.
1207  */
1208 struct ccb_dev_advinfo {
1209 	struct ccb_hdr ccb_h;
1210 	uint32_t flags;
1211 #define	CDAI_FLAG_NONE		0x0	/* No flags set */
1212 #define	CDAI_FLAG_STORE		0x1	/* If set, action becomes store */
1213 	uint32_t buftype;		/* IN: Type of data being requested */
1214 	/* NB: buftype is interpreted on a per-transport basis */
1215 #define	CDAI_TYPE_SCSI_DEVID	1
1216 #define	CDAI_TYPE_SERIAL_NUM	2
1217 #define	CDAI_TYPE_PHYS_PATH	3
1218 #define	CDAI_TYPE_RCAPLONG	4
1219 #define	CDAI_TYPE_EXT_INQ	5
1220 	off_t bufsiz;			/* IN: Size of external buffer */
1221 #define	CAM_SCSI_DEVID_MAXLEN	65536	/* length in buffer is an uint16_t */
1222 	off_t provsiz;			/* OUT: Size required/used */
1223 	uint8_t *buf;			/* IN/OUT: Buffer for requested data */
1224 };
1225 
1226 /*
1227  * CCB for sending async events
1228  */
1229 struct ccb_async {
1230 	struct ccb_hdr ccb_h;
1231 	uint32_t async_code;
1232 	off_t async_arg_size;
1233 	void *async_arg_ptr;
1234 };
1235 
1236 /*
1237  * Union of all CCB types for kernel space allocation.  This union should
1238  * never be used for manipulating CCBs - its only use is for the allocation
1239  * and deallocation of raw CCB space and is the return type of xpt_ccb_alloc
1240  * and the argument to xpt_ccb_free.
1241  */
1242 union ccb {
1243 	struct	ccb_hdr			ccb_h;	/* For convenience */
1244 	struct	ccb_scsiio		csio;
1245 	struct	ccb_getdev		cgd;
1246 	struct	ccb_getdevlist		cgdl;
1247 	struct	ccb_pathinq		cpi;
1248 	struct	ccb_relsim		crs;
1249 	struct	ccb_setasync		csa;
1250 	struct	ccb_setdev		csd;
1251 	struct	ccb_pathstats		cpis;
1252 	struct	ccb_getdevstats		cgds;
1253 	struct	ccb_dev_match		cdm;
1254 	struct	ccb_trans_settings	cts;
1255 	struct	ccb_calc_geometry	ccg;
1256 	struct	ccb_sim_knob		knob;
1257 	struct	ccb_abort		cab;
1258 	struct	ccb_resetbus		crb;
1259 	struct	ccb_resetdev		crd;
1260 	struct	ccb_termio		tio;
1261 	struct	ccb_accept_tio		atio;
1262 	struct	ccb_scsiio		ctio;
1263 	struct	ccb_en_lun		cel;
1264 	struct	ccb_immed_notify	cin;
1265 	struct	ccb_notify_ack		cna;
1266 	struct	ccb_immediate_notify	cin1;
1267 	struct	ccb_notify_acknowledge	cna2;
1268 	struct	ccb_eng_inq		cei;
1269 	struct	ccb_eng_exec		cee;
1270 	struct	ccb_smpio		smpio;
1271 	struct 	ccb_rescan		crcn;
1272 	struct  ccb_debug		cdbg;
1273 	struct	ccb_ataio		ataio;
1274 	struct	ccb_dev_advinfo		cdai;
1275 	struct	ccb_async		casync;
1276 	struct	ccb_nvmeio		nvmeio;
1277 };
1278 
1279 #define CCB_CLEAR_ALL_EXCEPT_HDR(ccbp)			\
1280 	bzero((char *)(ccbp) + sizeof((ccbp)->ccb_h),	\
1281 	    sizeof(*(ccbp)) - sizeof((ccbp)->ccb_h))
1282 
1283 __BEGIN_DECLS
1284 static __inline void
1285 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries,
1286 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1287 	      u_int32_t flags, u_int8_t tag_action,
1288 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1289 	      u_int8_t sense_len, u_int8_t cdb_len,
1290 	      u_int32_t timeout);
1291 
1292 static __inline void
1293 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1294 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1295 	      u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1296 	      u_int32_t timeout);
1297 
1298 static __inline void
1299 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries,
1300 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1301 	      u_int32_t flags, u_int tag_action, u_int tag_id,
1302 	      u_int init_id, u_int scsi_status, u_int8_t *data_ptr,
1303 	      u_int32_t dxfer_len, u_int32_t timeout);
1304 
1305 static __inline void
1306 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries,
1307 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1308 	      u_int32_t flags, u_int tag_action,
1309 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1310 	      u_int32_t timeout);
1311 
1312 static __inline void
1313 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries,
1314 	       void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1315 	       uint8_t *smp_request, int smp_request_len,
1316 	       uint8_t *smp_response, int smp_response_len,
1317 	       uint32_t timeout);
1318 
1319 static __inline void
1320 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries,
1321 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1322 	      u_int32_t flags, u_int8_t tag_action,
1323 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1324 	      u_int8_t sense_len, u_int8_t cdb_len,
1325 	      u_int32_t timeout)
1326 {
1327 	csio->ccb_h.func_code = XPT_SCSI_IO;
1328 	csio->ccb_h.flags = flags;
1329 	csio->ccb_h.xflags = 0;
1330 	csio->ccb_h.retry_count = retries;
1331 	csio->ccb_h.cbfcnp = cbfcnp;
1332 	csio->ccb_h.timeout = timeout;
1333 	csio->data_ptr = data_ptr;
1334 	csio->dxfer_len = dxfer_len;
1335 	csio->sense_len = sense_len;
1336 	csio->cdb_len = cdb_len;
1337 	csio->tag_action = tag_action;
1338 }
1339 
1340 static __inline void
1341 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries,
1342 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1343 	      u_int32_t flags, u_int tag_action, u_int tag_id,
1344 	      u_int init_id, u_int scsi_status, u_int8_t *data_ptr,
1345 	      u_int32_t dxfer_len, u_int32_t timeout)
1346 {
1347 	csio->ccb_h.func_code = XPT_CONT_TARGET_IO;
1348 	csio->ccb_h.flags = flags;
1349 	csio->ccb_h.xflags = 0;
1350 	csio->ccb_h.retry_count = retries;
1351 	csio->ccb_h.cbfcnp = cbfcnp;
1352 	csio->ccb_h.timeout = timeout;
1353 	csio->data_ptr = data_ptr;
1354 	csio->dxfer_len = dxfer_len;
1355 	csio->scsi_status = scsi_status;
1356 	csio->tag_action = tag_action;
1357 	csio->tag_id = tag_id;
1358 	csio->init_id = init_id;
1359 }
1360 
1361 static __inline void
1362 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries,
1363 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1364 	      u_int32_t flags, u_int tag_action __unused,
1365 	      u_int8_t *data_ptr, u_int32_t dxfer_len,
1366 	      u_int32_t timeout)
1367 {
1368 	ataio->ccb_h.func_code = XPT_ATA_IO;
1369 	ataio->ccb_h.flags = flags;
1370 	ataio->ccb_h.retry_count = retries;
1371 	ataio->ccb_h.cbfcnp = cbfcnp;
1372 	ataio->ccb_h.timeout = timeout;
1373 	ataio->data_ptr = data_ptr;
1374 	ataio->dxfer_len = dxfer_len;
1375 	ataio->ata_flags = 0;
1376 }
1377 
1378 static __inline void
1379 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries,
1380 	       void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags,
1381 	       uint8_t *smp_request, int smp_request_len,
1382 	       uint8_t *smp_response, int smp_response_len,
1383 	       uint32_t timeout)
1384 {
1385 #ifdef _KERNEL
1386 	KASSERT((flags & CAM_DIR_MASK) == CAM_DIR_BOTH,
1387 		("direction != CAM_DIR_BOTH"));
1388 	KASSERT((smp_request != NULL) && (smp_response != NULL),
1389 		("need valid request and response buffers"));
1390 	KASSERT((smp_request_len != 0) && (smp_response_len != 0),
1391 		("need non-zero request and response lengths"));
1392 #endif /*_KERNEL*/
1393 	smpio->ccb_h.func_code = XPT_SMP_IO;
1394 	smpio->ccb_h.flags = flags;
1395 	smpio->ccb_h.retry_count = retries;
1396 	smpio->ccb_h.cbfcnp = cbfcnp;
1397 	smpio->ccb_h.timeout = timeout;
1398 	smpio->smp_request = smp_request;
1399 	smpio->smp_request_len = smp_request_len;
1400 	smpio->smp_response = smp_response;
1401 	smpio->smp_response_len = smp_response_len;
1402 }
1403 
1404 static __inline void
1405 cam_set_ccbstatus(union ccb *ccb, cam_status status)
1406 {
1407 	ccb->ccb_h.status &= ~CAM_STATUS_MASK;
1408 	ccb->ccb_h.status |= status;
1409 }
1410 
1411 static __inline cam_status
1412 cam_ccb_status(union ccb *ccb)
1413 {
1414 	return ((cam_status)(ccb->ccb_h.status & CAM_STATUS_MASK));
1415 }
1416 
1417 void cam_calc_geometry(struct ccb_calc_geometry *ccg, int extended);
1418 
1419 static __inline void
1420 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries,
1421 	      void (*cbfcnp)(struct cam_periph *, union ccb *),
1422 	      u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len,
1423 	      u_int32_t timeout)
1424 {
1425 	nvmeio->ccb_h.func_code = XPT_NVME_IO;
1426 	nvmeio->ccb_h.flags = flags;
1427 	nvmeio->ccb_h.retry_count = retries;
1428 	nvmeio->ccb_h.cbfcnp = cbfcnp;
1429 	nvmeio->ccb_h.timeout = timeout;
1430 	nvmeio->data_ptr = data_ptr;
1431 	nvmeio->dxfer_len = dxfer_len;
1432 }
1433 __END_DECLS
1434 
1435 #endif /* _CAM_CAM_CCB_H */
1436