1 /*- 2 * Data structures and definitions for CAM Control Blocks (CCBs). 3 * 4 * Copyright (c) 1997, 1998 Justin T. Gibbs. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 #ifndef _CAM_CAM_CCB_H 32 #define _CAM_CAM_CCB_H 1 33 34 #include <sys/queue.h> 35 #include <sys/cdefs.h> 36 #include <sys/time.h> 37 #include <sys/limits.h> 38 #ifndef _KERNEL 39 #include <sys/callout.h> 40 #endif 41 #include <cam/cam_debug.h> 42 #include <cam/scsi/scsi_all.h> 43 #include <cam/ata/ata_all.h> 44 #include <cam/nvme/nvme_all.h> 45 #include <cam/mmc/mmc_all.h> 46 47 /* General allocation length definitions for CCB structures */ 48 #define IOCDBLEN CAM_MAX_CDBLEN /* Space for CDB bytes/pointer */ 49 #define VUHBALEN 14 /* Vendor Unique HBA length */ 50 #define SIM_IDLEN 16 /* ASCII string len for SIM ID */ 51 #define HBA_IDLEN 16 /* ASCII string len for HBA ID */ 52 #define DEV_IDLEN 16 /* ASCII string len for device names */ 53 #define CCB_PERIPH_PRIV_SIZE 2 /* size of peripheral private area */ 54 #define CCB_SIM_PRIV_SIZE 2 /* size of sim private area */ 55 56 /* Struct definitions for CAM control blocks */ 57 58 /* Common CCB header */ 59 /* CAM CCB flags */ 60 typedef enum { 61 CAM_CDB_POINTER = 0x00000001,/* The CDB field is a pointer */ 62 CAM_QUEUE_ENABLE = 0x00000002,/* SIM queue actions are enabled */ 63 CAM_CDB_LINKED = 0x00000004,/* CCB contains a linked CDB */ 64 CAM_NEGOTIATE = 0x00000008,/* 65 * Perform transport negotiation 66 * with this command. 67 */ 68 CAM_DATA_ISPHYS = 0x00000010,/* Data type with physical addrs */ 69 CAM_DIS_AUTOSENSE = 0x00000020,/* Disable autosense feature */ 70 CAM_DIR_BOTH = 0x00000000,/* Data direction (00:IN/OUT) */ 71 CAM_DIR_IN = 0x00000040,/* Data direction (01:DATA IN) */ 72 CAM_DIR_OUT = 0x00000080,/* Data direction (10:DATA OUT) */ 73 CAM_DIR_NONE = 0x000000C0,/* Data direction (11:no data) */ 74 CAM_DIR_MASK = 0x000000C0,/* Data direction Mask */ 75 CAM_DATA_VADDR = 0x00000000,/* Data type (000:Virtual) */ 76 CAM_DATA_PADDR = 0x00000010,/* Data type (001:Physical) */ 77 CAM_DATA_SG = 0x00040000,/* Data type (010:sglist) */ 78 CAM_DATA_SG_PADDR = 0x00040010,/* Data type (011:sglist phys) */ 79 CAM_DATA_BIO = 0x00200000,/* Data type (100:bio) */ 80 CAM_DATA_MASK = 0x00240010,/* Data type mask */ 81 CAM_SOFT_RST_OP = 0x00000100,/* Use Soft reset alternative */ 82 CAM_ENG_SYNC = 0x00000200,/* Flush resid bytes on complete */ 83 CAM_DEV_QFRZDIS = 0x00000400,/* Disable DEV Q freezing */ 84 CAM_DEV_QFREEZE = 0x00000800,/* Freeze DEV Q on execution */ 85 CAM_HIGH_POWER = 0x00001000,/* Command takes a lot of power */ 86 CAM_SENSE_PTR = 0x00002000,/* Sense data is a pointer */ 87 CAM_SENSE_PHYS = 0x00004000,/* Sense pointer is physical addr*/ 88 CAM_TAG_ACTION_VALID = 0x00008000,/* Use the tag action in this ccb*/ 89 CAM_PASS_ERR_RECOVER = 0x00010000,/* Pass driver does err. recovery*/ 90 CAM_DIS_DISCONNECT = 0x00020000,/* Disable disconnect */ 91 CAM_MSG_BUF_PHYS = 0x00080000,/* Message buffer ptr is physical*/ 92 CAM_SNS_BUF_PHYS = 0x00100000,/* Autosense data ptr is physical*/ 93 CAM_CDB_PHYS = 0x00400000,/* CDB poiner is physical */ 94 CAM_ENG_SGLIST = 0x00800000,/* SG list is for the HBA engine */ 95 96 /* Phase cognizant mode flags */ 97 CAM_DIS_AUTOSRP = 0x01000000,/* Disable autosave/restore ptrs */ 98 CAM_DIS_AUTODISC = 0x02000000,/* Disable auto disconnect */ 99 CAM_TGT_CCB_AVAIL = 0x04000000,/* Target CCB available */ 100 CAM_TGT_PHASE_MODE = 0x08000000,/* The SIM runs in phase mode */ 101 CAM_MSGB_VALID = 0x10000000,/* Message buffer valid */ 102 CAM_STATUS_VALID = 0x20000000,/* Status buffer valid */ 103 CAM_DATAB_VALID = 0x40000000,/* Data buffer valid */ 104 105 /* Host target Mode flags */ 106 CAM_SEND_SENSE = 0x08000000,/* Send sense data with status */ 107 CAM_TERM_IO = 0x10000000,/* Terminate I/O Message sup. */ 108 CAM_DISCONNECT = 0x20000000,/* Disconnects are mandatory */ 109 CAM_SEND_STATUS = 0x40000000,/* Send status after data phase */ 110 111 CAM_UNLOCKED = 0x80000000 /* Call callback without lock. */ 112 } ccb_flags; 113 114 typedef enum { 115 CAM_USER_DATA_ADDR = 0x00000002,/* Userspace data pointers */ 116 CAM_SG_FORMAT_IOVEC = 0x00000004,/* iovec instead of busdma S/G*/ 117 CAM_UNMAPPED_BUF = 0x00000008 /* use unmapped I/O */ 118 } ccb_xflags; 119 120 /* XPT Opcodes for xpt_action */ 121 typedef enum { 122 /* Function code flags are bits greater than 0xff */ 123 XPT_FC_QUEUED = 0x100, 124 /* Non-immediate function code */ 125 XPT_FC_USER_CCB = 0x200, 126 XPT_FC_XPT_ONLY = 0x400, 127 /* Only for the transport layer device */ 128 XPT_FC_DEV_QUEUED = 0x800 | XPT_FC_QUEUED, 129 /* Passes through the device queues */ 130 /* Common function commands: 0x00->0x0F */ 131 XPT_NOOP = 0x00, 132 /* Execute Nothing */ 133 XPT_SCSI_IO = 0x01 | XPT_FC_DEV_QUEUED, 134 /* Execute the requested I/O operation */ 135 XPT_GDEV_TYPE = 0x02, 136 /* Get type information for specified device */ 137 XPT_GDEVLIST = 0x03, 138 /* Get a list of peripheral devices */ 139 XPT_PATH_INQ = 0x04, 140 /* Path routing inquiry */ 141 XPT_REL_SIMQ = 0x05, 142 /* Release a frozen device queue */ 143 XPT_SASYNC_CB = 0x06, 144 /* Set Asynchronous Callback Parameters */ 145 XPT_SDEV_TYPE = 0x07, 146 /* Set device type information */ 147 XPT_SCAN_BUS = 0x08 | XPT_FC_QUEUED | XPT_FC_USER_CCB 148 | XPT_FC_XPT_ONLY, 149 /* (Re)Scan the SCSI Bus */ 150 XPT_DEV_MATCH = 0x09 | XPT_FC_XPT_ONLY, 151 /* Get EDT entries matching the given pattern */ 152 XPT_DEBUG = 0x0a, 153 /* Turn on debugging for a bus, target or lun */ 154 XPT_PATH_STATS = 0x0b, 155 /* Path statistics (error counts, etc.) */ 156 XPT_GDEV_STATS = 0x0c, 157 /* Device statistics (error counts, etc.) */ 158 XPT_DEV_ADVINFO = 0x0e, 159 /* Get/Set Device advanced information */ 160 XPT_ASYNC = 0x0f | XPT_FC_QUEUED | XPT_FC_USER_CCB 161 | XPT_FC_XPT_ONLY, 162 /* Asynchronous event */ 163 /* SCSI Control Functions: 0x10->0x1F */ 164 XPT_ABORT = 0x10, 165 /* Abort the specified CCB */ 166 XPT_RESET_BUS = 0x11 | XPT_FC_XPT_ONLY, 167 /* Reset the specified SCSI bus */ 168 XPT_RESET_DEV = 0x12 | XPT_FC_DEV_QUEUED, 169 /* Bus Device Reset the specified SCSI device */ 170 XPT_TERM_IO = 0x13, 171 /* Terminate the I/O process */ 172 XPT_SCAN_LUN = 0x14 | XPT_FC_QUEUED | XPT_FC_USER_CCB 173 | XPT_FC_XPT_ONLY, 174 /* Scan Logical Unit */ 175 XPT_GET_TRAN_SETTINGS = 0x15, 176 /* 177 * Get default/user transfer settings 178 * for the target 179 */ 180 XPT_SET_TRAN_SETTINGS = 0x16, 181 /* 182 * Set transfer rate/width 183 * negotiation settings 184 */ 185 XPT_CALC_GEOMETRY = 0x17, 186 /* 187 * Calculate the geometry parameters for 188 * a device give the sector size and 189 * volume size. 190 */ 191 XPT_ATA_IO = 0x18 | XPT_FC_DEV_QUEUED, 192 /* Execute the requested ATA I/O operation */ 193 194 XPT_GET_SIM_KNOB_OLD = 0x18, /* Compat only */ 195 196 XPT_SET_SIM_KNOB = 0x19, 197 /* 198 * Set SIM specific knob values. 199 */ 200 201 XPT_GET_SIM_KNOB = 0x1a, 202 /* 203 * Get SIM specific knob values. 204 */ 205 206 XPT_SMP_IO = 0x1b | XPT_FC_DEV_QUEUED, 207 /* Serial Management Protocol */ 208 209 XPT_NVME_IO = 0x1c | XPT_FC_DEV_QUEUED, 210 /* Execiute the requestred NVMe I/O operation */ 211 212 XPT_MMC_IO = 0x1d | XPT_FC_DEV_QUEUED, 213 /* Placeholder for MMC / SD / SDIO I/O stuff */ 214 215 XPT_SCAN_TGT = 0x1e | XPT_FC_QUEUED | XPT_FC_USER_CCB 216 | XPT_FC_XPT_ONLY, 217 /* Scan Target */ 218 219 /* HBA engine commands 0x20->0x2F */ 220 XPT_ENG_INQ = 0x20 | XPT_FC_XPT_ONLY, 221 /* HBA engine feature inquiry */ 222 XPT_ENG_EXEC = 0x21 | XPT_FC_DEV_QUEUED, 223 /* HBA execute engine request */ 224 225 /* Target mode commands: 0x30->0x3F */ 226 XPT_EN_LUN = 0x30, 227 /* Enable LUN as a target */ 228 XPT_TARGET_IO = 0x31 | XPT_FC_DEV_QUEUED, 229 /* Execute target I/O request */ 230 XPT_ACCEPT_TARGET_IO = 0x32 | XPT_FC_QUEUED | XPT_FC_USER_CCB, 231 /* Accept Host Target Mode CDB */ 232 XPT_CONT_TARGET_IO = 0x33 | XPT_FC_DEV_QUEUED, 233 /* Continue Host Target I/O Connection */ 234 XPT_IMMED_NOTIFY = 0x34 | XPT_FC_QUEUED | XPT_FC_USER_CCB, 235 /* Notify Host Target driver of event (obsolete) */ 236 XPT_NOTIFY_ACK = 0x35, 237 /* Acknowledgement of event (obsolete) */ 238 XPT_IMMEDIATE_NOTIFY = 0x36 | XPT_FC_QUEUED | XPT_FC_USER_CCB, 239 /* Notify Host Target driver of event */ 240 XPT_NOTIFY_ACKNOWLEDGE = 0x37 | XPT_FC_QUEUED | XPT_FC_USER_CCB, 241 /* Acknowledgement of event */ 242 XPT_REPROBE_LUN = 0x38 | XPT_FC_QUEUED | XPT_FC_USER_CCB, 243 /* Query device capacity and notify GEOM */ 244 245 /* Vendor Unique codes: 0x80->0x8F */ 246 XPT_VUNIQUE = 0x80 247 } xpt_opcode; 248 249 #define XPT_FC_GROUP_MASK 0xF0 250 #define XPT_FC_GROUP(op) ((op) & XPT_FC_GROUP_MASK) 251 #define XPT_FC_GROUP_COMMON 0x00 252 #define XPT_FC_GROUP_SCSI_CONTROL 0x10 253 #define XPT_FC_GROUP_HBA_ENGINE 0x20 254 #define XPT_FC_GROUP_TMODE 0x30 255 #define XPT_FC_GROUP_VENDOR_UNIQUE 0x80 256 257 #define XPT_FC_IS_DEV_QUEUED(ccb) \ 258 (((ccb)->ccb_h.func_code & XPT_FC_DEV_QUEUED) == XPT_FC_DEV_QUEUED) 259 #define XPT_FC_IS_QUEUED(ccb) \ 260 (((ccb)->ccb_h.func_code & XPT_FC_QUEUED) != 0) 261 262 typedef enum { 263 PROTO_UNKNOWN, 264 PROTO_UNSPECIFIED, 265 PROTO_SCSI, /* Small Computer System Interface */ 266 PROTO_ATA, /* AT Attachment */ 267 PROTO_ATAPI, /* AT Attachment Packetized Interface */ 268 PROTO_SATAPM, /* SATA Port Multiplier */ 269 PROTO_SEMB, /* SATA Enclosure Management Bridge */ 270 PROTO_NVME, /* NVME */ 271 PROTO_MMCSD, /* MMC, SD, SDIO */ 272 } cam_proto; 273 274 typedef enum { 275 XPORT_UNKNOWN, 276 XPORT_UNSPECIFIED, 277 XPORT_SPI, /* SCSI Parallel Interface */ 278 XPORT_FC, /* Fiber Channel */ 279 XPORT_SSA, /* Serial Storage Architecture */ 280 XPORT_USB, /* Universal Serial Bus */ 281 XPORT_PPB, /* Parallel Port Bus */ 282 XPORT_ATA, /* AT Attachment */ 283 XPORT_SAS, /* Serial Attached SCSI */ 284 XPORT_SATA, /* Serial AT Attachment */ 285 XPORT_ISCSI, /* iSCSI */ 286 XPORT_SRP, /* SCSI RDMA Protocol */ 287 XPORT_NVME, /* NVMe over PCIe */ 288 XPORT_MMCSD, /* MMC, SD, SDIO card */ 289 } cam_xport; 290 291 #define XPORT_IS_NVME(t) ((t) == XPORT_NVME) 292 #define XPORT_IS_ATA(t) ((t) == XPORT_ATA || (t) == XPORT_SATA) 293 #define XPORT_IS_SCSI(t) ((t) != XPORT_UNKNOWN && \ 294 (t) != XPORT_UNSPECIFIED && \ 295 !XPORT_IS_ATA(t) && !XPORT_IS_NVME(t)) 296 #define XPORT_DEVSTAT_TYPE(t) (XPORT_IS_ATA(t) ? DEVSTAT_TYPE_IF_IDE : \ 297 XPORT_IS_SCSI(t) ? DEVSTAT_TYPE_IF_SCSI : \ 298 DEVSTAT_TYPE_IF_OTHER) 299 300 #define PROTO_VERSION_UNKNOWN (UINT_MAX - 1) 301 #define PROTO_VERSION_UNSPECIFIED UINT_MAX 302 #define XPORT_VERSION_UNKNOWN (UINT_MAX - 1) 303 #define XPORT_VERSION_UNSPECIFIED UINT_MAX 304 305 typedef union { 306 LIST_ENTRY(ccb_hdr) le; 307 SLIST_ENTRY(ccb_hdr) sle; 308 TAILQ_ENTRY(ccb_hdr) tqe; 309 STAILQ_ENTRY(ccb_hdr) stqe; 310 } camq_entry; 311 312 typedef union { 313 void *ptr; 314 u_long field; 315 u_int8_t bytes[sizeof(uintptr_t)]; 316 } ccb_priv_entry; 317 318 typedef union { 319 ccb_priv_entry entries[CCB_PERIPH_PRIV_SIZE]; 320 u_int8_t bytes[CCB_PERIPH_PRIV_SIZE * sizeof(ccb_priv_entry)]; 321 } ccb_ppriv_area; 322 323 typedef union { 324 ccb_priv_entry entries[CCB_SIM_PRIV_SIZE]; 325 u_int8_t bytes[CCB_SIM_PRIV_SIZE * sizeof(ccb_priv_entry)]; 326 } ccb_spriv_area; 327 328 typedef struct { 329 struct timeval *etime; 330 uintptr_t sim_data; 331 uintptr_t periph_data; 332 } ccb_qos_area; 333 334 struct ccb_hdr { 335 cam_pinfo pinfo; /* Info for priority scheduling */ 336 camq_entry xpt_links; /* For chaining in the XPT layer */ 337 camq_entry sim_links; /* For chaining in the SIM layer */ 338 camq_entry periph_links; /* For chaining in the type driver */ 339 u_int32_t retry_count; 340 void (*cbfcnp)(struct cam_periph *, union ccb *); 341 /* Callback on completion function */ 342 xpt_opcode func_code; /* XPT function code */ 343 u_int32_t status; /* Status returned by CAM subsystem */ 344 struct cam_path *path; /* Compiled path for this ccb */ 345 path_id_t path_id; /* Path ID for the request */ 346 target_id_t target_id; /* Target device ID */ 347 lun_id_t target_lun; /* Target LUN number */ 348 u_int32_t flags; /* ccb_flags */ 349 u_int32_t xflags; /* Extended flags */ 350 ccb_ppriv_area periph_priv; 351 ccb_spriv_area sim_priv; 352 ccb_qos_area qos; 353 u_int32_t timeout; /* Hard timeout value in mseconds */ 354 struct timeval softtimeout; /* Soft timeout value in sec + usec */ 355 }; 356 357 /* Get Device Information CCB */ 358 struct ccb_getdev { 359 struct ccb_hdr ccb_h; 360 cam_proto protocol; 361 struct scsi_inquiry_data inq_data; 362 struct ata_params ident_data; 363 u_int8_t serial_num[252]; 364 u_int8_t inq_flags; 365 u_int8_t serial_num_len; 366 const struct nvme_controller_data *nvme_cdata; 367 const struct nvme_namespace_data *nvme_data; 368 }; 369 370 /* Device Statistics CCB */ 371 struct ccb_getdevstats { 372 struct ccb_hdr ccb_h; 373 int dev_openings; /* Space left for more work on device*/ 374 int dev_active; /* Transactions running on the device */ 375 int allocated; /* CCBs allocated for the device */ 376 int queued; /* CCBs queued to be sent to the device */ 377 int held; /* 378 * CCBs held by peripheral drivers 379 * for this device 380 */ 381 int maxtags; /* 382 * Boundary conditions for number of 383 * tagged operations 384 */ 385 int mintags; 386 struct timeval last_reset; /* Time of last bus reset/loop init */ 387 }; 388 389 typedef enum { 390 CAM_GDEVLIST_LAST_DEVICE, 391 CAM_GDEVLIST_LIST_CHANGED, 392 CAM_GDEVLIST_MORE_DEVS, 393 CAM_GDEVLIST_ERROR 394 } ccb_getdevlist_status_e; 395 396 struct ccb_getdevlist { 397 struct ccb_hdr ccb_h; 398 char periph_name[DEV_IDLEN]; 399 u_int32_t unit_number; 400 unsigned int generation; 401 u_int32_t index; 402 ccb_getdevlist_status_e status; 403 }; 404 405 typedef enum { 406 PERIPH_MATCH_NONE = 0x000, 407 PERIPH_MATCH_PATH = 0x001, 408 PERIPH_MATCH_TARGET = 0x002, 409 PERIPH_MATCH_LUN = 0x004, 410 PERIPH_MATCH_NAME = 0x008, 411 PERIPH_MATCH_UNIT = 0x010, 412 PERIPH_MATCH_ANY = 0x01f 413 } periph_pattern_flags; 414 415 struct periph_match_pattern { 416 char periph_name[DEV_IDLEN]; 417 u_int32_t unit_number; 418 path_id_t path_id; 419 target_id_t target_id; 420 lun_id_t target_lun; 421 periph_pattern_flags flags; 422 }; 423 424 typedef enum { 425 DEV_MATCH_NONE = 0x000, 426 DEV_MATCH_PATH = 0x001, 427 DEV_MATCH_TARGET = 0x002, 428 DEV_MATCH_LUN = 0x004, 429 DEV_MATCH_INQUIRY = 0x008, 430 DEV_MATCH_DEVID = 0x010, 431 DEV_MATCH_ANY = 0x00f 432 } dev_pattern_flags; 433 434 struct device_id_match_pattern { 435 uint8_t id_len; 436 uint8_t id[256]; 437 }; 438 439 struct device_match_pattern { 440 path_id_t path_id; 441 target_id_t target_id; 442 lun_id_t target_lun; 443 dev_pattern_flags flags; 444 union { 445 struct scsi_static_inquiry_pattern inq_pat; 446 struct device_id_match_pattern devid_pat; 447 } data; 448 }; 449 450 typedef enum { 451 BUS_MATCH_NONE = 0x000, 452 BUS_MATCH_PATH = 0x001, 453 BUS_MATCH_NAME = 0x002, 454 BUS_MATCH_UNIT = 0x004, 455 BUS_MATCH_BUS_ID = 0x008, 456 BUS_MATCH_ANY = 0x00f 457 } bus_pattern_flags; 458 459 struct bus_match_pattern { 460 path_id_t path_id; 461 char dev_name[DEV_IDLEN]; 462 u_int32_t unit_number; 463 u_int32_t bus_id; 464 bus_pattern_flags flags; 465 }; 466 467 union match_pattern { 468 struct periph_match_pattern periph_pattern; 469 struct device_match_pattern device_pattern; 470 struct bus_match_pattern bus_pattern; 471 }; 472 473 typedef enum { 474 DEV_MATCH_PERIPH, 475 DEV_MATCH_DEVICE, 476 DEV_MATCH_BUS 477 } dev_match_type; 478 479 struct dev_match_pattern { 480 dev_match_type type; 481 union match_pattern pattern; 482 }; 483 484 struct periph_match_result { 485 char periph_name[DEV_IDLEN]; 486 u_int32_t unit_number; 487 path_id_t path_id; 488 target_id_t target_id; 489 lun_id_t target_lun; 490 }; 491 492 typedef enum { 493 DEV_RESULT_NOFLAG = 0x00, 494 DEV_RESULT_UNCONFIGURED = 0x01 495 } dev_result_flags; 496 497 struct device_match_result { 498 path_id_t path_id; 499 target_id_t target_id; 500 lun_id_t target_lun; 501 cam_proto protocol; 502 struct scsi_inquiry_data inq_data; 503 struct ata_params ident_data; 504 struct mmc_params mmc_ident_data; 505 dev_result_flags flags; 506 }; 507 508 struct bus_match_result { 509 path_id_t path_id; 510 char dev_name[DEV_IDLEN]; 511 u_int32_t unit_number; 512 u_int32_t bus_id; 513 }; 514 515 union match_result { 516 struct periph_match_result periph_result; 517 struct device_match_result device_result; 518 struct bus_match_result bus_result; 519 }; 520 521 struct dev_match_result { 522 dev_match_type type; 523 union match_result result; 524 }; 525 526 typedef enum { 527 CAM_DEV_MATCH_LAST, 528 CAM_DEV_MATCH_MORE, 529 CAM_DEV_MATCH_LIST_CHANGED, 530 CAM_DEV_MATCH_SIZE_ERROR, 531 CAM_DEV_MATCH_ERROR 532 } ccb_dev_match_status; 533 534 typedef enum { 535 CAM_DEV_POS_NONE = 0x000, 536 CAM_DEV_POS_BUS = 0x001, 537 CAM_DEV_POS_TARGET = 0x002, 538 CAM_DEV_POS_DEVICE = 0x004, 539 CAM_DEV_POS_PERIPH = 0x008, 540 CAM_DEV_POS_PDPTR = 0x010, 541 CAM_DEV_POS_TYPEMASK = 0xf00, 542 CAM_DEV_POS_EDT = 0x100, 543 CAM_DEV_POS_PDRV = 0x200 544 } dev_pos_type; 545 546 struct ccb_dm_cookie { 547 void *bus; 548 void *target; 549 void *device; 550 void *periph; 551 void *pdrv; 552 }; 553 554 struct ccb_dev_position { 555 u_int generations[4]; 556 #define CAM_BUS_GENERATION 0x00 557 #define CAM_TARGET_GENERATION 0x01 558 #define CAM_DEV_GENERATION 0x02 559 #define CAM_PERIPH_GENERATION 0x03 560 dev_pos_type position_type; 561 struct ccb_dm_cookie cookie; 562 }; 563 564 struct ccb_dev_match { 565 struct ccb_hdr ccb_h; 566 ccb_dev_match_status status; 567 u_int32_t num_patterns; 568 u_int32_t pattern_buf_len; 569 struct dev_match_pattern *patterns; 570 u_int32_t num_matches; 571 u_int32_t match_buf_len; 572 struct dev_match_result *matches; 573 struct ccb_dev_position pos; 574 }; 575 576 /* 577 * Definitions for the path inquiry CCB fields. 578 */ 579 #define CAM_VERSION 0x19 /* Hex value for current version */ 580 581 typedef enum { 582 PI_MDP_ABLE = 0x80, /* Supports MDP message */ 583 PI_WIDE_32 = 0x40, /* Supports 32 bit wide SCSI */ 584 PI_WIDE_16 = 0x20, /* Supports 16 bit wide SCSI */ 585 PI_SDTR_ABLE = 0x10, /* Supports SDTR message */ 586 PI_LINKED_CDB = 0x08, /* Supports linked CDBs */ 587 PI_SATAPM = 0x04, /* Supports SATA PM */ 588 PI_TAG_ABLE = 0x02, /* Supports tag queue messages */ 589 PI_SOFT_RST = 0x01 /* Supports soft reset alternative */ 590 } pi_inqflag; 591 592 typedef enum { 593 PIT_PROCESSOR = 0x80, /* Target mode processor mode */ 594 PIT_PHASE = 0x40, /* Target mode phase cog. mode */ 595 PIT_DISCONNECT = 0x20, /* Disconnects supported in target mode */ 596 PIT_TERM_IO = 0x10, /* Terminate I/O message supported in TM */ 597 PIT_GRP_6 = 0x08, /* Group 6 commands supported */ 598 PIT_GRP_7 = 0x04 /* Group 7 commands supported */ 599 } pi_tmflag; 600 601 typedef enum { 602 PIM_ATA_EXT = 0x200,/* ATA requests can understand ata_ext requests */ 603 PIM_EXTLUNS = 0x100,/* 64bit extended LUNs supported */ 604 PIM_SCANHILO = 0x80, /* Bus scans from high ID to low ID */ 605 PIM_NOREMOVE = 0x40, /* Removeable devices not included in scan */ 606 PIM_NOINITIATOR = 0x20, /* Initiator role not supported. */ 607 PIM_NOBUSRESET = 0x10, /* User has disabled initial BUS RESET */ 608 PIM_NO_6_BYTE = 0x08, /* Do not send 6-byte commands */ 609 PIM_SEQSCAN = 0x04, /* Do bus scans sequentially, not in parallel */ 610 PIM_UNMAPPED = 0x02, 611 PIM_NOSCAN = 0x01 /* SIM does its own scanning */ 612 } pi_miscflag; 613 614 /* Path Inquiry CCB */ 615 struct ccb_pathinq_settings_spi { 616 u_int8_t ppr_options; 617 }; 618 619 struct ccb_pathinq_settings_fc { 620 u_int64_t wwnn; /* world wide node name */ 621 u_int64_t wwpn; /* world wide port name */ 622 u_int32_t port; /* 24 bit port id, if known */ 623 u_int32_t bitrate; /* Mbps */ 624 }; 625 626 struct ccb_pathinq_settings_sas { 627 u_int32_t bitrate; /* Mbps */ 628 }; 629 630 struct ccb_pathinq_settings_nvme { 631 uint16_t nsid; /* Namespace ID for this path */ 632 }; 633 634 #define PATHINQ_SETTINGS_SIZE 128 635 636 struct ccb_pathinq { 637 struct ccb_hdr ccb_h; 638 u_int8_t version_num; /* Version number for the SIM/HBA */ 639 u_int8_t hba_inquiry; /* Mimic of INQ byte 7 for the HBA */ 640 u_int16_t target_sprt; /* Flags for target mode support */ 641 u_int32_t hba_misc; /* Misc HBA features */ 642 u_int16_t hba_eng_cnt; /* HBA engine count */ 643 /* Vendor Unique capabilities */ 644 u_int8_t vuhba_flags[VUHBALEN]; 645 u_int32_t max_target; /* Maximum supported Target */ 646 u_int32_t max_lun; /* Maximum supported Lun */ 647 u_int32_t async_flags; /* Installed Async handlers */ 648 path_id_t hpath_id; /* Highest Path ID in the subsystem */ 649 target_id_t initiator_id; /* ID of the HBA on the SCSI bus */ 650 char sim_vid[SIM_IDLEN]; /* Vendor ID of the SIM */ 651 char hba_vid[HBA_IDLEN]; /* Vendor ID of the HBA */ 652 char dev_name[DEV_IDLEN];/* Device name for SIM */ 653 u_int32_t unit_number; /* Unit number for SIM */ 654 u_int32_t bus_id; /* Bus ID for SIM */ 655 u_int32_t base_transfer_speed;/* Base bus speed in KB/sec */ 656 cam_proto protocol; 657 u_int protocol_version; 658 cam_xport transport; 659 u_int transport_version; 660 union { 661 struct ccb_pathinq_settings_spi spi; 662 struct ccb_pathinq_settings_fc fc; 663 struct ccb_pathinq_settings_sas sas; 664 struct ccb_pathinq_settings_nvme nvme; 665 char ccb_pathinq_settings_opaque[PATHINQ_SETTINGS_SIZE]; 666 } xport_specific; 667 u_int maxio; /* Max supported I/O size, in bytes. */ 668 u_int16_t hba_vendor; /* HBA vendor ID */ 669 u_int16_t hba_device; /* HBA device ID */ 670 u_int16_t hba_subvendor; /* HBA subvendor ID */ 671 u_int16_t hba_subdevice; /* HBA subdevice ID */ 672 }; 673 674 /* Path Statistics CCB */ 675 struct ccb_pathstats { 676 struct ccb_hdr ccb_h; 677 struct timeval last_reset; /* Time of last bus reset/loop init */ 678 }; 679 680 typedef enum { 681 SMP_FLAG_NONE = 0x00, 682 SMP_FLAG_REQ_SG = 0x01, 683 SMP_FLAG_RSP_SG = 0x02 684 } ccb_smp_pass_flags; 685 686 /* 687 * Serial Management Protocol CCB 688 * XXX Currently the semantics for this CCB are that it is executed either 689 * by the addressed device, or that device's parent (i.e. an expander for 690 * any device on an expander) if the addressed device doesn't support SMP. 691 * Later, once we have the ability to probe SMP-only devices and put them 692 * in CAM's topology, the CCB will only be executed by the addressed device 693 * if possible. 694 */ 695 struct ccb_smpio { 696 struct ccb_hdr ccb_h; 697 uint8_t *smp_request; 698 int smp_request_len; 699 uint16_t smp_request_sglist_cnt; 700 uint8_t *smp_response; 701 int smp_response_len; 702 uint16_t smp_response_sglist_cnt; 703 ccb_smp_pass_flags flags; 704 }; 705 706 typedef union { 707 u_int8_t *sense_ptr; /* 708 * Pointer to storage 709 * for sense information 710 */ 711 /* Storage Area for sense information */ 712 struct scsi_sense_data sense_buf; 713 } sense_t; 714 715 typedef union { 716 u_int8_t *cdb_ptr; /* Pointer to the CDB bytes to send */ 717 /* Area for the CDB send */ 718 u_int8_t cdb_bytes[IOCDBLEN]; 719 } cdb_t; 720 721 /* 722 * SCSI I/O Request CCB used for the XPT_SCSI_IO and XPT_CONT_TARGET_IO 723 * function codes. 724 */ 725 struct ccb_scsiio { 726 struct ccb_hdr ccb_h; 727 union ccb *next_ccb; /* Ptr for next CCB for action */ 728 u_int8_t *req_map; /* Ptr to mapping info */ 729 u_int8_t *data_ptr; /* Ptr to the data buf/SG list */ 730 u_int32_t dxfer_len; /* Data transfer length */ 731 /* Autosense storage */ 732 struct scsi_sense_data sense_data; 733 u_int8_t sense_len; /* Number of bytes to autosense */ 734 u_int8_t cdb_len; /* Number of bytes for the CDB */ 735 u_int16_t sglist_cnt; /* Number of SG list entries */ 736 u_int8_t scsi_status; /* Returned SCSI status */ 737 u_int8_t sense_resid; /* Autosense resid length: 2's comp */ 738 u_int32_t resid; /* Transfer residual length: 2's comp */ 739 cdb_t cdb_io; /* Union for CDB bytes/pointer */ 740 u_int8_t *msg_ptr; /* Pointer to the message buffer */ 741 u_int16_t msg_len; /* Number of bytes for the Message */ 742 u_int8_t tag_action; /* What to do for tag queueing */ 743 /* 744 * The tag action should be either the define below (to send a 745 * non-tagged transaction) or one of the defined scsi tag messages 746 * from scsi_message.h. 747 */ 748 #define CAM_TAG_ACTION_NONE 0x00 749 u_int tag_id; /* tag id from initator (target mode) */ 750 u_int init_id; /* initiator id of who selected */ 751 #if defined(BUF_TRACKING) || defined(FULL_BUF_TRACKING) 752 struct bio *bio; /* Associated bio */ 753 #endif 754 }; 755 756 static __inline uint8_t * 757 scsiio_cdb_ptr(struct ccb_scsiio *ccb) 758 { 759 return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 760 ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes); 761 } 762 763 /* 764 * ATA I/O Request CCB used for the XPT_ATA_IO function code. 765 */ 766 struct ccb_ataio { 767 struct ccb_hdr ccb_h; 768 union ccb *next_ccb; /* Ptr for next CCB for action */ 769 struct ata_cmd cmd; /* ATA command register set */ 770 struct ata_res res; /* ATA result register set */ 771 u_int8_t *data_ptr; /* Ptr to the data buf/SG list */ 772 u_int32_t dxfer_len; /* Data transfer length */ 773 u_int32_t resid; /* Transfer residual length: 2's comp */ 774 u_int8_t ata_flags; /* Flags for the rest of the buffer */ 775 #define ATA_FLAG_AUX 0x1 776 uint32_t aux; 777 uint32_t unused; 778 }; 779 780 /* 781 * MMC I/O Request CCB used for the XPT_MMC_IO function code. 782 */ 783 struct ccb_mmcio { 784 struct ccb_hdr ccb_h; 785 union ccb *next_ccb; /* Ptr for next CCB for action */ 786 struct mmc_command cmd; 787 struct mmc_command stop; 788 }; 789 790 struct ccb_accept_tio { 791 struct ccb_hdr ccb_h; 792 cdb_t cdb_io; /* Union for CDB bytes/pointer */ 793 u_int8_t cdb_len; /* Number of bytes for the CDB */ 794 u_int8_t tag_action; /* What to do for tag queueing */ 795 u_int8_t sense_len; /* Number of bytes of Sense Data */ 796 u_int tag_id; /* tag id from initator (target mode) */ 797 u_int init_id; /* initiator id of who selected */ 798 struct scsi_sense_data sense_data; 799 }; 800 801 static __inline uint8_t * 802 atio_cdb_ptr(struct ccb_accept_tio *ccb) 803 { 804 return ((ccb->ccb_h.flags & CAM_CDB_POINTER) ? 805 ccb->cdb_io.cdb_ptr : ccb->cdb_io.cdb_bytes); 806 } 807 808 /* Release SIM Queue */ 809 struct ccb_relsim { 810 struct ccb_hdr ccb_h; 811 u_int32_t release_flags; 812 #define RELSIM_ADJUST_OPENINGS 0x01 813 #define RELSIM_RELEASE_AFTER_TIMEOUT 0x02 814 #define RELSIM_RELEASE_AFTER_CMDCMPLT 0x04 815 #define RELSIM_RELEASE_AFTER_QEMPTY 0x08 816 u_int32_t openings; 817 u_int32_t release_timeout; /* Abstract argument. */ 818 u_int32_t qfrozen_cnt; 819 }; 820 821 /* 822 * NVMe I/O Request CCB used for the XPT_NVME_IO function code. 823 */ 824 struct ccb_nvmeio { 825 struct ccb_hdr ccb_h; 826 union ccb *next_ccb; /* Ptr for next CCB for action */ 827 struct nvme_command cmd; /* NVME command, per NVME standard */ 828 struct nvme_completion cpl; /* NVME completion, per NVME standard */ 829 uint8_t *data_ptr; /* Ptr to the data buf/SG list */ 830 uint32_t dxfer_len; /* Data transfer length */ 831 uint32_t resid; /* Transfer residual length: 2's comp unused ?*/ 832 }; 833 834 /* 835 * Definitions for the asynchronous callback CCB fields. 836 */ 837 typedef enum { 838 AC_UNIT_ATTENTION = 0x4000,/* Device reported UNIT ATTENTION */ 839 AC_ADVINFO_CHANGED = 0x2000,/* Advance info might have changes */ 840 AC_CONTRACT = 0x1000,/* A contractual callback */ 841 AC_GETDEV_CHANGED = 0x800,/* Getdev info might have changed */ 842 AC_INQ_CHANGED = 0x400,/* Inquiry info might have changed */ 843 AC_TRANSFER_NEG = 0x200,/* New transfer settings in effect */ 844 AC_LOST_DEVICE = 0x100,/* A device went away */ 845 AC_FOUND_DEVICE = 0x080,/* A new device was found */ 846 AC_PATH_DEREGISTERED = 0x040,/* A path has de-registered */ 847 AC_PATH_REGISTERED = 0x020,/* A new path has been registered */ 848 AC_SENT_BDR = 0x010,/* A BDR message was sent to target */ 849 AC_SCSI_AEN = 0x008,/* A SCSI AEN has been received */ 850 AC_UNSOL_RESEL = 0x002,/* Unsolicited reselection occurred */ 851 AC_BUS_RESET = 0x001 /* A SCSI bus reset occurred */ 852 } ac_code; 853 854 typedef void ac_callback_t (void *softc, u_int32_t code, 855 struct cam_path *path, void *args); 856 857 /* 858 * Generic Asynchronous callbacks. 859 * 860 * Generic arguments passed bac which are then interpreted between a per-system 861 * contract number. 862 */ 863 #define AC_CONTRACT_DATA_MAX (128 - sizeof (u_int64_t)) 864 struct ac_contract { 865 u_int64_t contract_number; 866 u_int8_t contract_data[AC_CONTRACT_DATA_MAX]; 867 }; 868 869 #define AC_CONTRACT_DEV_CHG 1 870 struct ac_device_changed { 871 u_int64_t wwpn; 872 u_int32_t port; 873 target_id_t target; 874 u_int8_t arrived; 875 }; 876 877 /* Set Asynchronous Callback CCB */ 878 struct ccb_setasync { 879 struct ccb_hdr ccb_h; 880 u_int32_t event_enable; /* Async Event enables */ 881 ac_callback_t *callback; 882 void *callback_arg; 883 }; 884 885 /* Set Device Type CCB */ 886 struct ccb_setdev { 887 struct ccb_hdr ccb_h; 888 u_int8_t dev_type; /* Value for dev type field in EDT */ 889 }; 890 891 /* SCSI Control Functions */ 892 893 /* Abort XPT request CCB */ 894 struct ccb_abort { 895 struct ccb_hdr ccb_h; 896 union ccb *abort_ccb; /* Pointer to CCB to abort */ 897 }; 898 899 /* Reset SCSI Bus CCB */ 900 struct ccb_resetbus { 901 struct ccb_hdr ccb_h; 902 }; 903 904 /* Reset SCSI Device CCB */ 905 struct ccb_resetdev { 906 struct ccb_hdr ccb_h; 907 }; 908 909 /* Terminate I/O Process Request CCB */ 910 struct ccb_termio { 911 struct ccb_hdr ccb_h; 912 union ccb *termio_ccb; /* Pointer to CCB to terminate */ 913 }; 914 915 typedef enum { 916 CTS_TYPE_CURRENT_SETTINGS, 917 CTS_TYPE_USER_SETTINGS 918 } cts_type; 919 920 struct ccb_trans_settings_scsi 921 { 922 u_int valid; /* Which fields to honor */ 923 #define CTS_SCSI_VALID_TQ 0x01 924 u_int flags; 925 #define CTS_SCSI_FLAGS_TAG_ENB 0x01 926 }; 927 928 struct ccb_trans_settings_ata 929 { 930 u_int valid; /* Which fields to honor */ 931 #define CTS_ATA_VALID_TQ 0x01 932 u_int flags; 933 #define CTS_ATA_FLAGS_TAG_ENB 0x01 934 }; 935 936 struct ccb_trans_settings_spi 937 { 938 u_int valid; /* Which fields to honor */ 939 #define CTS_SPI_VALID_SYNC_RATE 0x01 940 #define CTS_SPI_VALID_SYNC_OFFSET 0x02 941 #define CTS_SPI_VALID_BUS_WIDTH 0x04 942 #define CTS_SPI_VALID_DISC 0x08 943 #define CTS_SPI_VALID_PPR_OPTIONS 0x10 944 u_int flags; 945 #define CTS_SPI_FLAGS_DISC_ENB 0x01 946 u_int sync_period; 947 u_int sync_offset; 948 u_int bus_width; 949 u_int ppr_options; 950 }; 951 952 struct ccb_trans_settings_fc { 953 u_int valid; /* Which fields to honor */ 954 #define CTS_FC_VALID_WWNN 0x8000 955 #define CTS_FC_VALID_WWPN 0x4000 956 #define CTS_FC_VALID_PORT 0x2000 957 #define CTS_FC_VALID_SPEED 0x1000 958 u_int64_t wwnn; /* world wide node name */ 959 u_int64_t wwpn; /* world wide port name */ 960 u_int32_t port; /* 24 bit port id, if known */ 961 u_int32_t bitrate; /* Mbps */ 962 }; 963 964 struct ccb_trans_settings_sas { 965 u_int valid; /* Which fields to honor */ 966 #define CTS_SAS_VALID_SPEED 0x1000 967 u_int32_t bitrate; /* Mbps */ 968 }; 969 970 struct ccb_trans_settings_pata { 971 u_int valid; /* Which fields to honor */ 972 #define CTS_ATA_VALID_MODE 0x01 973 #define CTS_ATA_VALID_BYTECOUNT 0x02 974 #define CTS_ATA_VALID_ATAPI 0x20 975 #define CTS_ATA_VALID_CAPS 0x40 976 int mode; /* Mode */ 977 u_int bytecount; /* Length of PIO transaction */ 978 u_int atapi; /* Length of ATAPI CDB */ 979 u_int caps; /* Device and host SATA caps. */ 980 #define CTS_ATA_CAPS_H 0x0000ffff 981 #define CTS_ATA_CAPS_H_DMA48 0x00000001 /* 48-bit DMA */ 982 #define CTS_ATA_CAPS_D 0xffff0000 983 }; 984 985 struct ccb_trans_settings_sata { 986 u_int valid; /* Which fields to honor */ 987 #define CTS_SATA_VALID_MODE 0x01 988 #define CTS_SATA_VALID_BYTECOUNT 0x02 989 #define CTS_SATA_VALID_REVISION 0x04 990 #define CTS_SATA_VALID_PM 0x08 991 #define CTS_SATA_VALID_TAGS 0x10 992 #define CTS_SATA_VALID_ATAPI 0x20 993 #define CTS_SATA_VALID_CAPS 0x40 994 int mode; /* Legacy PATA mode */ 995 u_int bytecount; /* Length of PIO transaction */ 996 int revision; /* SATA revision */ 997 u_int pm_present; /* PM is present (XPT->SIM) */ 998 u_int tags; /* Number of allowed tags */ 999 u_int atapi; /* Length of ATAPI CDB */ 1000 u_int caps; /* Device and host SATA caps. */ 1001 #define CTS_SATA_CAPS_H 0x0000ffff 1002 #define CTS_SATA_CAPS_H_PMREQ 0x00000001 1003 #define CTS_SATA_CAPS_H_APST 0x00000002 1004 #define CTS_SATA_CAPS_H_DMAAA 0x00000010 /* Auto-activation */ 1005 #define CTS_SATA_CAPS_H_AN 0x00000020 /* Async. notification */ 1006 #define CTS_SATA_CAPS_D 0xffff0000 1007 #define CTS_SATA_CAPS_D_PMREQ 0x00010000 1008 #define CTS_SATA_CAPS_D_APST 0x00020000 1009 }; 1010 1011 struct ccb_trans_settings_nvme 1012 { 1013 u_int valid; /* Which fields to honor */ 1014 #define CTS_NVME_VALID_SPEC 0x01 1015 #define CTS_NVME_VALID_CAPS 0x02 1016 u_int spec_major; /* Major version of spec supported */ 1017 u_int spec_minor; /* Minor verison of spec supported */ 1018 u_int spec_tiny; /* Tiny version of spec supported */ 1019 u_int max_xfer; /* Max transfer size (0 -> unlimited */ 1020 u_int caps; 1021 }; 1022 1023 #include <cam/mmc/mmc_bus.h> 1024 struct ccb_trans_settings_mmc { 1025 struct mmc_ios ios; 1026 #define MMC_CLK (1 << 1) 1027 #define MMC_VDD (1 << 2) 1028 #define MMC_CS (1 << 3) 1029 #define MMC_BW (1 << 4) 1030 #define MMC_PM (1 << 5) 1031 #define MMC_BT (1 << 6) 1032 #define MMC_BM (1 << 7) 1033 uint32_t ios_valid; 1034 /* The folowing is used only for GET_TRAN_SETTINGS */ 1035 uint32_t host_ocr; 1036 int host_f_min; 1037 int host_f_max; 1038 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can do 4-bit data transfers */ 1039 #define MMC_CAP_8_BIT_DATA (1 << 1) /* Can do 8-bit data transfers */ 1040 #define MMC_CAP_HSPEED (1 << 2) /* Can do High Speed transfers */ 1041 uint32_t host_caps; 1042 }; 1043 1044 /* Get/Set transfer rate/width/disconnection/tag queueing settings */ 1045 struct ccb_trans_settings { 1046 struct ccb_hdr ccb_h; 1047 cts_type type; /* Current or User settings */ 1048 cam_proto protocol; 1049 u_int protocol_version; 1050 cam_xport transport; 1051 u_int transport_version; 1052 union { 1053 u_int valid; /* Which fields to honor */ 1054 struct ccb_trans_settings_ata ata; 1055 struct ccb_trans_settings_scsi scsi; 1056 struct ccb_trans_settings_nvme nvme; 1057 struct ccb_trans_settings_mmc mmc; 1058 } proto_specific; 1059 union { 1060 u_int valid; /* Which fields to honor */ 1061 struct ccb_trans_settings_spi spi; 1062 struct ccb_trans_settings_fc fc; 1063 struct ccb_trans_settings_sas sas; 1064 struct ccb_trans_settings_pata ata; 1065 struct ccb_trans_settings_sata sata; 1066 struct ccb_trans_settings_nvme nvme; 1067 } xport_specific; 1068 }; 1069 1070 1071 /* 1072 * Calculate the geometry parameters for a device 1073 * give the block size and volume size in blocks. 1074 */ 1075 struct ccb_calc_geometry { 1076 struct ccb_hdr ccb_h; 1077 u_int32_t block_size; 1078 u_int64_t volume_size; 1079 u_int32_t cylinders; 1080 u_int8_t heads; 1081 u_int8_t secs_per_track; 1082 }; 1083 1084 /* 1085 * Set or get SIM (and transport) specific knobs 1086 */ 1087 1088 #define KNOB_VALID_ADDRESS 0x1 1089 #define KNOB_VALID_ROLE 0x2 1090 1091 1092 #define KNOB_ROLE_NONE 0x0 1093 #define KNOB_ROLE_INITIATOR 0x1 1094 #define KNOB_ROLE_TARGET 0x2 1095 #define KNOB_ROLE_BOTH 0x3 1096 1097 struct ccb_sim_knob_settings_spi { 1098 u_int valid; 1099 u_int initiator_id; 1100 u_int role; 1101 }; 1102 1103 struct ccb_sim_knob_settings_fc { 1104 u_int valid; 1105 u_int64_t wwnn; /* world wide node name */ 1106 u_int64_t wwpn; /* world wide port name */ 1107 u_int role; 1108 }; 1109 1110 struct ccb_sim_knob_settings_sas { 1111 u_int valid; 1112 u_int64_t wwnn; /* world wide node name */ 1113 u_int role; 1114 }; 1115 #define KNOB_SETTINGS_SIZE 128 1116 1117 struct ccb_sim_knob { 1118 struct ccb_hdr ccb_h; 1119 union { 1120 u_int valid; /* Which fields to honor */ 1121 struct ccb_sim_knob_settings_spi spi; 1122 struct ccb_sim_knob_settings_fc fc; 1123 struct ccb_sim_knob_settings_sas sas; 1124 char pad[KNOB_SETTINGS_SIZE]; 1125 } xport_specific; 1126 }; 1127 1128 /* 1129 * Rescan the given bus, or bus/target/lun 1130 */ 1131 struct ccb_rescan { 1132 struct ccb_hdr ccb_h; 1133 cam_flags flags; 1134 }; 1135 1136 /* 1137 * Turn on debugging for the given bus, bus/target, or bus/target/lun. 1138 */ 1139 struct ccb_debug { 1140 struct ccb_hdr ccb_h; 1141 cam_debug_flags flags; 1142 }; 1143 1144 /* Target mode structures. */ 1145 1146 struct ccb_en_lun { 1147 struct ccb_hdr ccb_h; 1148 u_int16_t grp6_len; /* Group 6 VU CDB length */ 1149 u_int16_t grp7_len; /* Group 7 VU CDB length */ 1150 u_int8_t enable; 1151 }; 1152 1153 /* old, barely used immediate notify, binary compatibility */ 1154 struct ccb_immed_notify { 1155 struct ccb_hdr ccb_h; 1156 struct scsi_sense_data sense_data; 1157 u_int8_t sense_len; /* Number of bytes in sense buffer */ 1158 u_int8_t initiator_id; /* Id of initiator that selected */ 1159 u_int8_t message_args[7]; /* Message Arguments */ 1160 }; 1161 1162 struct ccb_notify_ack { 1163 struct ccb_hdr ccb_h; 1164 u_int16_t seq_id; /* Sequence identifier */ 1165 u_int8_t event; /* Event flags */ 1166 }; 1167 1168 struct ccb_immediate_notify { 1169 struct ccb_hdr ccb_h; 1170 u_int tag_id; /* Tag for immediate notify */ 1171 u_int seq_id; /* Tag for target of notify */ 1172 u_int initiator_id; /* Initiator Identifier */ 1173 u_int arg; /* Function specific */ 1174 }; 1175 1176 struct ccb_notify_acknowledge { 1177 struct ccb_hdr ccb_h; 1178 u_int tag_id; /* Tag for immediate notify */ 1179 u_int seq_id; /* Tar for target of notify */ 1180 u_int initiator_id; /* Initiator Identifier */ 1181 u_int arg; /* Response information */ 1182 /* 1183 * Lower byte of arg is one of RESPONSE CODE values defined below 1184 * (subset of response codes from SPL-4 and FCP-4 specifications), 1185 * upper 3 bytes is code-specific ADDITIONAL RESPONSE INFORMATION. 1186 */ 1187 #define CAM_RSP_TMF_COMPLETE 0x00 1188 #define CAM_RSP_TMF_REJECTED 0x04 1189 #define CAM_RSP_TMF_FAILED 0x05 1190 #define CAM_RSP_TMF_SUCCEEDED 0x08 1191 #define CAM_RSP_TMF_INCORRECT_LUN 0x09 1192 }; 1193 1194 /* HBA engine structures. */ 1195 1196 typedef enum { 1197 EIT_BUFFER, /* Engine type: buffer memory */ 1198 EIT_LOSSLESS, /* Engine type: lossless compression */ 1199 EIT_LOSSY, /* Engine type: lossy compression */ 1200 EIT_ENCRYPT /* Engine type: encryption */ 1201 } ei_type; 1202 1203 typedef enum { 1204 EAD_VUNIQUE, /* Engine algorithm ID: vendor unique */ 1205 EAD_LZ1V1, /* Engine algorithm ID: LZ1 var.1 */ 1206 EAD_LZ2V1, /* Engine algorithm ID: LZ2 var.1 */ 1207 EAD_LZ2V2 /* Engine algorithm ID: LZ2 var.2 */ 1208 } ei_algo; 1209 1210 struct ccb_eng_inq { 1211 struct ccb_hdr ccb_h; 1212 u_int16_t eng_num; /* The engine number for this inquiry */ 1213 ei_type eng_type; /* Returned engine type */ 1214 ei_algo eng_algo; /* Returned engine algorithm type */ 1215 u_int32_t eng_memeory; /* Returned engine memory size */ 1216 }; 1217 1218 struct ccb_eng_exec { /* This structure must match SCSIIO size */ 1219 struct ccb_hdr ccb_h; 1220 u_int8_t *pdrv_ptr; /* Ptr used by the peripheral driver */ 1221 u_int8_t *req_map; /* Ptr for mapping info on the req. */ 1222 u_int8_t *data_ptr; /* Pointer to the data buf/SG list */ 1223 u_int32_t dxfer_len; /* Data transfer length */ 1224 u_int8_t *engdata_ptr; /* Pointer to the engine buffer data */ 1225 u_int16_t sglist_cnt; /* Num of scatter gather list entries */ 1226 u_int32_t dmax_len; /* Destination data maximum length */ 1227 u_int32_t dest_len; /* Destination data length */ 1228 int32_t src_resid; /* Source residual length: 2's comp */ 1229 u_int32_t timeout; /* Timeout value */ 1230 u_int16_t eng_num; /* Engine number for this request */ 1231 u_int16_t vu_flags; /* Vendor Unique flags */ 1232 }; 1233 1234 /* 1235 * Definitions for the timeout field in the SCSI I/O CCB. 1236 */ 1237 #define CAM_TIME_DEFAULT 0x00000000 /* Use SIM default value */ 1238 #define CAM_TIME_INFINITY 0xFFFFFFFF /* Infinite timeout */ 1239 1240 #define CAM_SUCCESS 0 /* For signaling general success */ 1241 #define CAM_FAILURE 1 /* For signaling general failure */ 1242 1243 #define CAM_FALSE 0 1244 #define CAM_TRUE 1 1245 1246 #define XPT_CCB_INVALID -1 /* for signaling a bad CCB to free */ 1247 1248 /* 1249 * CCB for working with advanced device information. This operates in a fashion 1250 * similar to XPT_GDEV_TYPE. Specify the target in ccb_h, the buffer 1251 * type requested, and provide a buffer size/buffer to write to. If the 1252 * buffer is too small, provsiz will be larger than bufsiz. 1253 */ 1254 struct ccb_dev_advinfo { 1255 struct ccb_hdr ccb_h; 1256 uint32_t flags; 1257 #define CDAI_FLAG_NONE 0x0 /* No flags set */ 1258 #define CDAI_FLAG_STORE 0x1 /* If set, action becomes store */ 1259 uint32_t buftype; /* IN: Type of data being requested */ 1260 /* NB: buftype is interpreted on a per-transport basis */ 1261 #define CDAI_TYPE_SCSI_DEVID 1 1262 #define CDAI_TYPE_SERIAL_NUM 2 1263 #define CDAI_TYPE_PHYS_PATH 3 1264 #define CDAI_TYPE_RCAPLONG 4 1265 #define CDAI_TYPE_EXT_INQ 5 1266 off_t bufsiz; /* IN: Size of external buffer */ 1267 #define CAM_SCSI_DEVID_MAXLEN 65536 /* length in buffer is an uint16_t */ 1268 off_t provsiz; /* OUT: Size required/used */ 1269 uint8_t *buf; /* IN/OUT: Buffer for requested data */ 1270 }; 1271 1272 /* 1273 * CCB for sending async events 1274 */ 1275 struct ccb_async { 1276 struct ccb_hdr ccb_h; 1277 uint32_t async_code; 1278 off_t async_arg_size; 1279 void *async_arg_ptr; 1280 }; 1281 1282 /* 1283 * Union of all CCB types for kernel space allocation. This union should 1284 * never be used for manipulating CCBs - its only use is for the allocation 1285 * and deallocation of raw CCB space and is the return type of xpt_ccb_alloc 1286 * and the argument to xpt_ccb_free. 1287 */ 1288 union ccb { 1289 struct ccb_hdr ccb_h; /* For convenience */ 1290 struct ccb_scsiio csio; 1291 struct ccb_getdev cgd; 1292 struct ccb_getdevlist cgdl; 1293 struct ccb_pathinq cpi; 1294 struct ccb_relsim crs; 1295 struct ccb_setasync csa; 1296 struct ccb_setdev csd; 1297 struct ccb_pathstats cpis; 1298 struct ccb_getdevstats cgds; 1299 struct ccb_dev_match cdm; 1300 struct ccb_trans_settings cts; 1301 struct ccb_calc_geometry ccg; 1302 struct ccb_sim_knob knob; 1303 struct ccb_abort cab; 1304 struct ccb_resetbus crb; 1305 struct ccb_resetdev crd; 1306 struct ccb_termio tio; 1307 struct ccb_accept_tio atio; 1308 struct ccb_scsiio ctio; 1309 struct ccb_en_lun cel; 1310 struct ccb_immed_notify cin; 1311 struct ccb_notify_ack cna; 1312 struct ccb_immediate_notify cin1; 1313 struct ccb_notify_acknowledge cna2; 1314 struct ccb_eng_inq cei; 1315 struct ccb_eng_exec cee; 1316 struct ccb_smpio smpio; 1317 struct ccb_rescan crcn; 1318 struct ccb_debug cdbg; 1319 struct ccb_ataio ataio; 1320 struct ccb_dev_advinfo cdai; 1321 struct ccb_async casync; 1322 struct ccb_nvmeio nvmeio; 1323 struct ccb_mmcio mmcio; 1324 }; 1325 1326 #define CCB_CLEAR_ALL_EXCEPT_HDR(ccbp) \ 1327 bzero((char *)(ccbp) + sizeof((ccbp)->ccb_h), \ 1328 sizeof(*(ccbp)) - sizeof((ccbp)->ccb_h)) 1329 1330 __BEGIN_DECLS 1331 static __inline void 1332 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries, 1333 void (*cbfcnp)(struct cam_periph *, union ccb *), 1334 u_int32_t flags, u_int8_t tag_action, 1335 u_int8_t *data_ptr, u_int32_t dxfer_len, 1336 u_int8_t sense_len, u_int8_t cdb_len, 1337 u_int32_t timeout); 1338 1339 static __inline void 1340 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries, 1341 void (*cbfcnp)(struct cam_periph *, union ccb *), 1342 u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len, 1343 u_int32_t timeout); 1344 1345 static __inline void 1346 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries, 1347 void (*cbfcnp)(struct cam_periph *, union ccb *), 1348 u_int32_t flags, u_int tag_action, u_int tag_id, 1349 u_int init_id, u_int scsi_status, u_int8_t *data_ptr, 1350 u_int32_t dxfer_len, u_int32_t timeout); 1351 1352 static __inline void 1353 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries, 1354 void (*cbfcnp)(struct cam_periph *, union ccb *), 1355 u_int32_t flags, u_int tag_action, 1356 u_int8_t *data_ptr, u_int32_t dxfer_len, 1357 u_int32_t timeout); 1358 1359 static __inline void 1360 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries, 1361 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags, 1362 uint8_t *smp_request, int smp_request_len, 1363 uint8_t *smp_response, int smp_response_len, 1364 uint32_t timeout); 1365 1366 static __inline void 1367 cam_fill_mmcio(struct ccb_mmcio *mmcio, uint32_t retries, 1368 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags, 1369 uint32_t mmc_opcode, uint32_t mmc_arg, uint32_t mmc_flags, 1370 struct mmc_data *mmc_d, 1371 uint32_t timeout); 1372 1373 static __inline void 1374 cam_fill_csio(struct ccb_scsiio *csio, u_int32_t retries, 1375 void (*cbfcnp)(struct cam_periph *, union ccb *), 1376 u_int32_t flags, u_int8_t tag_action, 1377 u_int8_t *data_ptr, u_int32_t dxfer_len, 1378 u_int8_t sense_len, u_int8_t cdb_len, 1379 u_int32_t timeout) 1380 { 1381 csio->ccb_h.func_code = XPT_SCSI_IO; 1382 csio->ccb_h.flags = flags; 1383 csio->ccb_h.xflags = 0; 1384 csio->ccb_h.retry_count = retries; 1385 csio->ccb_h.cbfcnp = cbfcnp; 1386 csio->ccb_h.timeout = timeout; 1387 csio->data_ptr = data_ptr; 1388 csio->dxfer_len = dxfer_len; 1389 csio->sense_len = sense_len; 1390 csio->cdb_len = cdb_len; 1391 csio->tag_action = tag_action; 1392 #if defined(BUF_TRACKING) || defined(FULL_BUF_TRACKING) 1393 csio->bio = NULL; 1394 #endif 1395 } 1396 1397 static __inline void 1398 cam_fill_ctio(struct ccb_scsiio *csio, u_int32_t retries, 1399 void (*cbfcnp)(struct cam_periph *, union ccb *), 1400 u_int32_t flags, u_int tag_action, u_int tag_id, 1401 u_int init_id, u_int scsi_status, u_int8_t *data_ptr, 1402 u_int32_t dxfer_len, u_int32_t timeout) 1403 { 1404 csio->ccb_h.func_code = XPT_CONT_TARGET_IO; 1405 csio->ccb_h.flags = flags; 1406 csio->ccb_h.xflags = 0; 1407 csio->ccb_h.retry_count = retries; 1408 csio->ccb_h.cbfcnp = cbfcnp; 1409 csio->ccb_h.timeout = timeout; 1410 csio->data_ptr = data_ptr; 1411 csio->dxfer_len = dxfer_len; 1412 csio->scsi_status = scsi_status; 1413 csio->tag_action = tag_action; 1414 csio->tag_id = tag_id; 1415 csio->init_id = init_id; 1416 } 1417 1418 static __inline void 1419 cam_fill_ataio(struct ccb_ataio *ataio, u_int32_t retries, 1420 void (*cbfcnp)(struct cam_periph *, union ccb *), 1421 u_int32_t flags, u_int tag_action __unused, 1422 u_int8_t *data_ptr, u_int32_t dxfer_len, 1423 u_int32_t timeout) 1424 { 1425 ataio->ccb_h.func_code = XPT_ATA_IO; 1426 ataio->ccb_h.flags = flags; 1427 ataio->ccb_h.retry_count = retries; 1428 ataio->ccb_h.cbfcnp = cbfcnp; 1429 ataio->ccb_h.timeout = timeout; 1430 ataio->data_ptr = data_ptr; 1431 ataio->dxfer_len = dxfer_len; 1432 ataio->ata_flags = 0; 1433 } 1434 1435 static __inline void 1436 cam_fill_smpio(struct ccb_smpio *smpio, uint32_t retries, 1437 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags, 1438 uint8_t *smp_request, int smp_request_len, 1439 uint8_t *smp_response, int smp_response_len, 1440 uint32_t timeout) 1441 { 1442 #ifdef _KERNEL 1443 KASSERT((flags & CAM_DIR_MASK) == CAM_DIR_BOTH, 1444 ("direction != CAM_DIR_BOTH")); 1445 KASSERT((smp_request != NULL) && (smp_response != NULL), 1446 ("need valid request and response buffers")); 1447 KASSERT((smp_request_len != 0) && (smp_response_len != 0), 1448 ("need non-zero request and response lengths")); 1449 #endif /*_KERNEL*/ 1450 smpio->ccb_h.func_code = XPT_SMP_IO; 1451 smpio->ccb_h.flags = flags; 1452 smpio->ccb_h.retry_count = retries; 1453 smpio->ccb_h.cbfcnp = cbfcnp; 1454 smpio->ccb_h.timeout = timeout; 1455 smpio->smp_request = smp_request; 1456 smpio->smp_request_len = smp_request_len; 1457 smpio->smp_response = smp_response; 1458 smpio->smp_response_len = smp_response_len; 1459 } 1460 1461 static __inline void 1462 cam_fill_mmcio(struct ccb_mmcio *mmcio, uint32_t retries, 1463 void (*cbfcnp)(struct cam_periph *, union ccb *), uint32_t flags, 1464 uint32_t mmc_opcode, uint32_t mmc_arg, uint32_t mmc_flags, 1465 struct mmc_data *mmc_d, 1466 uint32_t timeout) 1467 { 1468 mmcio->ccb_h.func_code = XPT_MMC_IO; 1469 mmcio->ccb_h.flags = flags; 1470 mmcio->ccb_h.retry_count = retries; 1471 mmcio->ccb_h.cbfcnp = cbfcnp; 1472 mmcio->ccb_h.timeout = timeout; 1473 mmcio->cmd.opcode = mmc_opcode; 1474 mmcio->cmd.arg = mmc_arg; 1475 mmcio->cmd.flags = mmc_flags; 1476 mmcio->stop.opcode = 0; 1477 mmcio->stop.arg = 0; 1478 mmcio->stop.flags = 0; 1479 if (mmc_d != NULL) { 1480 mmcio->cmd.data = mmc_d; 1481 } else 1482 mmcio->cmd.data = NULL; 1483 mmcio->cmd.resp[0] = 0; 1484 mmcio->cmd.resp[1] = 0; 1485 mmcio->cmd.resp[2] = 0; 1486 mmcio->cmd.resp[3] = 0; 1487 } 1488 1489 static __inline void 1490 cam_set_ccbstatus(union ccb *ccb, cam_status status) 1491 { 1492 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1493 ccb->ccb_h.status |= status; 1494 } 1495 1496 static __inline cam_status 1497 cam_ccb_status(union ccb *ccb) 1498 { 1499 return ((cam_status)(ccb->ccb_h.status & CAM_STATUS_MASK)); 1500 } 1501 1502 void cam_calc_geometry(struct ccb_calc_geometry *ccg, int extended); 1503 1504 static __inline void 1505 cam_fill_nvmeio(struct ccb_nvmeio *nvmeio, u_int32_t retries, 1506 void (*cbfcnp)(struct cam_periph *, union ccb *), 1507 u_int32_t flags, u_int8_t *data_ptr, u_int32_t dxfer_len, 1508 u_int32_t timeout) 1509 { 1510 nvmeio->ccb_h.func_code = XPT_NVME_IO; 1511 nvmeio->ccb_h.flags = flags; 1512 nvmeio->ccb_h.retry_count = retries; 1513 nvmeio->ccb_h.cbfcnp = cbfcnp; 1514 nvmeio->ccb_h.timeout = timeout; 1515 nvmeio->data_ptr = data_ptr; 1516 nvmeio->dxfer_len = dxfer_len; 1517 } 1518 __END_DECLS 1519 1520 #endif /* _CAM_CAM_CCB_H */ 1521