1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2024 Arm Ltd 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#define VMM_HYP_FUNC(func) vmm_nvhe_ ## func 29 30#include "vmm_hyp_exception.S" 31 32 .section ".vmm_vectors","ax" 33 .align 11 34hyp_init_vectors: 35 vempty /* Synchronous EL2t */ 36 vempty /* IRQ EL2t */ 37 vempty /* FIQ EL2t */ 38 vempty /* Error EL2t */ 39 40 vempty /* Synchronous EL2h */ 41 vempty /* IRQ EL2h */ 42 vempty /* FIQ EL2h */ 43 vempty /* Error EL2h */ 44 45 vector hyp_init /* Synchronous 64-bit EL1 */ 46 vempty /* IRQ 64-bit EL1 */ 47 vempty /* FIQ 64-bit EL1 */ 48 vempty /* Error 64-bit EL1 */ 49 50 vempty /* Synchronous 32-bit EL1 */ 51 vempty /* IRQ 32-bit EL1 */ 52 vempty /* FIQ 32-bit EL1 */ 53 vempty /* Error 32-bit EL1 */ 54 55 .text 56 57/* 58 * Initialize the hypervisor mode with a new exception vector table, translation 59 * table and stack. 60 * 61 * Expecting: 62 * x0 - translation tables physical address 63 * x1 - stack top virtual address 64 * x2 - TCR_EL2 value 65 * x3 - SCTLR_EL2 value 66 * x4 - VTCR_EL2 value 67 */ 68LENTRY(handle_hyp_init) 69 /* Install the new exception vectors */ 70 adrp x6, hyp_vectors 71 add x6, x6, :lo12:hyp_vectors 72 msr vbar_el2, x6 73 /* Set the stack top address */ 74 mov sp, x1 75 /* Use the host VTTBR_EL2 to tell the host and the guests apart */ 76 mov x9, #VTTBR_HOST 77 msr vttbr_el2, x9 78 /* Load the base address for the translation tables */ 79 msr ttbr0_el2, x0 80 /* Invalidate the TLB */ 81 dsb ish 82 tlbi alle2 83 dsb ishst 84 isb 85 /* Use the same memory attributes as EL1 */ 86 mrs x9, mair_el1 87 msr mair_el2, x9 88 /* Configure address translation */ 89 msr tcr_el2, x2 90 isb 91 /* Set the system control register for EL2 */ 92 msr sctlr_el2, x3 93 /* Set the Stage 2 translation control register */ 94 msr vtcr_el2, x4 95 /* Return success */ 96 mov x0, #0 97 /* MMU is up and running */ 98 ERET 99LEND(handle_hyp_init) 100 101/* 102 * Usage: 103 * void vmm_cleanup(uint64_t handle, void *hyp_stub_vectors) 104 * 105 * Expecting: 106 * x1 - physical address of hyp_stub_vectors 107 */ 108LENTRY(vmm_cleanup) 109 /* Restore the stub vectors */ 110 msr vbar_el2, x1 111 112 /* Disable the MMU */ 113 dsb sy 114 mrs x2, sctlr_el2 115 bic x2, x2, #SCTLR_EL2_M 116 msr sctlr_el2, x2 117 isb 118 119 ERET 120LEND(vmm_cleanup) 121