xref: /freebsd/sys/arm64/rockchip/rk_usb2phy.c (revision 0705bb9de50b128540428cb7f0e0b0ba8be77d55)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.Org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 /*
29  * Rockchip USB2PHY
30  */
31 
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/bus.h>
38 #include <sys/rman.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/gpio.h>
42 #include <machine/bus.h>
43 
44 #include <dev/fdt/fdt_common.h>
45 #include <dev/ofw/ofw_bus.h>
46 #include <dev/ofw/ofw_bus_subr.h>
47 #include <dev/ofw/ofw_subr.h>
48 
49 #include <dev/extres/clk/clk.h>
50 #include <dev/extres/phy/phy_usb.h>
51 #include <dev/extres/regulator/regulator.h>
52 #include <dev/extres/syscon/syscon.h>
53 
54 #include "clkdev_if.h"
55 #include "syscon_if.h"
56 
57 #define	RK3399_GRF_USB20_PHY0_CON0	0x0
58 #define	RK3399_GRF_USB20_PHY0_CON1	0x4
59 #define	RK3399_GRF_USB20_PHY0_CON2	0x8
60 #define	RK3399_GRF_USB20_PHY0_CON3	0xC
61 
62 struct rk_usb2phy_reg {
63 	uint32_t	offset;
64 	uint32_t	enable_mask;
65 	uint32_t	disable_mask;
66 };
67 
68 struct rk_usb2phy_regs {
69 	struct rk_usb2phy_reg	clk_ctl;
70 };
71 
72 struct rk_usb2phy_regs rk3399_regs = {
73 	.clk_ctl = {
74 		/* bit 4 put pll in suspend */
75 		.enable_mask = 0x100000,
76 		.disable_mask = 0x100010,
77 	}
78 };
79 
80 static struct ofw_compat_data compat_data[] = {
81 	{ "rockchip,rk3399-usb2phy",	(uintptr_t)&rk3399_regs },
82 	{ NULL,				0 }
83 };
84 
85 struct rk_usb2phy_softc {
86 	device_t		dev;
87 	struct syscon		*grf;
88 	regulator_t		phy_supply;
89 	clk_t			clk;
90 };
91 
92 /* Phy class and methods. */
93 static int rk_usb2phy_enable(struct phynode *phynode, bool enable);
94 static phynode_method_t rk_usb2phy_phynode_methods[] = {
95 	PHYNODEMETHOD(phynode_enable,	rk_usb2phy_enable),
96 
97 	PHYNODEMETHOD_END
98 };
99 
100 DEFINE_CLASS_1(rk_usb2phy_phynode, rk_usb2phy_phynode_class,
101     rk_usb2phy_phynode_methods,
102     sizeof(struct phynode_usb_sc), phynode_usb_class);
103 
104 enum RK3399_USBPHY {
105 	RK3399_USBPHY_HOST = 0,
106 	RK3399_USBPHY_OTG,
107 };
108 
109 static int
110 rk_usb2phy_enable(struct phynode *phynode, bool enable)
111 {
112 	struct rk_usb2phy_softc *sc;
113 	device_t dev;
114 	intptr_t phy;
115 	int error;
116 
117 	dev = phynode_get_device(phynode);
118 	phy = phynode_get_id(phynode);
119 	sc = device_get_softc(dev);
120 
121 	if (phy != RK3399_USBPHY_HOST)
122 		return (ERANGE);
123 
124 	if (sc->phy_supply) {
125 		if (enable)
126 			error = regulator_enable(sc->phy_supply);
127 		else
128 			error = regulator_disable(sc->phy_supply);
129 		if (error != 0) {
130 			device_printf(dev, "Cannot %sable the regulator\n",
131 			    enable ? "En" : "Dis");
132 			goto fail;
133 		}
134 	}
135 
136 	return (0);
137 fail:
138 	return (ENXIO);
139 }
140 
141 /* Clock class and method */
142 struct rk_usb2phy_clk_sc {
143 	device_t	clkdev;
144 	struct syscon	*grf;
145 	struct rk_usb2phy_regs	*regs;
146 };
147 
148 static int
149 rk_usb2phy_clk_init(struct clknode *clk, device_t dev)
150 {
151 
152 	clknode_init_parent_idx(clk, 0);
153 	return (0);
154 }
155 
156 static int
157 rk_usb2phy_clk_set_gate(struct clknode *clk, bool enable)
158 {
159 	struct rk_usb2phy_clk_sc *sc;
160 
161 	sc = clknode_get_softc(clk);
162 
163 	if (enable)
164 		SYSCON_WRITE_4(sc->grf, sc->regs->clk_ctl.offset,
165 		    sc->regs->clk_ctl.enable_mask);
166 	else
167 		SYSCON_WRITE_4(sc->grf, sc->regs->clk_ctl.offset,
168 		    sc->regs->clk_ctl.disable_mask);
169 	return (0);
170 }
171 
172 static int
173 rk_usb2phy_clk_recalc(struct clknode *clk, uint64_t *freq)
174 {
175 
176 	*freq = 480000000;
177 
178 	return (0);
179 }
180 
181 static clknode_method_t rk_usb2phy_clk_clknode_methods[] = {
182 	/* Device interface */
183 
184 	CLKNODEMETHOD(clknode_init,		rk_usb2phy_clk_init),
185 	CLKNODEMETHOD(clknode_set_gate,		rk_usb2phy_clk_set_gate),
186 	CLKNODEMETHOD(clknode_recalc_freq,	rk_usb2phy_clk_recalc),
187 	CLKNODEMETHOD_END
188 };
189 
190 DEFINE_CLASS_1(rk_usb2phy_clk_clknode, rk_usb2phy_clk_clknode_class,
191     rk_usb2phy_clk_clknode_methods, sizeof(struct rk_usb2phy_clk_sc),
192     clknode_class);
193 
194 static int
195 rk_usb2phy_clk_ofw_map(struct clkdom *clkdom, uint32_t ncells,
196     phandle_t *cells, struct clknode **clk)
197 {
198 
199 	if (ncells != 0)
200 		return (ERANGE);
201 
202 	*clk = clknode_find_by_id(clkdom, 0);
203 
204 	if (*clk == NULL)
205 		return (ENXIO);
206 	return (0);
207 }
208 
209 static int
210 rk_usb2phy_export_clock(struct rk_usb2phy_softc *devsc)
211 {
212 	struct clknode_init_def def;
213 	struct rk_usb2phy_clk_sc *sc;
214 	const char **clknames;
215 	struct clkdom *clkdom;
216 	struct clknode *clk;
217 	clk_t clk_parent;
218 	phandle_t node;
219 	phandle_t regs[2];
220 	int i, nclocks, ncells, error;
221 
222 	node = ofw_bus_get_node(devsc->dev);
223 
224 	error = ofw_bus_parse_xref_list_get_length(node, "clocks",
225 	    "#clock-cells", &ncells);
226 	if (error != 0 || ncells != 1) {
227 		device_printf(devsc->dev, "couldn't find parent clock\n");
228 		return (ENXIO);
229 	}
230 
231 	nclocks = ofw_bus_string_list_to_array(node, "clock-output-names",
232 	    &clknames);
233 	if (nclocks != 1)
234 		return (ENXIO);
235 
236 	clkdom = clkdom_create(devsc->dev);
237 	clkdom_set_ofw_mapper(clkdom, rk_usb2phy_clk_ofw_map);
238 
239 	memset(&def, 0, sizeof(def));
240 	def.id = 0;
241 	def.name = clknames[0];
242 	def.parent_names = malloc(sizeof(char *) * ncells, M_OFWPROP, M_WAITOK);
243 	for (i = 0; i < ncells; i++) {
244 		error = clk_get_by_ofw_index(devsc->dev, 0, i, &clk_parent);
245 		if (error != 0) {
246 			device_printf(devsc->dev, "cannot get clock %d\n", error);
247 			return (ENXIO);
248 		}
249 		def.parent_names[i] = clk_get_name(clk_parent);
250 		clk_release(clk_parent);
251 	}
252 	def.parent_cnt = ncells;
253 
254 	clk = clknode_create(clkdom, &rk_usb2phy_clk_clknode_class, &def);
255 	if (clk == NULL) {
256 		device_printf(devsc->dev, "cannot create clknode\n");
257 		return (ENXIO);
258 	}
259 
260 	sc = clknode_get_softc(clk);
261 	sc->clkdev = device_get_parent(devsc->dev);
262 	sc->grf = devsc->grf;
263 	sc->regs = (struct rk_usb2phy_regs *)ofw_bus_search_compatible(devsc->dev, compat_data)->ocd_data;
264 	OF_getencprop(node, "reg", regs, sizeof(regs));
265 	sc->regs->clk_ctl.offset = regs[0];
266 	clknode_register(clkdom, clk);
267 
268 	if (clkdom_finit(clkdom) != 0) {
269 		device_printf(devsc->dev, "cannot finalize clkdom initialization\n");
270 		return (ENXIO);
271 	}
272 
273 	if (bootverbose)
274 		clkdom_dump(clkdom);
275 
276 	return (0);
277 }
278 
279 static int
280 rk_usb2phy_probe(device_t dev)
281 {
282 
283 	if (!ofw_bus_status_okay(dev))
284 		return (ENXIO);
285 
286 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
287 		return (ENXIO);
288 
289 	device_set_desc(dev, "Rockchip RK3399 USB2PHY");
290 	return (BUS_PROBE_DEFAULT);
291 }
292 
293 static int
294 rk_usb2phy_attach(device_t dev)
295 {
296 	struct rk_usb2phy_softc *sc;
297 	struct phynode_init_def phy_init;
298 	struct phynode *phynode;
299 	phandle_t node, host;
300 	int err;
301 
302 	sc = device_get_softc(dev);
303 	sc->dev = dev;
304 	node = ofw_bus_get_node(dev);
305 
306 	if (syscon_get_handle_default(dev, &sc->grf) != 0) {
307 		device_printf(dev, "Cannot get syscon handle\n");
308 		return (ENXIO);
309 	}
310 
311 	if (clk_get_by_ofw_name(dev, 0, "phyclk", &sc->clk) != 0) {
312 		device_printf(dev, "Cannot get clock\n");
313 		return (ENXIO);
314 	}
315 	err = clk_enable(sc->clk);
316 	if (err != 0) {
317 		device_printf(dev, "Could not enable clock %s\n",
318 		    clk_get_name(sc->clk));
319 		return (ENXIO);
320 	}
321 
322 	err = rk_usb2phy_export_clock(sc);
323 	if (err != 0)
324 		return (err);
325 
326 	/* Only host is supported right now */
327 
328 	host = ofw_bus_find_child(node, "host-port");
329 	if (host == 0) {
330 		device_printf(dev, "Cannot find host-port child node\n");
331 		return (ENXIO);
332 	}
333 
334 	if (!ofw_bus_node_status_okay(host)) {
335 		device_printf(dev, "host-port isn't okay\n");
336 		return (0);
337 	}
338 
339 	regulator_get_by_ofw_property(dev, host, "phy-supply", &sc->phy_supply);
340 	phy_init.id = RK3399_USBPHY_HOST;
341 	phy_init.ofw_node = host;
342 	phynode = phynode_create(dev, &rk_usb2phy_phynode_class, &phy_init);
343 	if (phynode == NULL) {
344 		device_printf(dev, "failed to create host USB2PHY\n");
345 		return (ENXIO);
346 	}
347 	if (phynode_register(phynode) == NULL) {
348 		device_printf(dev, "failed to register host USB2PHY\n");
349 		return (ENXIO);
350 	}
351 
352 	OF_device_register_xref(OF_xref_from_node(host), dev);
353 
354 	return (0);
355 }
356 
357 static device_method_t rk_usb2phy_methods[] = {
358 	/* Device interface */
359 	DEVMETHOD(device_probe,		rk_usb2phy_probe),
360 	DEVMETHOD(device_attach,	rk_usb2phy_attach),
361 
362 	DEVMETHOD_END
363 };
364 
365 static driver_t rk_usb2phy_driver = {
366 	"rk_usb2phy",
367 	rk_usb2phy_methods,
368 	sizeof(struct rk_usb2phy_softc)
369 };
370 
371 static devclass_t rk_usb2phy_devclass;
372 EARLY_DRIVER_MODULE(rk_usb2phy, simplebus, rk_usb2phy_driver,
373     rk_usb2phy_devclass, 0, 0, BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_MIDDLE);
374 MODULE_VERSION(rk_usb2phy, 1);
375