xref: /freebsd/sys/arm64/rockchip/rk_pinctrl.c (revision 5ab1c5846ff41be24b1f6beb0317bf8258cd4409)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  */
28 
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 
36 #include <sys/gpio.h>
37 #include <sys/kernel.h>
38 #include <sys/lock.h>
39 #include <sys/module.h>
40 #include <sys/mutex.h>
41 #include <sys/rman.h>
42 
43 #include <machine/bus.h>
44 #include <machine/resource.h>
45 #include <machine/intr.h>
46 
47 #include <dev/fdt/simplebus.h>
48 
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
51 
52 #include <dev/fdt/fdt_pinctrl.h>
53 
54 #include <dev/extres/syscon/syscon.h>
55 
56 #include "gpio_if.h"
57 #include "syscon_if.h"
58 
59 struct rk_pinctrl_pin_drive {
60 	uint32_t	bank;
61 	uint32_t	subbank;
62 	uint32_t	offset;
63 	uint32_t	value;
64 	uint32_t	ma;
65 };
66 
67 struct rk_pinctrl_bank {
68 	uint32_t	bank;
69 	uint32_t	subbank;
70 	uint32_t	offset;
71 	uint32_t	nbits;
72 };
73 
74 struct rk_pinctrl_pin_fixup {
75 	uint32_t	bank;
76 	uint32_t	subbank;
77 	uint32_t	pin;
78 	uint32_t	reg;
79 	uint32_t	bit;
80 	uint32_t	mask;
81 };
82 
83 struct rk_pinctrl_gpio {
84 	uint32_t	bank;
85 	char		*gpio_name;
86 	device_t	gpio_dev;
87 };
88 
89 
90 struct rk_pinctrl_softc;
91 
92 struct rk_pinctrl_conf {
93 	struct rk_pinctrl_bank		*iomux_conf;
94 	uint32_t			iomux_nbanks;
95 	struct rk_pinctrl_pin_fixup	*pin_fixup;
96 	uint32_t			npin_fixup;
97 	struct rk_pinctrl_pin_drive	*pin_drive;
98 	uint32_t			npin_drive;
99 	struct rk_pinctrl_gpio		*gpio_bank;
100 	uint32_t			ngpio_bank;
101 	uint32_t	(*get_pd_offset)(struct rk_pinctrl_softc *, uint32_t);
102 	struct syscon	*(*get_syscon)(struct rk_pinctrl_softc *, uint32_t);
103 };
104 
105 struct rk_pinctrl_softc {
106 	struct simplebus_softc	simplebus_sc;
107 	device_t		dev;
108 	struct syscon		*grf;
109 	struct syscon		*pmu;
110 	struct rk_pinctrl_conf	*conf;
111 };
112 
113 #define	RK_IOMUX(_bank, _subbank, _offset, _nbits)			\
114 {									\
115 	.bank = _bank,							\
116 	.subbank = _subbank,						\
117 	.offset = _offset,						\
118 	.nbits = _nbits,						\
119 }
120 
121 #define	RK_PINFIX(_bank, _pin, _reg, _bit, _mask)			\
122 {									\
123 	.bank = _bank,							\
124 	.pin = _pin,							\
125 	.reg = _reg,							\
126 	.bit = _bit,							\
127 	.mask = _mask,							\
128 }
129 
130 #define	RK_PINDRIVE(_bank, _subbank, _offset, _value, _ma)		\
131 {									\
132 	.bank = _bank,							\
133 	.subbank = _subbank,						\
134 	.offset = _offset,						\
135 	.value = _value,						\
136 	.ma = _ma,							\
137 }
138 #define	RK_GPIO(_bank, _name)						\
139 {									\
140 	.bank = _bank,							\
141 	.gpio_name = _name,						\
142 }
143 
144 static struct rk_pinctrl_gpio rk3288_gpio_bank[] = {
145 	RK_GPIO(0, "gpio0"),
146 	RK_GPIO(1, "gpio1"),
147 	RK_GPIO(2, "gpio2"),
148 	RK_GPIO(3, "gpio3"),
149 	RK_GPIO(4, "gpio4"),
150 	RK_GPIO(5, "gpio5"),
151 	RK_GPIO(6, "gpio6"),
152 	RK_GPIO(7, "gpio7"),
153 	RK_GPIO(8, "gpio8"),
154 };
155 
156 static struct rk_pinctrl_bank rk3288_iomux_bank[] = {
157 	/*    bank sub  offs   nbits */
158 	/* PMU */
159 	RK_IOMUX(0, 0, 0x0084, 2),
160 	RK_IOMUX(0, 1, 0x0088, 2),
161 	RK_IOMUX(0, 2, 0x008C, 2),
162 	/* GFR */
163 	RK_IOMUX(1, 3, 0x000C, 2),
164 	RK_IOMUX(2, 0, 0x0010, 2),
165 	RK_IOMUX(2, 1, 0x0014, 2),
166 	RK_IOMUX(2, 2, 0x0018, 2),
167 	RK_IOMUX(2, 3, 0x001C, 2),
168 	RK_IOMUX(3, 0, 0x0020, 2),
169 	RK_IOMUX(3, 1, 0x0024, 2),
170 	RK_IOMUX(3, 2, 0x0028, 2),
171 	RK_IOMUX(3, 3, 0x002C, 4),
172 	RK_IOMUX(4, 0, 0x0034, 4),
173 	RK_IOMUX(4, 1, 0x003C, 4),
174 	RK_IOMUX(4, 2, 0x0044, 2),
175 	RK_IOMUX(4, 3, 0x0048, 2),
176 	/* 5,0 - Empty */
177 	RK_IOMUX(5, 1, 0x0050, 2),
178 	RK_IOMUX(5, 2, 0x0054, 2),
179 	/* 5,3 - Empty */
180 	RK_IOMUX(6, 0, 0x005C, 2),
181 	RK_IOMUX(6, 1, 0x0060, 2),
182 	RK_IOMUX(6, 2, 0x0064, 2),
183 	/* 6,3 - Empty */
184 	RK_IOMUX(7, 0, 0x006C, 2),
185 	RK_IOMUX(7, 1, 0x0070, 2),
186 	RK_IOMUX(7, 2, 0x0074, 4),
187 	/* 7,3 - Empty */
188 	RK_IOMUX(8, 0, 0x0080, 2),
189 	RK_IOMUX(8, 1, 0x0084, 2),
190 	/* 8,2 - Empty */
191 	/* 8,3 - Empty */
192 
193 };
194 
195 static struct rk_pinctrl_pin_fixup rk3288_pin_fixup[] = {
196 };
197 
198 static struct rk_pinctrl_pin_drive rk3288_pin_drive[] = {
199 	/*       bank sub offs val ma */
200 	/* GPIO0A (PMU)*/
201 	RK_PINDRIVE(0, 0, 0x070, 0, 2),
202 	RK_PINDRIVE(0, 0, 0x070, 1, 4),
203 	RK_PINDRIVE(0, 0, 0x070, 2, 8),
204 	RK_PINDRIVE(0, 0, 0x070, 3, 12),
205 
206 	/* GPIO0B (PMU)*/
207 	RK_PINDRIVE(0, 1, 0x074, 0, 2),
208 	RK_PINDRIVE(0, 1, 0x074, 1, 4),
209 	RK_PINDRIVE(0, 1, 0x074, 2, 8),
210 	RK_PINDRIVE(0, 1, 0x074, 3, 12),
211 
212 	/* GPIO0C (PMU)*/
213 	RK_PINDRIVE(0, 2, 0x078, 0, 2),
214 	RK_PINDRIVE(0, 2, 0x078, 1, 4),
215 	RK_PINDRIVE(0, 2, 0x078, 2, 8),
216 	RK_PINDRIVE(0, 2, 0x078, 3, 12),
217 
218 	/* GPIO1D */
219 	RK_PINDRIVE(1, 3, 0x1CC, 0, 2),
220 	RK_PINDRIVE(1, 3, 0x1CC, 1, 4),
221 	RK_PINDRIVE(1, 3, 0x1CC, 2, 8),
222 	RK_PINDRIVE(1, 3, 0x1CC, 3, 12),
223 
224 	/* GPIO2A */
225 	RK_PINDRIVE(2, 0, 0x1D0, 0, 2),
226 	RK_PINDRIVE(2, 0, 0x1D0, 1, 4),
227 	RK_PINDRIVE(2, 0, 0x1D0, 2, 8),
228 	RK_PINDRIVE(2, 0, 0x1D0, 3, 12),
229 
230 	/* GPIO2B */
231 	RK_PINDRIVE(2, 1, 0x1D4, 0, 2),
232 	RK_PINDRIVE(2, 1, 0x1D4, 1, 4),
233 	RK_PINDRIVE(2, 1, 0x1D4, 2, 8),
234 	RK_PINDRIVE(2, 1, 0x1D4, 3, 12),
235 
236 	/* GPIO2C */
237 	RK_PINDRIVE(2, 2, 0x1D8, 0, 2),
238 	RK_PINDRIVE(2, 2, 0x1D8, 1, 4),
239 	RK_PINDRIVE(2, 2, 0x1D8, 2, 8),
240 	RK_PINDRIVE(2, 2, 0x1D8, 3, 12),
241 
242 	/* GPIO2D */
243 	RK_PINDRIVE(2, 3, 0x1DC, 0, 2),
244 	RK_PINDRIVE(2, 3, 0x1DC, 1, 4),
245 	RK_PINDRIVE(2, 3, 0x1DC, 2, 8),
246 	RK_PINDRIVE(2, 3, 0x1DC, 3, 12),
247 
248 	/* GPIO3A */
249 	RK_PINDRIVE(3, 0, 0x1E0, 0, 2),
250 	RK_PINDRIVE(3, 0, 0x1E0, 1, 4),
251 	RK_PINDRIVE(3, 0, 0x1E0, 2, 8),
252 	RK_PINDRIVE(3, 0, 0x1E0, 3, 12),
253 
254 	/* GPIO3B */
255 	RK_PINDRIVE(3, 1, 0x1E4, 0, 2),
256 	RK_PINDRIVE(3, 1, 0x1E4, 1, 4),
257 	RK_PINDRIVE(3, 1, 0x1E4, 2, 8),
258 	RK_PINDRIVE(3, 1, 0x1E4, 3, 12),
259 
260 	/* GPIO3C */
261 	RK_PINDRIVE(3, 2, 0x1E8, 0, 2),
262 	RK_PINDRIVE(3, 2, 0x1E8, 1, 4),
263 	RK_PINDRIVE(3, 2, 0x1E8, 2, 8),
264 	RK_PINDRIVE(3, 2, 0x1E8, 3, 12),
265 
266 	/* GPIO3D */
267 	RK_PINDRIVE(3, 3, 0x1EC, 0, 2),
268 	RK_PINDRIVE(3, 3, 0x1EC, 1, 4),
269 	RK_PINDRIVE(3, 3, 0x1EC, 2, 8),
270 	RK_PINDRIVE(3, 3, 0x1EC, 3, 12),
271 
272 	/* GPIO4A */
273 	RK_PINDRIVE(4, 0, 0x1F0, 0, 2),
274 	RK_PINDRIVE(4, 0, 0x1F0, 1, 4),
275 	RK_PINDRIVE(4, 0, 0x1F0, 2, 8),
276 	RK_PINDRIVE(4, 0, 0x1F0, 3, 12),
277 
278 	/* GPIO4B */
279 	RK_PINDRIVE(4, 1, 0x1F4, 0, 2),
280 	RK_PINDRIVE(4, 1, 0x1F4, 1, 4),
281 	RK_PINDRIVE(4, 1, 0x1F4, 2, 8),
282 	RK_PINDRIVE(4, 1, 0x1F4, 3, 12),
283 
284 	/* GPIO4C */
285 	RK_PINDRIVE(4, 2, 0x1F8, 0, 2),
286 	RK_PINDRIVE(4, 2, 0x1F8, 1, 4),
287 	RK_PINDRIVE(4, 2, 0x1F8, 2, 8),
288 	RK_PINDRIVE(4, 2, 0x1F8, 3, 12),
289 
290 	/* GPIO4D */
291 	RK_PINDRIVE(4, 3, 0x1FC, 0, 2),
292 	RK_PINDRIVE(4, 3, 0x1FC, 1, 4),
293 	RK_PINDRIVE(4, 3, 0x1FC, 2, 8),
294 	RK_PINDRIVE(4, 3, 0x1FC, 3, 12),
295 
296 	/* GPIO5B */
297 	RK_PINDRIVE(5, 1, 0x204, 0, 2),
298 	RK_PINDRIVE(5, 1, 0x204, 1, 4),
299 	RK_PINDRIVE(5, 1, 0x204, 2, 8),
300 	RK_PINDRIVE(5, 1, 0x204, 3, 12),
301 
302 	/* GPIO5C */
303 	RK_PINDRIVE(5, 2, 0x208, 0, 2),
304 	RK_PINDRIVE(5, 2, 0x208, 1, 4),
305 	RK_PINDRIVE(5, 2, 0x208, 2, 8),
306 	RK_PINDRIVE(5, 2, 0x208, 3, 12),
307 
308 	/* GPIO6A */
309 	RK_PINDRIVE(6, 0, 0x210, 0, 2),
310 	RK_PINDRIVE(6, 0, 0x210, 1, 4),
311 	RK_PINDRIVE(6, 0, 0x210, 2, 8),
312 	RK_PINDRIVE(6, 0, 0x210, 3, 12),
313 
314 	/* GPIO6B */
315 	RK_PINDRIVE(6, 1, 0x214, 0, 2),
316 	RK_PINDRIVE(6, 1, 0x214, 1, 4),
317 	RK_PINDRIVE(6, 1, 0x214, 2, 8),
318 	RK_PINDRIVE(6, 1, 0x214, 3, 12),
319 
320 	/* GPIO6C */
321 	RK_PINDRIVE(6, 2, 0x218, 0, 2),
322 	RK_PINDRIVE(6, 2, 0x218, 1, 4),
323 	RK_PINDRIVE(6, 2, 0x218, 2, 8),
324 	RK_PINDRIVE(6, 2, 0x218, 3, 12),
325 
326 	/* GPIO7A */
327 	RK_PINDRIVE(7, 0, 0x220, 0, 2),
328 	RK_PINDRIVE(7, 0, 0x220, 1, 4),
329 	RK_PINDRIVE(7, 0, 0x220, 2, 8),
330 	RK_PINDRIVE(7, 0, 0x220, 3, 12),
331 
332 	/* GPIO7B */
333 	RK_PINDRIVE(7, 1, 0x224, 0, 2),
334 	RK_PINDRIVE(7, 1, 0x224, 1, 4),
335 	RK_PINDRIVE(7, 1, 0x224, 2, 8),
336 	RK_PINDRIVE(7, 1, 0x224, 3, 12),
337 
338 	/* GPIO7C */
339 	RK_PINDRIVE(7, 2, 0x228, 0, 2),
340 	RK_PINDRIVE(7, 2, 0x228, 1, 4),
341 	RK_PINDRIVE(7, 2, 0x228, 2, 8),
342 	RK_PINDRIVE(7, 2, 0x228, 3, 12),
343 
344 	/* GPIO8A */
345 	RK_PINDRIVE(8, 0, 0x230, 0, 2),
346 	RK_PINDRIVE(8, 0, 0x230, 1, 4),
347 	RK_PINDRIVE(8, 0, 0x230, 2, 8),
348 	RK_PINDRIVE(8, 0, 0x230, 3, 12),
349 
350 	/* GPIO8B */
351 	RK_PINDRIVE(8, 1, 0x234, 0, 2),
352 	RK_PINDRIVE(8, 1, 0x234, 1, 4),
353 	RK_PINDRIVE(8, 1, 0x234, 2, 8),
354 	RK_PINDRIVE(8, 1, 0x234, 3, 12),
355 };
356 
357 static uint32_t
358 rk3288_get_pd_offset(struct rk_pinctrl_softc *sc, uint32_t bank)
359 {
360 	if (bank == 0)
361 		return (0x064);		/* PMU */
362 	return (0x130);
363 }
364 
365 static struct syscon *
366 rk3288_get_syscon(struct rk_pinctrl_softc *sc, uint32_t bank)
367 {
368 	if (bank == 0)
369 		return (sc->pmu);
370 	return (sc->grf);
371 }
372 
373 struct rk_pinctrl_conf rk3288_conf = {
374 	.iomux_conf = rk3288_iomux_bank,
375 	.iomux_nbanks = nitems(rk3288_iomux_bank),
376 	.pin_fixup = rk3288_pin_fixup,
377 	.npin_fixup = nitems(rk3288_pin_fixup),
378 	.pin_drive = rk3288_pin_drive,
379 	.npin_drive = nitems(rk3288_pin_drive),
380 	.gpio_bank = rk3288_gpio_bank,
381 	.ngpio_bank = nitems(rk3288_gpio_bank),
382 	.get_pd_offset = rk3288_get_pd_offset,
383 	.get_syscon = rk3288_get_syscon,
384 };
385 
386 static struct rk_pinctrl_gpio rk3328_gpio_bank[] = {
387 	RK_GPIO(0, "gpio0"),
388 	RK_GPIO(1, "gpio1"),
389 	RK_GPIO(2, "gpio2"),
390 	RK_GPIO(3, "gpio3"),
391 };
392 
393 static struct rk_pinctrl_bank rk3328_iomux_bank[] = {
394 	/*    bank sub offs nbits */
395 	RK_IOMUX(0, 0, 0x0000, 2),
396 	RK_IOMUX(0, 1, 0x0004, 2),
397 	RK_IOMUX(0, 2, 0x0008, 2),
398 	RK_IOMUX(0, 3, 0x000C, 2),
399 	RK_IOMUX(1, 0, 0x0010, 2),
400 	RK_IOMUX(1, 1, 0x0014, 2),
401 	RK_IOMUX(1, 2, 0x0018, 2),
402 	RK_IOMUX(1, 3, 0x001C, 2),
403 	RK_IOMUX(2, 0, 0x0020, 2),
404 	RK_IOMUX(2, 1, 0x0024, 3),
405 	RK_IOMUX(2, 2, 0x002c, 3),
406 	RK_IOMUX(2, 3, 0x0034, 2),
407 	RK_IOMUX(3, 0, 0x0038, 3),
408 	RK_IOMUX(3, 1, 0x0040, 3),
409 	RK_IOMUX(3, 2, 0x0048, 2),
410 	RK_IOMUX(3, 3, 0x004c, 2),
411 };
412 
413 static struct rk_pinctrl_pin_fixup rk3328_pin_fixup[] = {
414 	/*      bank  pin reg  bit  mask */
415 	RK_PINFIX(2, 12, 0x24,  8, 0x300),
416 	RK_PINFIX(2, 15, 0x28,  0, 0x7),
417 	RK_PINFIX(2, 23, 0x30, 14, 0x6000),
418 };
419 
420 
421 static struct rk_pinctrl_pin_drive rk3328_pin_drive[] = {
422 	/*       bank sub  offs val ma */
423 	RK_PINDRIVE(0, 0, 0x200, 0, 2),
424 	RK_PINDRIVE(0, 0, 0x200, 1, 4),
425 	RK_PINDRIVE(0, 0, 0x200, 2, 8),
426 	RK_PINDRIVE(0, 0, 0x200, 3, 12),
427 
428 	RK_PINDRIVE(0, 1, 0x204, 0, 2),
429 	RK_PINDRIVE(0, 1, 0x204, 1, 4),
430 	RK_PINDRIVE(0, 1, 0x204, 2, 8),
431 	RK_PINDRIVE(0, 1, 0x204, 3, 12),
432 
433 	RK_PINDRIVE(0, 2, 0x208, 0, 2),
434 	RK_PINDRIVE(0, 2, 0x208, 1, 4),
435 	RK_PINDRIVE(0, 2, 0x208, 2, 8),
436 	RK_PINDRIVE(0, 2, 0x208, 3, 12),
437 
438 	RK_PINDRIVE(0, 3, 0x20C, 0, 2),
439 	RK_PINDRIVE(0, 3, 0x20C, 1, 4),
440 	RK_PINDRIVE(0, 3, 0x20C, 2, 8),
441 	RK_PINDRIVE(0, 3, 0x20C, 3, 12),
442 
443 	RK_PINDRIVE(1, 0, 0x210, 0, 2),
444 	RK_PINDRIVE(1, 0, 0x210, 1, 4),
445 	RK_PINDRIVE(1, 0, 0x210, 2, 8),
446 	RK_PINDRIVE(1, 0, 0x210, 3, 12),
447 
448 	RK_PINDRIVE(1, 1, 0x214, 0, 2),
449 	RK_PINDRIVE(1, 1, 0x214, 1, 4),
450 	RK_PINDRIVE(1, 1, 0x214, 2, 8),
451 	RK_PINDRIVE(1, 1, 0x214, 3, 12),
452 
453 	RK_PINDRIVE(1, 2, 0x218, 0, 2),
454 	RK_PINDRIVE(1, 2, 0x218, 1, 4),
455 	RK_PINDRIVE(1, 2, 0x218, 2, 8),
456 	RK_PINDRIVE(1, 2, 0x218, 3, 12),
457 
458 	RK_PINDRIVE(1, 3, 0x21C, 0, 2),
459 	RK_PINDRIVE(1, 3, 0x21C, 1, 4),
460 	RK_PINDRIVE(1, 3, 0x21C, 2, 8),
461 	RK_PINDRIVE(1, 3, 0x21C, 3, 12),
462 
463 	RK_PINDRIVE(2, 0, 0x220, 0, 2),
464 	RK_PINDRIVE(2, 0, 0x220, 1, 4),
465 	RK_PINDRIVE(2, 0, 0x220, 2, 8),
466 	RK_PINDRIVE(2, 0, 0x220, 3, 12),
467 
468 	RK_PINDRIVE(2, 1, 0x224, 0, 2),
469 	RK_PINDRIVE(2, 1, 0x224, 1, 4),
470 	RK_PINDRIVE(2, 1, 0x224, 2, 8),
471 	RK_PINDRIVE(2, 1, 0x224, 3, 12),
472 
473 	RK_PINDRIVE(2, 2, 0x228, 0, 2),
474 	RK_PINDRIVE(2, 2, 0x228, 1, 4),
475 	RK_PINDRIVE(2, 2, 0x228, 2, 8),
476 	RK_PINDRIVE(2, 2, 0x228, 3, 12),
477 
478 	RK_PINDRIVE(2, 3, 0x22C, 0, 2),
479 	RK_PINDRIVE(2, 3, 0x22C, 1, 4),
480 	RK_PINDRIVE(2, 3, 0x22C, 2, 8),
481 	RK_PINDRIVE(2, 3, 0x22C, 3, 12),
482 
483 	RK_PINDRIVE(3, 0, 0x230, 0, 2),
484 	RK_PINDRIVE(3, 0, 0x230, 1, 4),
485 	RK_PINDRIVE(3, 0, 0x230, 2, 8),
486 	RK_PINDRIVE(3, 0, 0x230, 3, 12),
487 
488 	RK_PINDRIVE(3, 1, 0x234, 0, 2),
489 	RK_PINDRIVE(3, 1, 0x234, 1, 4),
490 	RK_PINDRIVE(3, 1, 0x234, 2, 8),
491 	RK_PINDRIVE(3, 1, 0x234, 3, 12),
492 
493 	RK_PINDRIVE(3, 2, 0x238, 0, 2),
494 	RK_PINDRIVE(3, 2, 0x238, 1, 4),
495 	RK_PINDRIVE(3, 2, 0x238, 2, 8),
496 	RK_PINDRIVE(3, 2, 0x238, 3, 12),
497 
498 	RK_PINDRIVE(3, 3, 0x23C, 0, 2),
499 	RK_PINDRIVE(3, 3, 0x23C, 1, 4),
500 	RK_PINDRIVE(3, 3, 0x23C, 2, 8),
501 	RK_PINDRIVE(3, 3, 0x23C, 3, 12),
502 };
503 
504 static uint32_t
505 rk3328_get_pd_offset(struct rk_pinctrl_softc *sc, uint32_t bank)
506 {
507 	return (0x100);
508 }
509 
510 static struct syscon *
511 rk3328_get_syscon(struct rk_pinctrl_softc *sc, uint32_t bank)
512 {
513 	return (sc->grf);
514 }
515 
516 struct rk_pinctrl_conf rk3328_conf = {
517 	.iomux_conf = rk3328_iomux_bank,
518 	.iomux_nbanks = nitems(rk3328_iomux_bank),
519 	.pin_fixup = rk3328_pin_fixup,
520 	.npin_fixup = nitems(rk3328_pin_fixup),
521 	.pin_drive = rk3328_pin_drive,
522 	.npin_drive = nitems(rk3328_pin_drive),
523 	.gpio_bank = rk3328_gpio_bank,
524 	.ngpio_bank = nitems(rk3328_gpio_bank),
525 	.get_pd_offset = rk3328_get_pd_offset,
526 	.get_syscon = rk3328_get_syscon,
527 };
528 
529 static struct rk_pinctrl_gpio rk3399_gpio_bank[] = {
530 	RK_GPIO(0, "gpio0"),
531 	RK_GPIO(1, "gpio1"),
532 	RK_GPIO(2, "gpio2"),
533 	RK_GPIO(3, "gpio3"),
534 	RK_GPIO(4, "gpio4"),
535 };
536 
537 static struct rk_pinctrl_bank rk3399_iomux_bank[] = {
538 	/*    bank sub  offs   nbits */
539 	RK_IOMUX(0, 0, 0x0000, 2),
540 	RK_IOMUX(0, 1, 0x0004, 2),
541 	RK_IOMUX(0, 2, 0x0008, 2),
542 	RK_IOMUX(0, 3, 0x000C, 2),
543 	RK_IOMUX(1, 0, 0x0010, 2),
544 	RK_IOMUX(1, 1, 0x0014, 2),
545 	RK_IOMUX(1, 2, 0x0018, 2),
546 	RK_IOMUX(1, 3, 0x001C, 2),
547 	RK_IOMUX(2, 0, 0xE000, 2),
548 	RK_IOMUX(2, 1, 0xE004, 2),
549 	RK_IOMUX(2, 2, 0xE008, 2),
550 	RK_IOMUX(2, 3, 0xE00C, 2),
551 	RK_IOMUX(3, 0, 0xE010, 2),
552 	RK_IOMUX(3, 1, 0xE014, 2),
553 	RK_IOMUX(3, 2, 0xE018, 2),
554 	RK_IOMUX(3, 3, 0xE01C, 2),
555 	RK_IOMUX(4, 0, 0xE020, 2),
556 	RK_IOMUX(4, 1, 0xE024, 2),
557 	RK_IOMUX(4, 2, 0xE028, 2),
558 	RK_IOMUX(4, 3, 0xE02C, 2),
559 };
560 
561 static struct rk_pinctrl_pin_fixup rk3399_pin_fixup[] = {};
562 
563 static struct rk_pinctrl_pin_drive rk3399_pin_drive[] = {
564 	/*       bank sub offs val ma */
565 	/* GPIO0A */
566 	RK_PINDRIVE(0, 0, 0x80, 0, 5),
567 	RK_PINDRIVE(0, 0, 0x80, 1, 10),
568 	RK_PINDRIVE(0, 0, 0x80, 2, 15),
569 	RK_PINDRIVE(0, 0, 0x80, 3, 20),
570 
571 	/* GPIOB */
572 	RK_PINDRIVE(0, 1, 0x88, 0, 5),
573 	RK_PINDRIVE(0, 1, 0x88, 1, 10),
574 	RK_PINDRIVE(0, 1, 0x88, 2, 15),
575 	RK_PINDRIVE(0, 1, 0x88, 3, 20),
576 
577 	/* GPIO1A */
578 	RK_PINDRIVE(1, 0, 0xA0, 0, 3),
579 	RK_PINDRIVE(1, 0, 0xA0, 1, 6),
580 	RK_PINDRIVE(1, 0, 0xA0, 2, 9),
581 	RK_PINDRIVE(1, 0, 0xA0, 3, 12),
582 
583 	/* GPIO1B */
584 	RK_PINDRIVE(1, 1, 0xA8, 0, 3),
585 	RK_PINDRIVE(1, 1, 0xA8, 1, 6),
586 	RK_PINDRIVE(1, 1, 0xA8, 2, 9),
587 	RK_PINDRIVE(1, 1, 0xA8, 3, 12),
588 
589 	/* GPIO1C */
590 	RK_PINDRIVE(1, 2, 0xB0, 0, 3),
591 	RK_PINDRIVE(1, 2, 0xB0, 1, 6),
592 	RK_PINDRIVE(1, 2, 0xB0, 2, 9),
593 	RK_PINDRIVE(1, 2, 0xB0, 3, 12),
594 
595 	/* GPIO1D */
596 	RK_PINDRIVE(1, 3, 0xB8, 0, 3),
597 	RK_PINDRIVE(1, 3, 0xB8, 1, 6),
598 	RK_PINDRIVE(1, 3, 0xB8, 2, 9),
599 	RK_PINDRIVE(1, 3, 0xB8, 3, 12),
600 };
601 
602 static uint32_t
603 rk3399_get_pd_offset(struct rk_pinctrl_softc *sc, uint32_t bank)
604 {
605 	if (bank < 2)
606 		return (0x40);
607 
608 	return (0xE040);
609 }
610 
611 static struct syscon *
612 rk3399_get_syscon(struct rk_pinctrl_softc *sc, uint32_t bank)
613 {
614 	if (bank < 2)
615 		return (sc->pmu);
616 
617 	return (sc->grf);
618 }
619 
620 struct rk_pinctrl_conf rk3399_conf = {
621 	.iomux_conf = rk3399_iomux_bank,
622 	.iomux_nbanks = nitems(rk3399_iomux_bank),
623 	.pin_fixup = rk3399_pin_fixup,
624 	.npin_fixup = nitems(rk3399_pin_fixup),
625 	.pin_drive = rk3399_pin_drive,
626 	.npin_drive = nitems(rk3399_pin_drive),
627 	.gpio_bank = rk3399_gpio_bank,
628 	.ngpio_bank = nitems(rk3399_gpio_bank),
629 	.get_pd_offset = rk3399_get_pd_offset,
630 	.get_syscon = rk3399_get_syscon,
631 };
632 
633 static struct ofw_compat_data compat_data[] = {
634 	{"rockchip,rk3288-pinctrl", (uintptr_t)&rk3288_conf},
635 	{"rockchip,rk3328-pinctrl", (uintptr_t)&rk3328_conf},
636 	{"rockchip,rk3399-pinctrl", (uintptr_t)&rk3399_conf},
637 	{NULL,             0}
638 };
639 
640 static int
641 rk_pinctrl_parse_bias(phandle_t node)
642 {
643 	if (OF_hasprop(node, "bias-disable"))
644 		return (0);
645 	if (OF_hasprop(node, "bias-pull-up"))
646 		return (1);
647 	if (OF_hasprop(node, "bias-pull-down"))
648 		return (2);
649 
650 	return (-1);
651 }
652 
653 static int
654 rk_pinctrl_parse_drive(struct rk_pinctrl_softc *sc, phandle_t node,
655   uint32_t bank, uint32_t subbank, uint32_t *drive, uint32_t *offset)
656 {
657 	uint32_t value;
658 	int i;
659 
660 	if (OF_getencprop(node, "drive-strength", &value,
661 	    sizeof(value)) != 0)
662 		return (-1);
663 
664 	/* Map to the correct drive value */
665 	for (i = 0; i < sc->conf->npin_drive; i++) {
666 		if (sc->conf->pin_drive[i].bank != bank &&
667 		    sc->conf->pin_drive[i].subbank != subbank)
668 			continue;
669 		if (sc->conf->pin_drive[i].ma == value) {
670 			*drive = sc->conf->pin_drive[i].value;
671 			return (0);
672 		}
673 	}
674 
675 	return (-1);
676 }
677 
678 static void
679 rk_pinctrl_get_fixup(struct rk_pinctrl_softc *sc, uint32_t bank, uint32_t pin,
680     uint32_t *reg, uint32_t *mask, uint32_t *bit)
681 {
682 	int i;
683 
684 	for (i = 0; i < sc->conf->npin_fixup; i++)
685 		if (sc->conf->pin_fixup[i].bank == bank &&
686 		    sc->conf->pin_fixup[i].pin == pin) {
687 			*reg = sc->conf->pin_fixup[i].reg;
688 			*mask = sc->conf->pin_fixup[i].mask;
689 			*bit = sc->conf->pin_fixup[i].bit;
690 
691 			return;
692 		}
693 }
694 
695 static int
696 rk_pinctrl_handle_io(struct rk_pinctrl_softc *sc, phandle_t node, uint32_t bank,
697 uint32_t pin)
698 {
699 	bool have_cfg, have_direction, have_value;
700 	uint32_t  direction_value, pin_value;
701 	struct rk_pinctrl_gpio *gpio;
702 	int i, rv;
703 
704 	have_cfg = false;
705 	have_direction = false;
706 	have_value = false;
707 
708 	/* Get (subset of) GPIO pin properties. */
709 	if (OF_hasprop(node, "output-disable")) {
710 		have_cfg = true;
711 		have_direction = true;
712 		direction_value = GPIO_PIN_INPUT;
713 	}
714 
715 	if (OF_hasprop(node, "output-enable")) {
716 		have_cfg = true;
717 		have_direction = true;
718 		direction_value = GPIO_PIN_OUTPUT;
719 	}
720 
721 	if (OF_hasprop(node, "output-low")) {
722 		have_cfg = true;
723 		have_direction = true;
724 		direction_value = GPIO_PIN_OUTPUT;
725 		have_value = true;
726 		pin_value = 0;
727 	}
728 
729 	if (OF_hasprop(node, "output-high")) {
730 		have_cfg = true;
731 		have_direction = true;
732 		direction_value = GPIO_PIN_OUTPUT;
733 		have_value = true;
734 		pin_value = 1;
735 	}
736 
737 	if (!have_cfg)
738 		return (0);
739 
740 	/* Find gpio */
741 	gpio = NULL;
742 	for(i = 0; i < sc->conf->ngpio_bank; i++) {
743 		if (bank ==  sc->conf->gpio_bank[i].bank) {
744 			gpio = sc->conf->gpio_bank + i;
745 			break;
746 		}
747 	}
748 	if (gpio == NULL) {
749 		device_printf(sc->dev, "Cannot find GPIO bank %d\n", bank);
750 		return (ENXIO);
751 	}
752 	if (gpio->gpio_dev == NULL) {
753 		device_printf(sc->dev,
754 		    "No GPIO subdevice found for bank %d\n", bank);
755 		return (ENXIO);
756 	}
757 
758 	rv = 0;
759 	if (have_value) {
760 		rv = GPIO_PIN_SET(gpio->gpio_dev, pin, pin_value);
761 		if (rv != 0) {
762 			device_printf(sc->dev, "Cannot set GPIO value: %d\n",
763 			    rv);
764 			return (rv);
765 		}
766 	}
767 
768 	if (have_direction) {
769 		rv = GPIO_PIN_SETFLAGS(gpio->gpio_dev, pin, direction_value);
770 		if (rv != 0) {
771 			device_printf(sc->dev,
772 			    "Cannot set GPIO direction: %d\n", rv);
773 			return (rv);
774 		}
775 	}
776 
777 	return (0);
778 }
779 
780 static void
781 rk_pinctrl_configure_pin(struct rk_pinctrl_softc *sc, uint32_t *pindata)
782 {
783 	phandle_t pin_conf;
784 	struct syscon *syscon;
785 	uint32_t bank, subbank, pin, function, bias;
786 	uint32_t bit, mask, reg, drive;
787 	int i, rv;
788 
789 	bank = pindata[0];
790 	pin = pindata[1];
791 	function = pindata[2];
792 	pin_conf = OF_node_from_xref(pindata[3]);
793 	subbank = pin / 8;
794 
795 	for (i = 0; i < sc->conf->iomux_nbanks; i++)
796 		if (sc->conf->iomux_conf[i].bank == bank &&
797 		    sc->conf->iomux_conf[i].subbank == subbank)
798 			break;
799 
800 	if (i == sc->conf->iomux_nbanks) {
801 		device_printf(sc->dev, "Unknown pin %d in bank %d\n", pin,
802 		    bank);
803 		return;
804 	}
805 
806 	/* Find syscon */
807 	syscon = sc->conf->get_syscon(sc, bank);
808 
809 	/* Parse pin function */
810 	reg = sc->conf->iomux_conf[i].offset;
811 	switch (sc->conf->iomux_conf[i].nbits) {
812 	case 4:
813 		if ((pin % 8) >= 4)
814 			reg += 0x4;
815 		bit = (pin % 4) * 4;
816 		mask = (0xF << bit);
817 		break;
818 	case 3:
819 		if ((pin % 8) >= 5)
820 			reg += 4;
821 		bit = (pin % 8 % 5) * 3;
822 		mask = (0x7 << bit);
823 		break;
824 	case 2:
825 		bit = (pin % 8) * 2;
826 		mask = (0x3 << bit);
827 		break;
828 	default:
829 		device_printf(sc->dev,
830 		    "Unknown pin stride width %d in bank %d\n",
831 		    sc->conf->iomux_conf[i].nbits, bank);
832 		return;
833 	}
834 	rk_pinctrl_get_fixup(sc, bank, pin, &reg, &mask, &bit);
835 
836 	/*
837 	 * NOTE: not all syscon registers uses hi-word write mask, thus
838 	 * register modify method should be used.
839 	 * XXXX We should not pass write mask to syscon register
840 	 * without hi-word write mask.
841 	 */
842 	SYSCON_MODIFY_4(syscon, reg, mask, function << bit | (mask << 16));
843 
844 	/* Pull-Up/Down */
845 	bias = rk_pinctrl_parse_bias(pin_conf);
846 	if (bias >= 0) {
847 		reg = sc->conf->get_pd_offset(sc, bank);
848 
849 		reg += bank * 0x10 + ((pin / 8) * 0x4);
850 		bit = (pin % 8) * 2;
851 		mask = (0x3 << bit) << 16;
852 		SYSCON_MODIFY_4(syscon, reg, mask, bias << bit | (mask << 16));
853 	}
854 
855 	/* Drive Strength */
856 	rv = rk_pinctrl_parse_drive(sc, pin_conf, bank, subbank, &drive, &reg);
857 	if (rv == 0) {
858 		bit = (pin % 8) * 2;
859 		mask = (0x3 << bit) << 16;
860 		SYSCON_MODIFY_4(syscon, reg, mask, drive << bit | (mask << 16));
861 	}
862 
863 	/* Input/Outpot + default level */
864 	rv = rk_pinctrl_handle_io(sc, pin_conf, bank, pin);
865 }
866 
867 static int
868 rk_pinctrl_configure_pins(device_t dev, phandle_t cfgxref)
869 {
870 	struct rk_pinctrl_softc *sc;
871 	phandle_t node;
872 	uint32_t *pins;
873 	int i, npins;
874 
875 	sc = device_get_softc(dev);
876 	node = OF_node_from_xref(cfgxref);
877 
878 	npins = OF_getencprop_alloc_multi(node, "rockchip,pins",  sizeof(*pins),
879 	    (void **)&pins);
880 	if (npins <= 0)
881 		return (ENOENT);
882 
883 	for (i = 0; i != npins; i += 4)
884 		rk_pinctrl_configure_pin(sc, pins + i);
885 
886 	return (0);
887 }
888 
889 
890 static int
891 rk_pinctrl_register_gpio(struct rk_pinctrl_softc *sc, char *gpio_name,
892     device_t gpio_dev)
893 {
894 	int i;
895 
896 	for(i = 0; i < sc->conf->ngpio_bank; i++) {
897 		if (strcmp(gpio_name, sc->conf->gpio_bank[i].gpio_name) != 0)
898 			continue;
899 		sc->conf->gpio_bank[i].gpio_dev = gpio_dev;
900 		return(0);
901 	}
902 	return (ENXIO);
903 }
904 
905 static int
906 rk_pinctrl_probe(device_t dev)
907 {
908 
909 	if (!ofw_bus_status_okay(dev))
910 		return (ENXIO);
911 
912 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
913 		return (ENXIO);
914 
915 	device_set_desc(dev, "RockChip Pinctrl controller");
916 	return (BUS_PROBE_DEFAULT);
917 }
918 
919 static int
920 rk_pinctrl_attach(device_t dev)
921 {
922 	struct rk_pinctrl_softc *sc;
923 	phandle_t node;
924 	device_t cdev;
925 	char *gpio_name, *eptr;
926 	int rv;
927 
928 	sc = device_get_softc(dev);
929 	sc->dev = dev;
930 
931 	node = ofw_bus_get_node(dev);
932 
933 	if (OF_hasprop(node, "rockchip,grf") &&
934 	    syscon_get_by_ofw_property(dev, node,
935 	    "rockchip,grf", &sc->grf) != 0) {
936 		device_printf(dev, "cannot get grf driver handle\n");
937 		return (ENXIO);
938 	}
939 
940 	/* RK3399,RK3288 has banks in PMU. RK3328 does not have a PMU. */
941 	if (ofw_bus_node_is_compatible(node, "rockchip,rk3399-pinctrl") ||
942 	    ofw_bus_node_is_compatible(node, "rockchip,rk3288-pinctrl")) {
943 		if (OF_hasprop(node, "rockchip,pmu") &&
944 		    syscon_get_by_ofw_property(dev, node,
945 		    "rockchip,pmu", &sc->pmu) != 0) {
946 			device_printf(dev, "cannot get pmu driver handle\n");
947 			return (ENXIO);
948 		}
949 	}
950 
951 	sc->conf = (struct rk_pinctrl_conf *)ofw_bus_search_compatible(dev,
952 	    compat_data)->ocd_data;
953 
954 	fdt_pinctrl_register(dev, "rockchip,pins");
955 
956 	simplebus_init(dev, node);
957 
958 	bus_generic_probe(dev);
959 
960 	/* Attach child devices */
961 	for (node = OF_child(node); node > 0; node = OF_peer(node)) {
962 		if (!ofw_bus_node_is_compatible(node, "rockchip,gpio-bank"))
963 			continue;
964 
965 		rv = OF_getprop_alloc(node, "name", (void **)&gpio_name);
966 		if (rv <= 0) {
967 			device_printf(sc->dev, "Cannot GPIO subdevice name.\n");
968 			continue;
969 		}
970 
971 		cdev = simplebus_add_device(dev, node, 0, NULL, -1, NULL);
972 		if (cdev == NULL) {
973 			device_printf(dev, " Cannot add GPIO subdevice: %s\n",
974 			    gpio_name);
975 			OF_prop_free(gpio_name);
976 			continue;
977 		}
978 
979 		rv = device_probe_and_attach(cdev);
980 		if (rv != 0) {
981 			device_printf(sc->dev,
982 			    "Cannot attach GPIO subdevice: %s\n", gpio_name);
983 			OF_prop_free(gpio_name);
984 			continue;
985 		}
986 
987 		/* Grep device name from name property */
988 		eptr = gpio_name;
989 		strsep(&eptr, "@");
990 		if (gpio_name == eptr) {
991 			device_printf(sc->dev,
992 			    "Unrecognized format of GPIO subdevice name: %s\n",
993 			    gpio_name);
994 			OF_prop_free(gpio_name);
995 			continue;
996 		}
997 		rv =  rk_pinctrl_register_gpio(sc, gpio_name, cdev);
998 		if (rv != 0) {
999 			device_printf(sc->dev,
1000 			    "Cannot register GPIO subdevice %s: %d\n",
1001 			    gpio_name, rv);
1002 			OF_prop_free(gpio_name);
1003 			continue;
1004 		}
1005 		OF_prop_free(gpio_name);
1006 	}
1007 
1008 	fdt_pinctrl_configure_tree(dev);
1009 
1010 	return (bus_generic_attach(dev));
1011 }
1012 
1013 static int
1014 rk_pinctrl_detach(device_t dev)
1015 {
1016 
1017 	return (EBUSY);
1018 }
1019 
1020 static device_method_t rk_pinctrl_methods[] = {
1021 	/* Device interface */
1022 	DEVMETHOD(device_probe,			rk_pinctrl_probe),
1023 	DEVMETHOD(device_attach,		rk_pinctrl_attach),
1024 	DEVMETHOD(device_detach,		rk_pinctrl_detach),
1025 
1026         /* fdt_pinctrl interface */
1027 	DEVMETHOD(fdt_pinctrl_configure,	rk_pinctrl_configure_pins),
1028 
1029 	DEVMETHOD_END
1030 };
1031 
1032 static devclass_t rk_pinctrl_devclass;
1033 
1034 DEFINE_CLASS_1(rk_pinctrl, rk_pinctrl_driver, rk_pinctrl_methods,
1035     sizeof(struct rk_pinctrl_softc), simplebus_driver);
1036 
1037 EARLY_DRIVER_MODULE(rk_pinctrl, simplebus, rk_pinctrl_driver,
1038     rk_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
1039 MODULE_VERSION(rk_pinctrl, 1);
1040