1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2022 Soren Schmidt <sos@deepcore.dk> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/bus.h> 33 #include <sys/kernel.h> 34 #include <sys/module.h> 35 #include <sys/mutex.h> 36 #include <sys/rman.h> 37 #include <machine/bus.h> 38 39 #include <dev/ofw/openfirm.h> 40 #include <dev/ofw/ofw_bus.h> 41 #include <dev/ofw/ofw_bus_subr.h> 42 43 #include <dev/extres/syscon/syscon.h> 44 #include <dev/fdt/simple_mfd.h> 45 46 #include "rk_otp.h" 47 #include "rk_otp_if.h" 48 49 #define OTPC_SBPI_CTRL 0x0020 50 #define SBPI_ENABLE_MASK 0x00010000 51 #define SBPI_ENABLE 1 52 #define SBPI_DAP_ADDR_MASK 0xff000000 53 #define SBPI_DAP_ADDR 0x02 54 #define SBPI_DAP_ADDR_SHIFT 8 55 #define OTPC_SBPI_CMD_VALID_PRE 0x0024 56 #define SBPI_CMD_VALID_MASK 0xffff0000 57 #define OTPC_SBPI_INT_STATUS 0x0304 58 #define OTPC_SBPI_DONE 2 59 #define OTPC_USER_DONE 4 60 #define OTPC_USER_CTRL 0x0100 61 #define OTPC_USER_MASK 0xffff0000 62 #define OTPC_USER 1 63 #define OTPC_USER_ADDR 0x0104 64 #define OTPC_USER_ADDR_MASK 0xffff0000 65 #define OTPC_USER_ENABLE 0x0108 66 #define OTPC_USER_FSM_ENABLE_MASK 0xffff0000 67 #define OTPC_USER_FSM_ENABLE 1 68 #define OTPC_USER_Q 0x0124 69 #define OTPC_SBPI_CMD0_OFFSET 0x1000 70 #define SBPI_DAP_CMD_WRF 0xc0 71 #define SBPI_DAP_REG_ECC 0x3a 72 #define OTPC_SBPI_CMD1_OFFSET 0x1004 73 #define SBPI_ECC_ENABLE 0x00 74 #define SBPI_ECC_DISABLE 0x09 75 76 77 static struct ofw_compat_data compat_data[] = { 78 {"rockchip,rk3568-otp", 1}, 79 {NULL, 0} 80 }; 81 82 static struct rk_otp_softc { 83 struct resource *mem; 84 } rk_otp_sc; 85 86 87 static int 88 rk_otp_wait(struct rk_otp_softc *sc, uint32_t status) 89 { 90 int retry = 10000; 91 92 while (!(bus_read_4(sc->mem, OTPC_SBPI_INT_STATUS) & status)) { 93 DELAY(10); 94 if (--retry == 0) 95 return (ETIMEDOUT); 96 } 97 98 /* clear status */ 99 bus_write_4(sc->mem, OTPC_SBPI_INT_STATUS, status); 100 101 return (0); 102 } 103 104 static int 105 rk_otp_ecc(struct rk_otp_softc *sc, int enable) 106 { 107 bus_write_4(sc->mem, OTPC_SBPI_CTRL, 108 SBPI_DAP_ADDR_MASK | (SBPI_DAP_ADDR << SBPI_DAP_ADDR_SHIFT)); 109 bus_write_4(sc->mem, OTPC_SBPI_CMD_VALID_PRE, 110 SBPI_CMD_VALID_MASK | 0x1); 111 bus_write_4(sc->mem, OTPC_SBPI_CMD0_OFFSET, 112 SBPI_DAP_CMD_WRF | SBPI_DAP_REG_ECC); 113 if (enable) 114 bus_write_4(sc->mem, OTPC_SBPI_CMD1_OFFSET, SBPI_ECC_ENABLE); 115 else 116 bus_write_4(sc->mem, OTPC_SBPI_CMD1_OFFSET, SBPI_ECC_DISABLE); 117 bus_write_4(sc->mem, OTPC_SBPI_CTRL, SBPI_ENABLE_MASK | SBPI_ENABLE); 118 119 return (rk_otp_wait(sc, OTPC_SBPI_DONE)); 120 } 121 122 int 123 rk_otp_read(device_t dev, uint8_t *buffer, int offset, int size) 124 { 125 struct rk_otp_softc *sc = &rk_otp_sc; 126 int error; 127 128 /* if not initialized just error out */ 129 if (!sc->mem) 130 return (ENXIO); 131 132 if ((error = rk_otp_ecc(sc, 1))) { 133 device_printf(dev, "timeout waiting for OTP ECC status\n"); 134 return (error); 135 } 136 137 bus_write_4(sc->mem, OTPC_USER_CTRL, OTPC_USER | OTPC_USER_MASK); 138 DELAY(5); 139 while (size--) { 140 bus_write_4(sc->mem, OTPC_USER_ADDR, 141 offset++ | OTPC_USER_ADDR_MASK); 142 bus_write_4(sc->mem, OTPC_USER_ENABLE, 143 OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK); 144 145 if ((error = rk_otp_wait(sc, OTPC_USER_DONE))) { 146 device_printf(dev, "timeout waiting for OTP data\n"); 147 break; 148 } 149 *buffer++ = bus_read_4(sc->mem, OTPC_USER_Q); 150 } 151 bus_write_4(sc->mem, OTPC_USER_CTRL, OTPC_USER_MASK); 152 153 return (error); 154 } 155 156 static int 157 rk_otp_probe(device_t dev) 158 { 159 160 if (!ofw_bus_status_okay(dev)) 161 return (ENXIO); 162 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 163 return (ENXIO); 164 device_set_desc(dev, "RockChip OTP"); 165 return (BUS_PROBE_DEFAULT); 166 } 167 168 static int 169 rk_otp_attach(device_t dev) 170 { 171 struct rk_otp_softc *sc = &rk_otp_sc; 172 int rid = 0; 173 174 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); 175 if (!sc->mem) { 176 device_printf(dev, "Cannot allocate memory resources\n"); 177 return (ENXIO); 178 } 179 return (0); 180 } 181 182 183 static device_method_t rk_otp_methods[] = { 184 /* Device interface */ 185 DEVMETHOD(device_probe, rk_otp_probe), 186 DEVMETHOD(device_attach, rk_otp_attach), 187 188 DEVMETHOD_END 189 }; 190 191 DEFINE_CLASS_1(rk_otp, rk_otp_driver, rk_otp_methods, 192 sizeof(struct simple_mfd_softc), simple_mfd_driver); 193 EARLY_DRIVER_MODULE(rk_otp, simplebus, rk_otp_driver, 0, 0, 194 BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 195