xref: /freebsd/sys/arm64/qoriq/clk/qoriq_clk_pll.c (revision 02e9120893770924227138ba49df1edb3896112a)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2020 Alstom Group.
5  * Copyright (c) 2020 Semihalf.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/bus.h>
32 #include <sys/malloc.h>
33 
34 #include <dev/extres/clk/clk.h>
35 #include <dev/extres/clk/clk_fixed.h>
36 
37 #include <arm64/qoriq/clk/qoriq_clkgen.h>
38 
39 #include "clkdev_if.h"
40 
41 struct qoriq_clk_pll_softc {
42 	bus_addr_t	offset;
43 
44 	uint32_t	mask;
45 	uint32_t	shift;
46 
47 	uint32_t	flags;
48 };
49 
50 #define	WR4(_clk, offset, val)					\
51 	CLKDEV_WRITE_4(clknode_get_device(_clk), offset, val)
52 #define	RD4(_clk, offset, val)					\
53 	CLKDEV_READ_4(clknode_get_device(_clk), offset, val)
54 #define	DEVICE_LOCK(_clk)					\
55 	CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
56 #define	DEVICE_UNLOCK(_clk)					\
57 	CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
58 
59 #define	QORIQ_PLL_KILL_BIT	(1 << 31)
60 
61 static int
62 qoriq_clk_pll_init(struct clknode *clk, device_t dev)
63 {
64 
65 	clknode_init_parent_idx(clk, 0);
66 
67 	return (0);
68 }
69 
70 static int
71 qoriq_clk_pll_recalc_freq(struct clknode *clk, uint64_t *freq)
72 {
73 	struct qoriq_clk_pll_softc *sc;
74 	uint32_t mul;
75 
76 	sc = clknode_get_softc(clk);
77 
78 	RD4(clk, sc->offset, &mul);
79 
80 	if (sc->flags & QORIQ_CLK_PLL_HAS_KILL_BIT && mul & QORIQ_PLL_KILL_BIT)
81 		return (0);
82 
83 	mul &= sc->mask;
84 	mul >>= sc->shift;
85 
86 	*freq = *freq * mul;
87 
88 	return (0);
89 }
90 
91 static clknode_method_t qoriq_clk_pll_clknode_methods[] = {
92 	CLKNODEMETHOD(clknode_init,		qoriq_clk_pll_init),
93 	CLKNODEMETHOD(clknode_recalc_freq,	qoriq_clk_pll_recalc_freq),
94 
95 	CLKNODEMETHOD_END
96 };
97 
98 DEFINE_CLASS_1(qoriq_clk_pll_clknode, qoriq_clk_pll_clknode_class,
99     qoriq_clk_pll_clknode_methods, sizeof(struct qoriq_clk_pll_softc),
100     clknode_class);
101 
102 int
103 qoriq_clk_pll_register(struct clkdom *clkdom,
104     const struct qoriq_clk_pll_def *clkdef)
105 {
106 	char namebuf[QORIQ_CLK_NAME_MAX_LEN];
107 	struct qoriq_clk_pll_softc *sc;
108 	struct clk_fixed_def def;
109 	const char *parent_name;
110 	struct clknode *clk;
111 	int error;
112 	int i;
113 
114 	clk = clknode_create(clkdom, &qoriq_clk_pll_clknode_class,
115 	    &clkdef->clkdef);
116 	if (clk == NULL)
117 		return (1);
118 
119 	sc = clknode_get_softc(clk);
120 	sc->mask = clkdef->mask;
121 	sc->shift = clkdef->shift;
122 	sc->flags = clkdef->flags;
123 	sc->offset = clkdef->offset;
124 
125 	clknode_register(clkdom, clk);
126 
127 	parent_name = clkdef->clkdef.name;
128 
129 	def.clkdef.parent_names = &parent_name;
130 	def.clkdef.parent_cnt = 1;
131 	def.clkdef.name = namebuf;
132 	def.mult = 1;
133 	def.freq = 0;
134 
135 	i = 0;
136 	while (clkdef->dividers[i] != 0) {
137 		def.div = clkdef->dividers[i];
138 		def.clkdef.id = clkdef->clkdef.id + i;
139 		snprintf(namebuf, QORIQ_CLK_NAME_MAX_LEN, "%s_div%d",
140 		    parent_name, clkdef->dividers[i]);
141 
142 		error = clknode_fixed_register(clkdom, &def);
143 		if (error != 0)
144 			return (error);
145 
146 		i++;
147 	}
148 
149 	return (0);
150 }
151