1e5acd89cSAndrew Turner /*- 2e5acd89cSAndrew Turner * Copyright 1998 Massachusetts Institute of Technology 3e5acd89cSAndrew Turner * 4e5acd89cSAndrew Turner * Permission to use, copy, modify, and distribute this software and 5e5acd89cSAndrew Turner * its documentation for any purpose and without fee is hereby 6e5acd89cSAndrew Turner * granted, provided that both the above copyright notice and this 7e5acd89cSAndrew Turner * permission notice appear in all copies, that both the above 8e5acd89cSAndrew Turner * copyright notice and this permission notice appear in all 9e5acd89cSAndrew Turner * supporting documentation, and that the name of M.I.T. not be used 10e5acd89cSAndrew Turner * in advertising or publicity pertaining to distribution of the 11e5acd89cSAndrew Turner * software without specific, written prior permission. M.I.T. makes 12e5acd89cSAndrew Turner * no representations about the suitability of this software for any 13e5acd89cSAndrew Turner * purpose. It is provided "as is" without express or implied 14e5acd89cSAndrew Turner * warranty. 15e5acd89cSAndrew Turner * 16e5acd89cSAndrew Turner * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS 17e5acd89cSAndrew Turner * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, 18e5acd89cSAndrew Turner * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 19e5acd89cSAndrew Turner * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT 20e5acd89cSAndrew Turner * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21e5acd89cSAndrew Turner * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22e5acd89cSAndrew Turner * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 23e5acd89cSAndrew Turner * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 24e5acd89cSAndrew Turner * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25e5acd89cSAndrew Turner * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26e5acd89cSAndrew Turner * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27e5acd89cSAndrew Turner * SUCH DAMAGE. 28e5acd89cSAndrew Turner */ 29e5acd89cSAndrew Turner 30*d5d97bedSMike Karels #ifdef __arm__ 31*d5d97bedSMike Karels #include <arm/resource.h> 32*d5d97bedSMike Karels #else /* !__arm__ */ 33*d5d97bedSMike Karels 34e5acd89cSAndrew Turner #ifndef _MACHINE_RESOURCE_H_ 35e5acd89cSAndrew Turner #define _MACHINE_RESOURCE_H_ 1 36e5acd89cSAndrew Turner 37e5acd89cSAndrew Turner /* 38e5acd89cSAndrew Turner * Definitions of resource types for Intel Architecture machines 39e5acd89cSAndrew Turner * with support for legacy ISA devices and drivers. 40e5acd89cSAndrew Turner */ 41e5acd89cSAndrew Turner 42e5acd89cSAndrew Turner #define SYS_RES_IRQ 1 /* interrupt lines */ 43e5acd89cSAndrew Turner #define SYS_RES_DRQ 2 /* isa dma lines */ 44e5acd89cSAndrew Turner #define SYS_RES_MEMORY 3 /* i/o memory */ 45e5acd89cSAndrew Turner #define SYS_RES_IOPORT 4 /* i/o ports */ 46e5acd89cSAndrew Turner #define SYS_RES_GPIO 5 /* general purpose i/o */ 47b7c02deeSAndrew Turner #define PCI_RES_BUS 6 /* PCI bus numbers */ 48e5acd89cSAndrew Turner 49e5acd89cSAndrew Turner #endif /* !_MACHINE_RESOURCE_H_ */ 50*d5d97bedSMike Karels 51*d5d97bedSMike Karels #endif /* !__arm__ */ 52