xref: /freebsd/sys/arm64/include/pte.h (revision 271171e0d97b88ba2a7c3bf750c9672b484c1c13)
1 /*-
2  * Copyright (c) 2014 Andrew Turner
3  * Copyright (c) 2014-2015 The FreeBSD Foundation
4  * All rights reserved.
5  *
6  * This software was developed by Andrew Turner under
7  * sponsorship from the FreeBSD Foundation.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * $FreeBSD$
31  */
32 
33 #ifndef _MACHINE_PTE_H_
34 #define	_MACHINE_PTE_H_
35 
36 #ifndef LOCORE
37 typedef	uint64_t	pd_entry_t;		/* page directory entry */
38 typedef	uint64_t	pt_entry_t;		/* page table entry */
39 #endif
40 
41 /* Table attributes */
42 #define	TATTR_MASK		UINT64_C(0xfff8000000000000)
43 #define	TATTR_AP_TABLE_MASK	(3UL << 61)
44 #define	TATTR_AP_TABLE_RO	(2UL << 61)
45 #define	TATTR_AP_TABLE_NO_EL0	(1UL << 61)
46 #define	TATTR_UXN_TABLE		(1UL << 60)
47 #define	TATTR_PXN_TABLE		(1UL << 59)
48 /* Bits 58:51 are ignored */
49 
50 /* Block and Page attributes */
51 #define	ATTR_MASK_H		UINT64_C(0xfffc000000000000)
52 #define	ATTR_MASK_L		UINT64_C(0x0000000000000fff)
53 #define	ATTR_MASK		(ATTR_MASK_H | ATTR_MASK_L)
54 /* Bits 58:55 are reserved for software */
55 #define	ATTR_SW_UNUSED2		(1UL << 58)
56 #define	ATTR_SW_UNUSED1		(1UL << 57)
57 #define	ATTR_SW_MANAGED		(1UL << 56)
58 #define	ATTR_SW_WIRED		(1UL << 55)
59 
60 #define	ATTR_S1_UXN		(1UL << 54)
61 #define	ATTR_S1_PXN		(1UL << 53)
62 #define	ATTR_S1_XN		(ATTR_S1_PXN | ATTR_S1_UXN)
63 
64 #define	ATTR_S2_XN(x)		((x) << 53)
65 #define	 ATTR_S2_XN_MASK	ATTR_S2_XN(3UL)
66 #define	 ATTR_S2_XN_NONE	0UL	/* Allow execution at EL0 & EL1 */
67 #define	 ATTR_S2_XN_EL1		1UL	/* Allow execution at EL0 */
68 #define	 ATTR_S2_XN_ALL		2UL	/* No execution */
69 #define	 ATTR_S2_XN_EL0		3UL	/* Allow execution at EL1 */
70 
71 #define	ATTR_CONTIGUOUS		(1UL << 52)
72 #define	ATTR_DBM		(1UL << 51)
73 #define	ATTR_S1_nG		(1 << 11)
74 #define	ATTR_AF			(1 << 10)
75 #define	ATTR_SH(x)		((x) << 8)
76 #define	 ATTR_SH_MASK		ATTR_SH(3)
77 #define	 ATTR_SH_NS		0		/* Non-shareable */
78 #define	 ATTR_SH_OS		2		/* Outer-shareable */
79 #define	 ATTR_SH_IS		3		/* Inner-shareable */
80 
81 #define	ATTR_S1_AP_RW_BIT	(1 << 7)
82 #define	ATTR_S1_AP(x)		((x) << 6)
83 #define	 ATTR_S1_AP_MASK	ATTR_S1_AP(3)
84 #define	 ATTR_S1_AP_RW		(0 << 1)
85 #define	 ATTR_S1_AP_RO		(1 << 1)
86 #define	 ATTR_S1_AP_USER	(1 << 0)
87 #define	ATTR_S1_NS		(1 << 5)
88 #define	ATTR_S1_IDX(x)		((x) << 2)
89 #define	ATTR_S1_IDX_MASK	(7 << 2)
90 
91 #define	ATTR_S2_S2AP(x)		((x) << 6)
92 #define	 ATTR_S2_S2AP_MASK	3
93 #define	 ATTR_S2_S2AP_READ	1
94 #define	 ATTR_S2_S2AP_WRITE	2
95 
96 #define	ATTR_S2_MEMATTR(x)		((x) << 2)
97 #define	 ATTR_S2_MEMATTR_MASK		ATTR_S2_MEMATTR(0xf)
98 #define	 ATTR_S2_MEMATTR_DEVICE_nGnRnE	0x0
99 #define	 ATTR_S2_MEMATTR_NC		0xf
100 #define	 ATTR_S2_MEMATTR_WT		0xa
101 #define	 ATTR_S2_MEMATTR_WB		0xf
102 
103 #define	ATTR_DEFAULT	(ATTR_AF | ATTR_SH(ATTR_SH_IS))
104 
105 #define	ATTR_DESCR_MASK		3
106 #define	ATTR_DESCR_VALID	1
107 #define	ATTR_DESCR_TYPE_MASK	2
108 #define	ATTR_DESCR_TYPE_TABLE	2
109 #define	ATTR_DESCR_TYPE_PAGE	2
110 #define	ATTR_DESCR_TYPE_BLOCK	0
111 
112 #if PAGE_SIZE == PAGE_SIZE_4K
113 #define	L0_SHIFT	39
114 #define	L1_SHIFT	30
115 #define	L2_SHIFT	21
116 #define	L3_SHIFT	12
117 #elif PAGE_SIZE == PAGE_SIZE_16K
118 #define	L0_SHIFT	47
119 #define	L1_SHIFT	36
120 #define	L2_SHIFT	25
121 #define	L3_SHIFT	14
122 #else
123 #error Unsupported page size
124 #endif
125 
126 /* Level 0 table, 512GiB/128TiB per entry */
127 #define	L0_SIZE		(UINT64_C(1) << L0_SHIFT)
128 #define	L0_OFFSET	(L0_SIZE - 1ul)
129 #define	L0_INVAL	0x0 /* An invalid address */
130 	/* 0x1 Level 0 doesn't support block translation */
131 	/* 0x2 also marks an invalid address */
132 #define	L0_TABLE	0x3 /* A next-level table */
133 
134 /* Level 1 table, 1GiB/64GiB per entry */
135 #define	L1_SIZE 	(UINT64_C(1) << L1_SHIFT)
136 #define	L1_OFFSET 	(L1_SIZE - 1)
137 #define	L1_INVAL	L0_INVAL
138 #define	L1_BLOCK	0x1
139 #define	L1_TABLE	L0_TABLE
140 
141 /* Level 2 table, 2MiB/32MiB per entry */
142 #define	L2_SIZE 	(UINT64_C(1) << L2_SHIFT)
143 #define	L2_OFFSET 	(L2_SIZE - 1)
144 #define	L2_INVAL	L1_INVAL
145 #define	L2_BLOCK	0x1
146 #define	L2_TABLE	L1_TABLE
147 
148 /* Level 3 table, 4KiB/16KiB per entry */
149 #define	L3_SIZE 	(1 << L3_SHIFT)
150 #define	L3_OFFSET 	(L3_SIZE - 1)
151 #define	L3_INVAL	0x0
152 	/* 0x1 is reserved */
153 	/* 0x2 also marks an invalid address */
154 #define	L3_PAGE		0x3
155 
156 #define	PMAP_MAPDEV_EARLY_SIZE	(L2_SIZE * 8)
157 
158 #if PAGE_SIZE == PAGE_SIZE_4K
159 #define	L0_ENTRIES_SHIFT 9
160 #define	Ln_ENTRIES_SHIFT 9
161 #elif PAGE_SIZE == PAGE_SIZE_16K
162 #define	L0_ENTRIES_SHIFT 1
163 #define	Ln_ENTRIES_SHIFT 11
164 #else
165 #error Unsupported page size
166 #endif
167 
168 #define	L0_ENTRIES	(1 << L0_ENTRIES_SHIFT)
169 #define	L0_ADDR_MASK	(L0_ENTRIES - 1)
170 
171 #define	Ln_ENTRIES	(1 << Ln_ENTRIES_SHIFT)
172 #define	Ln_ADDR_MASK	(Ln_ENTRIES - 1)
173 #define	Ln_TABLE_MASK	((1 << 12) - 1)
174 
175 #define	pmap_l0_index(va)	(((va) >> L0_SHIFT) & L0_ADDR_MASK)
176 #define	pmap_l1_index(va)	(((va) >> L1_SHIFT) & Ln_ADDR_MASK)
177 #define	pmap_l2_index(va)	(((va) >> L2_SHIFT) & Ln_ADDR_MASK)
178 #define	pmap_l3_index(va)	(((va) >> L3_SHIFT) & Ln_ADDR_MASK)
179 
180 #endif /* !_MACHINE_PTE_H_ */
181 
182 /* End of pte.h */
183