1412042e2SAndrew Turner /*- 2412042e2SAndrew Turner * Copyright (c) 1990 The Regents of the University of California. 3412042e2SAndrew Turner * All rights reserved. 4412042e2SAndrew Turner * 5412042e2SAndrew Turner * This code is derived from software contributed to Berkeley by 6412042e2SAndrew Turner * William Jolitz. 7412042e2SAndrew Turner * 8412042e2SAndrew Turner * Redistribution and use in source and binary forms, with or without 9412042e2SAndrew Turner * modification, are permitted provided that the following conditions 10412042e2SAndrew Turner * are met: 11412042e2SAndrew Turner * 1. Redistributions of source code must retain the above copyright 12412042e2SAndrew Turner * notice, this list of conditions and the following disclaimer. 13412042e2SAndrew Turner * 2. Redistributions in binary form must reproduce the above copyright 14412042e2SAndrew Turner * notice, this list of conditions and the following disclaimer in the 15412042e2SAndrew Turner * documentation and/or other materials provided with the distribution. 16412042e2SAndrew Turner * 17412042e2SAndrew Turner * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 18412042e2SAndrew Turner * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19412042e2SAndrew Turner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20412042e2SAndrew Turner * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 21412042e2SAndrew Turner * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22412042e2SAndrew Turner * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23412042e2SAndrew Turner * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24412042e2SAndrew Turner * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25412042e2SAndrew Turner * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26412042e2SAndrew Turner * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27412042e2SAndrew Turner * SUCH DAMAGE. 28412042e2SAndrew Turner * 29412042e2SAndrew Turner * from: @(#)param.h 5.8 (Berkeley) 6/28/91 30412042e2SAndrew Turner * $FreeBSD$ 31412042e2SAndrew Turner */ 32412042e2SAndrew Turner 33412042e2SAndrew Turner #ifndef _MACHINE_PARAM_H_ 34412042e2SAndrew Turner #define _MACHINE_PARAM_H_ 35412042e2SAndrew Turner 36412042e2SAndrew Turner /* 37412042e2SAndrew Turner * Machine dependent constants for arm64. 38412042e2SAndrew Turner */ 39412042e2SAndrew Turner 40412042e2SAndrew Turner #include <machine/_align.h> 41412042e2SAndrew Turner 42412042e2SAndrew Turner #define STACKALIGNBYTES (16 - 1) 43412042e2SAndrew Turner #define STACKALIGN(p) ((uint64_t)(p) & ~STACKALIGNBYTES) 44412042e2SAndrew Turner 453d9ac4ecSBjoern A. Zeeb #define __PCI_REROUTE_INTERRUPT 463d9ac4ecSBjoern A. Zeeb 47412042e2SAndrew Turner #ifndef MACHINE 48412042e2SAndrew Turner #define MACHINE "arm64" 49412042e2SAndrew Turner #endif 50412042e2SAndrew Turner #ifndef MACHINE_ARCH 51412042e2SAndrew Turner #define MACHINE_ARCH "aarch64" 52412042e2SAndrew Turner #endif 539dcf90f8SEd Schouten #ifndef MACHINE_ARCH32 549dcf90f8SEd Schouten #define MACHINE_ARCH32 "armv7" 559dcf90f8SEd Schouten #endif 56412042e2SAndrew Turner 57c3d326fdSMark Johnston #ifdef SMP 58412042e2SAndrew Turner #ifndef MAXCPU 59fd5b330bSAndrew Turner #define MAXCPU 256 60412042e2SAndrew Turner #endif 61412042e2SAndrew Turner #else 62412042e2SAndrew Turner #define MAXCPU 1 63c3d326fdSMark Johnston #endif 64412042e2SAndrew Turner 65412042e2SAndrew Turner #ifndef MAXMEMDOM 66014812b9SOleksandr Tymoshenko #define MAXMEMDOM 8 67412042e2SAndrew Turner #endif 68412042e2SAndrew Turner 69412042e2SAndrew Turner #define ALIGNBYTES _ALIGNBYTES 70412042e2SAndrew Turner #define ALIGN(p) _ALIGN(p) 71412042e2SAndrew Turner /* 72412042e2SAndrew Turner * ALIGNED_POINTER is a boolean macro that checks whether an address 73412042e2SAndrew Turner * is valid to fetch data elements of type t from on this architecture. 74412042e2SAndrew Turner * This does not reflect the optimal alignment, just the possibility 75412042e2SAndrew Turner * (within reasonable limits). 76412042e2SAndrew Turner */ 77412042e2SAndrew Turner #define ALIGNED_POINTER(p, t) ((((u_long)(p)) & (sizeof(t) - 1)) == 0) 78412042e2SAndrew Turner 79412042e2SAndrew Turner /* 80412042e2SAndrew Turner * CACHE_LINE_SIZE is the compile-time maximum cache line size for an 81412042e2SAndrew Turner * architecture. It should be used with appropriate caution. 82412042e2SAndrew Turner */ 839eb0ccbbSAndrew Turner #define CACHE_LINE_SHIFT 7 84412042e2SAndrew Turner #define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT) 85412042e2SAndrew Turner 86*3413a8cdSAndrew Turner #define PAGE_SHIFT_4K 12 87*3413a8cdSAndrew Turner #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) 88*3413a8cdSAndrew Turner #define PAGE_MASK_4K (PAGE_SIZE_4K - 1) 89412042e2SAndrew Turner 901ae9c994SZbigniew Bodek #define PAGE_SHIFT_16K 14 911ae9c994SZbigniew Bodek #define PAGE_SIZE_16K (1 << PAGE_SHIFT_16K) 921ae9c994SZbigniew Bodek #define PAGE_MASK_16K (PAGE_SIZE_16K - 1) 931ae9c994SZbigniew Bodek 94412042e2SAndrew Turner #define PAGE_SHIFT_64K 16 95412042e2SAndrew Turner #define PAGE_SIZE_64K (1 << PAGE_SHIFT_64K) 96412042e2SAndrew Turner #define PAGE_MASK_64K (PAGE_SIZE_64K - 1) 97412042e2SAndrew Turner 98*3413a8cdSAndrew Turner #define PAGE_SHIFT PAGE_SHIFT_4K 99*3413a8cdSAndrew Turner #define PAGE_SIZE PAGE_SIZE_4K 100*3413a8cdSAndrew Turner #define PAGE_MASK PAGE_MASK_4K 101*3413a8cdSAndrew Turner 1024168aedcSMark Johnston #define MAXPAGESIZES 3 /* maximum number of supported page sizes */ 103412042e2SAndrew Turner 104412042e2SAndrew Turner #ifndef KSTACK_PAGES 105412042e2SAndrew Turner #define KSTACK_PAGES 4 /* pages of kernel stack (with pcb) */ 106412042e2SAndrew Turner #endif 107412042e2SAndrew Turner 108412042e2SAndrew Turner #define KSTACK_GUARD_PAGES 1 /* pages of kstack guard; 0 disables */ 109412042e2SAndrew Turner #define PCPU_PAGES 1 110412042e2SAndrew Turner 111412042e2SAndrew Turner /* 112412042e2SAndrew Turner * Ceiling on size of buffer cache (really only effects write queueing, 113412042e2SAndrew Turner * the VM page cache is not effected), can be changed via 114412042e2SAndrew Turner * the kern.maxbcache /boot/loader.conf variable. 115412042e2SAndrew Turner */ 116412042e2SAndrew Turner #ifndef VM_BCACHE_SIZE_MAX 117412042e2SAndrew Turner #define VM_BCACHE_SIZE_MAX (400 * 1024 * 1024) 118412042e2SAndrew Turner #endif 119412042e2SAndrew Turner 120412042e2SAndrew Turner /* 121412042e2SAndrew Turner * Mach derived conversion macros 122412042e2SAndrew Turner */ 123412042e2SAndrew Turner #define round_page(x) (((unsigned long)(x) + PAGE_MASK) & ~PAGE_MASK) 124412042e2SAndrew Turner #define trunc_page(x) ((unsigned long)(x) & ~PAGE_MASK) 125412042e2SAndrew Turner 126412042e2SAndrew Turner #define atop(x) ((unsigned long)(x) >> PAGE_SHIFT) 127412042e2SAndrew Turner #define ptoa(x) ((unsigned long)(x) << PAGE_SHIFT) 128412042e2SAndrew Turner 129412042e2SAndrew Turner #define arm64_btop(x) ((unsigned long)(x) >> PAGE_SHIFT) 130412042e2SAndrew Turner #define arm64_ptob(x) ((unsigned long)(x) << PAGE_SHIFT) 131412042e2SAndrew Turner 132412042e2SAndrew Turner #define pgtok(x) ((unsigned long)(x) * (PAGE_SIZE / 1024)) 133412042e2SAndrew Turner 134412042e2SAndrew Turner #endif /* !_MACHINE_PARAM_H_ */ 135