xref: /freebsd/sys/arm64/coresight/coresight.c (revision cc68614da8232d8baaca0ae0d0dd8f890f06623e)
1 /*-
2  * Copyright (c) 2018-2020 Ruslan Bukin <br@bsdpad.com>
3  * All rights reserved.
4  *
5  * This software was developed by SRI International and the University of
6  * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
7  * ("CTSRD"), as part of the DARPA CRASH research programme.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/rman.h>
38 #include <sys/kernel.h>
39 #include <sys/lock.h>
40 #include <sys/module.h>
41 #include <sys/mutex.h>
42 #include <machine/bus.h>
43 
44 #include <arm64/coresight/coresight.h>
45 
46 static struct mtx cs_mtx;
47 struct coresight_device_list cs_devs;
48 
49 int
50 coresight_register(struct coresight_desc *desc)
51 {
52 	struct coresight_device *cs_dev;
53 
54 	cs_dev = malloc(sizeof(struct coresight_device),
55 	    M_CORESIGHT, M_WAITOK | M_ZERO);
56 	cs_dev->dev = desc->dev;
57 	cs_dev->pdata = desc->pdata;
58 	cs_dev->dev_type = desc->dev_type;
59 
60 	mtx_lock(&cs_mtx);
61 	TAILQ_INSERT_TAIL(&cs_devs, cs_dev, link);
62 	mtx_unlock(&cs_mtx);
63 
64 	return (0);
65 }
66 
67 struct endpoint *
68 coresight_get_output_endpoint(struct coresight_platform_data *pdata)
69 {
70 	struct endpoint *endp;
71 
72 	if (pdata->out_ports != 1)
73 		return (NULL);
74 
75 	TAILQ_FOREACH(endp, &pdata->endpoints, link) {
76 		if (endp->input == 0)
77 			return (endp);
78 	}
79 
80 	return (NULL);
81 }
82 
83 struct coresight_device *
84 coresight_get_output_device(struct endpoint *endp, struct endpoint **out_endp)
85 {
86 	struct coresight_platform_data *pdata;
87 	struct coresight_device *cs_dev;
88 	struct endpoint *endp2;
89 
90 	TAILQ_FOREACH(cs_dev, &cs_devs, link) {
91 		pdata = cs_dev->pdata;
92 		TAILQ_FOREACH(endp2, &cs_dev->pdata->endpoints, link) {
93 			switch (pdata->bus_type) {
94 			case CORESIGHT_BUS_FDT:
95 #ifdef FDT
96 				if (endp->their_node == endp2->my_node) {
97 					*out_endp = endp2;
98 					return (cs_dev);
99 				}
100 #endif
101 				break;
102 
103 			case CORESIGHT_BUS_ACPI:
104 #ifdef DEV_ACPI
105 				if (endp->their_handle == endp2->my_handle) {
106 					*out_endp = endp2;
107 					return (cs_dev);
108 				}
109 #endif
110 				break;
111 			}
112 		}
113 	}
114 
115 	return (NULL);
116 }
117 
118 static void
119 coresight_init(void)
120 {
121 
122 	mtx_init(&cs_mtx, "ARM Coresight", NULL, MTX_DEF);
123 	TAILQ_INIT(&cs_devs);
124 }
125 
126 SYSINIT(coresight, SI_SUB_DRIVERS, SI_ORDER_FIRST, coresight_init, NULL);
127