1 /* 2 * Copyright (C) 2016 Cavium Inc. 3 * All rights reserved. 4 * 5 * Developed by Semihalf. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 #include "opt_platform.h" 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/malloc.h> 36 #include <sys/types.h> 37 #include <sys/sysctl.h> 38 #include <sys/kernel.h> 39 #include <sys/rman.h> 40 #include <sys/module.h> 41 #include <sys/bus.h> 42 #include <sys/endian.h> 43 #include <sys/cpuset.h> 44 45 #include <dev/ofw/openfirm.h> 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcivar.h> 51 #include <dev/pci/pci_host_generic.h> 52 #include <dev/pci/pci_host_generic_fdt.h> 53 #include <dev/pci/pcib_private.h> 54 55 #include "thunder_pcie_common.h" 56 57 #include "pcib_if.h" 58 59 #ifdef THUNDERX_PASS_1_1_ERRATA 60 static struct resource * thunder_pcie_fdt_alloc_resource(device_t, device_t, 61 int, int *, rman_res_t, rman_res_t, rman_res_t, u_int); 62 static int thunder_pcie_fdt_release_resource(device_t, device_t, 63 int, int, struct resource*); 64 #endif 65 static int thunder_pcie_fdt_attach(device_t); 66 static int thunder_pcie_fdt_probe(device_t); 67 static int thunder_pcie_fdt_get_id(device_t, device_t, enum pci_id_type, 68 uintptr_t *); 69 70 static const struct ofw_bus_devinfo *thunder_pcie_ofw_get_devinfo(device_t, 71 device_t); 72 73 /* OFW bus interface */ 74 struct thunder_pcie_ofw_devinfo { 75 struct ofw_bus_devinfo di_dinfo; 76 struct resource_list di_rl; 77 }; 78 79 static device_method_t thunder_pcie_fdt_methods[] = { 80 /* Device interface */ 81 DEVMETHOD(device_probe, thunder_pcie_fdt_probe), 82 DEVMETHOD(device_attach, thunder_pcie_fdt_attach), 83 #ifdef THUNDERX_PASS_1_1_ERRATA 84 DEVMETHOD(bus_alloc_resource, thunder_pcie_fdt_alloc_resource), 85 DEVMETHOD(bus_release_resource, thunder_pcie_fdt_release_resource), 86 #endif 87 88 /* pcib interface */ 89 DEVMETHOD(pcib_get_id, thunder_pcie_fdt_get_id), 90 91 /* ofw interface */ 92 DEVMETHOD(ofw_bus_get_devinfo, thunder_pcie_ofw_get_devinfo), 93 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 94 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 95 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 96 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 97 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 98 99 /* End */ 100 DEVMETHOD_END 101 }; 102 103 DEFINE_CLASS_1(pcib, thunder_pcie_fdt_driver, thunder_pcie_fdt_methods, 104 sizeof(struct generic_pcie_fdt_softc), generic_pcie_fdt_driver); 105 106 DRIVER_MODULE(thunder_pcib, simplebus, thunder_pcie_fdt_driver, 0, 0); 107 DRIVER_MODULE(thunder_pcib, ofwbus, thunder_pcie_fdt_driver, 0, 0); 108 109 static const struct ofw_bus_devinfo * 110 thunder_pcie_ofw_get_devinfo(device_t bus __unused, device_t child) 111 { 112 struct thunder_pcie_ofw_devinfo *di; 113 114 di = device_get_ivars(child); 115 return (&di->di_dinfo); 116 } 117 118 static void 119 get_addr_size_cells(phandle_t node, pcell_t *addr_cells, pcell_t *size_cells) 120 { 121 122 *addr_cells = 2; 123 /* Find address cells if present */ 124 OF_getencprop(node, "#address-cells", addr_cells, sizeof(*addr_cells)); 125 126 *size_cells = 2; 127 /* Find size cells if present */ 128 OF_getencprop(node, "#size-cells", size_cells, sizeof(*size_cells)); 129 } 130 131 static int 132 thunder_pcie_ofw_bus_attach(device_t dev) 133 { 134 struct thunder_pcie_ofw_devinfo *di; 135 device_t child; 136 phandle_t parent, node; 137 pcell_t addr_cells, size_cells; 138 139 parent = ofw_bus_get_node(dev); 140 if (parent > 0) { 141 get_addr_size_cells(parent, &addr_cells, &size_cells); 142 /* Iterate through all bus subordinates */ 143 for (node = OF_child(parent); node > 0; node = OF_peer(node)) { 144 /* Allocate and populate devinfo. */ 145 di = malloc(sizeof(*di), M_DEVBUF, M_WAITOK | M_ZERO); 146 if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) { 147 free(di, M_DEVBUF); 148 continue; 149 } 150 151 /* Initialize and populate resource list. */ 152 resource_list_init(&di->di_rl); 153 ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells, 154 &di->di_rl); 155 ofw_bus_intr_to_rl(dev, node, &di->di_rl, NULL); 156 157 /* Add newbus device for this FDT node */ 158 child = device_add_child(dev, NULL, -1); 159 if (child == NULL) { 160 resource_list_free(&di->di_rl); 161 ofw_bus_gen_destroy_devinfo(&di->di_dinfo); 162 free(di, M_DEVBUF); 163 continue; 164 } 165 166 device_set_ivars(child, di); 167 } 168 } 169 170 return (0); 171 } 172 173 static int 174 thunder_pcie_fdt_probe(device_t dev) 175 { 176 177 /* Check if we're running on Cavium ThunderX */ 178 if (!CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK, 179 CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, 0)) 180 return (ENXIO); 181 182 if (!ofw_bus_status_okay(dev)) 183 return (ENXIO); 184 185 if (ofw_bus_is_compatible(dev, "pci-host-ecam-generic") || 186 ofw_bus_is_compatible(dev, "cavium,thunder-pcie") || 187 ofw_bus_is_compatible(dev, "cavium,pci-host-thunder-ecam")) { 188 device_set_desc(dev, "Cavium Integrated PCI/PCI-E Controller"); 189 return (BUS_PROBE_DEFAULT); 190 } 191 192 return (ENXIO); 193 } 194 195 static int 196 thunder_pcie_fdt_attach(device_t dev) 197 { 198 struct generic_pcie_fdt_softc *sc; 199 200 sc = device_get_softc(dev); 201 thunder_pcie_identify_ecam(dev, &sc->base.ecam); 202 sc->base.coherent = 1; 203 204 /* Attach OFW bus */ 205 if (thunder_pcie_ofw_bus_attach(dev) != 0) 206 return (ENXIO); 207 208 return (pci_host_generic_fdt_attach(dev)); 209 } 210 211 static int 212 thunder_pcie_fdt_get_id(device_t pci, device_t child, enum pci_id_type type, 213 uintptr_t *id) 214 { 215 phandle_t node; 216 int bsf; 217 218 if (type != PCI_ID_MSI) 219 return (pcib_get_id(pci, child, type, id)); 220 221 node = ofw_bus_get_node(pci); 222 if (OF_hasprop(node, "msi-map")) 223 return (generic_pcie_get_id(pci, child, type, id)); 224 225 bsf = pci_get_rid(child); 226 *id = (pci_get_domain(child) << PCI_RID_DOMAIN_SHIFT) | bsf; 227 228 return (0); 229 } 230 231 #ifdef THUNDERX_PASS_1_1_ERRATA 232 struct resource * 233 thunder_pcie_fdt_alloc_resource(device_t dev, device_t child, int type, 234 int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 235 { 236 struct generic_pcie_fdt_softc *sc; 237 struct thunder_pcie_ofw_devinfo *di; 238 struct resource_list_entry *rle; 239 int i; 240 241 /* 242 * For PCIe devices that do not have FDT nodes pass 243 * the request to the core driver. 244 */ 245 if ((int)ofw_bus_get_node(child) <= 0) 246 return (thunder_pcie_alloc_resource(dev, child, type, 247 rid, start, end, count, flags)); 248 249 /* For other devices use OFW method */ 250 sc = device_get_softc(dev); 251 252 if (RMAN_IS_DEFAULT_RANGE(start, end)) { 253 if ((di = device_get_ivars(child)) == NULL) 254 return (NULL); 255 if (type == SYS_RES_IOPORT) 256 type = SYS_RES_MEMORY; 257 258 /* Find defaults for this rid */ 259 rle = resource_list_find(&di->di_rl, type, *rid); 260 if (rle == NULL) 261 return (NULL); 262 263 start = rle->start; 264 end = rle->end; 265 count = rle->count; 266 } 267 268 if (type == SYS_RES_MEMORY) { 269 /* Remap through ranges property */ 270 for (i = 0; i < MAX_RANGES_TUPLES; i++) { 271 if (start >= sc->base.ranges[i].phys_base && 272 end < (sc->base.ranges[i].pci_base + 273 sc->base.ranges[i].size)) { 274 start -= sc->base.ranges[i].phys_base; 275 start += sc->base.ranges[i].pci_base; 276 end -= sc->base.ranges[i].phys_base; 277 end += sc->base.ranges[i].pci_base; 278 break; 279 } 280 } 281 282 if (i == MAX_RANGES_TUPLES) { 283 device_printf(dev, "Could not map resource " 284 "%#jx-%#jx\n", start, end); 285 return (NULL); 286 } 287 } 288 289 return (bus_generic_alloc_resource(dev, child, type, rid, start, 290 end, count, flags)); 291 } 292 293 static int 294 thunder_pcie_fdt_release_resource(device_t dev, device_t child, int type, 295 int rid, struct resource *res) 296 { 297 298 if ((int)ofw_bus_get_node(child) <= 0) 299 return (pci_host_generic_core_release_resource(dev, child, type, 300 rid, res)); 301 302 return (bus_generic_release_resource(dev, child, type, rid, res)); 303 } 304 #endif 305