1 /*- 2 * Copyright (c) 2019 Juniper Networks, Inc. 3 * Copyright (c) 2019 Semihalf. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 #include <sys/param.h> 30 #include <sys/bus.h> 31 #include <sys/kernel.h> 32 #include <sys/module.h> 33 #include <sys/rman.h> 34 #include <sys/systm.h> 35 36 #include <dev/fdt/simplebus.h> 37 #include <dev/ofw/ofw_bus_subr.h> 38 #include <dev/ofw/ofw_bus.h> 39 40 #include <machine/bus.h> 41 #include <machine/resource.h> 42 43 #include "mdio_if.h" 44 45 MALLOC_DEFINE(M_BRCM_IPROC_NEXUS, "Broadcom IPROC MDIO NEXUS", 46 "Broadcom IPROC MDIO NEXUS dynamic memory"); 47 48 struct brcm_mdionexus_softc { 49 struct simplebus_softc simplebus_sc; 50 uint32_t mux_id; 51 }; 52 53 /* OFW bus interface */ 54 struct brcm_mdionexus_ofw_devinfo { 55 struct ofw_bus_devinfo di_dinfo; 56 struct resource_list di_rl; 57 }; 58 59 static device_probe_t brcm_mdionexus_fdt_probe; 60 static device_attach_t brcm_mdionexus_fdt_attach; 61 62 static const struct ofw_bus_devinfo * brcm_mdionexus_ofw_get_devinfo(device_t, 63 device_t); 64 static int brcm_mdionexus_mdio_readreg(device_t, int, int); 65 static int brcm_mdionexus_mdio_writereg(device_t, int, int, int); 66 67 static device_method_t brcm_mdionexus_fdt_methods[] = { 68 /* Device interface */ 69 DEVMETHOD(device_probe, brcm_mdionexus_fdt_probe), 70 DEVMETHOD(device_attach, brcm_mdionexus_fdt_attach), 71 72 /* Bus interface */ 73 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 74 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 75 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 76 77 /* ofw_bus interface */ 78 DEVMETHOD(ofw_bus_get_devinfo, brcm_mdionexus_ofw_get_devinfo), 79 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 80 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 81 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 82 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 83 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 84 85 /* MDIO interface */ 86 /* MDIO interface */ 87 DEVMETHOD(mdio_readreg, brcm_mdionexus_mdio_readreg), 88 DEVMETHOD(mdio_writereg, brcm_mdionexus_mdio_writereg), 89 90 DEVMETHOD_END 91 }; 92 93 DEFINE_CLASS_0(brcm_mdionexus, brcm_mdionexus_fdt_driver, brcm_mdionexus_fdt_methods, 94 sizeof(struct brcm_mdionexus_softc)); 95 96 static driver_t brcm_mdionexus_driver = { 97 "brcm_mdionexus", 98 brcm_mdionexus_fdt_methods, 99 sizeof(struct brcm_mdionexus_softc) 100 }; 101 102 EARLY_DRIVER_MODULE(brcm_mdionexus, brcm_iproc_mdio, brcm_mdionexus_driver, 103 NULL, NULL, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 104 105 static int brcm_mdionexus_ofw_bus_attach(device_t); 106 107 static int 108 brcm_mdionexus_mdio_readreg(device_t dev, int phy, int reg) 109 { 110 struct brcm_mdionexus_softc *sc; 111 112 sc = device_get_softc(dev); 113 114 return (MDIO_READREG_MUX(device_get_parent(dev), 115 sc->mux_id, phy, reg)); 116 } 117 118 static int 119 brcm_mdionexus_mdio_writereg(device_t dev, int phy, int reg, int val) 120 { 121 struct brcm_mdionexus_softc *sc; 122 123 sc = device_get_softc(dev); 124 125 return (MDIO_WRITEREG_MUX(device_get_parent(dev), 126 sc->mux_id, phy, reg, val)); 127 } 128 129 static __inline void 130 get_addr_size_cells(phandle_t node, pcell_t *addr_cells, pcell_t *size_cells) 131 { 132 133 *addr_cells = 2; 134 /* Find address cells if present */ 135 OF_getencprop(node, "#address-cells", addr_cells, sizeof(*addr_cells)); 136 137 *size_cells = 2; 138 /* Find size cells if present */ 139 OF_getencprop(node, "#size-cells", size_cells, sizeof(*size_cells)); 140 } 141 142 static int 143 brcm_mdionexus_fdt_probe(device_t dev) 144 { 145 146 if (!ofw_bus_status_okay(dev)) 147 return (ENXIO); 148 device_set_desc(dev, "Broadcom MDIO nexus"); 149 return (BUS_PROBE_SPECIFIC); 150 } 151 152 static int 153 brcm_mdionexus_fdt_attach(device_t dev) 154 { 155 struct brcm_mdionexus_softc *sc; 156 int err; 157 pcell_t addr_cells, size_cells, buf[2]; 158 phandle_t node; 159 160 sc = device_get_softc(dev); 161 162 node = ofw_bus_get_node(dev); 163 get_addr_size_cells(node, &addr_cells, &size_cells); 164 if ((addr_cells != 1) || (size_cells != 0)) { 165 device_printf(dev, "Only addr_cells=1 and size_cells=0 are supported\n"); 166 return (EINVAL); 167 } 168 169 if (OF_getencprop(node, "reg", buf, sizeof(pcell_t)) < 0) 170 return (ENXIO); 171 172 sc->mux_id = buf[0]; 173 174 err = brcm_mdionexus_ofw_bus_attach(dev); 175 if (err != 0) 176 return (err); 177 178 return (bus_generic_attach(dev)); 179 } 180 181 static const struct ofw_bus_devinfo * 182 brcm_mdionexus_ofw_get_devinfo(device_t bus __unused, device_t child) 183 { 184 struct brcm_mdionexus_ofw_devinfo *di; 185 186 di = device_get_ivars(child); 187 return (&di->di_dinfo); 188 } 189 190 static int 191 brcm_mdionexus_ofw_bus_attach(device_t dev) 192 { 193 struct simplebus_softc *sc; 194 struct brcm_mdionexus_ofw_devinfo *di; 195 device_t child; 196 phandle_t parent, node; 197 198 parent = ofw_bus_get_node(dev); 199 simplebus_init(dev, parent); 200 201 sc = (struct simplebus_softc *)device_get_softc(dev); 202 203 /* Iterate through all bus subordinates */ 204 for (node = OF_child(parent); node > 0; node = OF_peer(node)) { 205 /* Allocate and populate devinfo. */ 206 di = malloc(sizeof(*di), M_BRCM_IPROC_NEXUS, M_WAITOK | M_ZERO); 207 if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) { 208 free(di, M_BRCM_IPROC_NEXUS); 209 continue; 210 } 211 212 /* Initialize and populate resource list. */ 213 resource_list_init(&di->di_rl); 214 ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells, 215 &di->di_rl); 216 ofw_bus_intr_to_rl(dev, node, &di->di_rl, NULL); 217 218 /* Add newbus device for this FDT node */ 219 child = device_add_child(dev, NULL, -1); 220 if (child == NULL) { 221 resource_list_free(&di->di_rl); 222 ofw_bus_gen_destroy_devinfo(&di->di_dinfo); 223 free(di, M_BRCM_IPROC_NEXUS); 224 continue; 225 } 226 227 device_set_ivars(child, di); 228 } 229 230 return (0); 231 } 232