1 /*- 2 * Copyright (c) 2013 Thomas Skibo 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 /* 30 * Machine dependent code for Xilinx Zynq-7000 Soc. 31 * 32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual. 33 * (v1.4) November 16, 2012. Xilinx doc UG585. 34 */ 35 36 #include "opt_global.h" 37 38 #include <sys/cdefs.h> 39 __FBSDID("$FreeBSD$"); 40 41 #define _ARM32_BUS_DMA_PRIVATE 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/bus.h> 45 46 #include <vm/vm.h> 47 #include <vm/pmap.h> 48 49 #include <dev/fdt/fdt_common.h> 50 51 #include <machine/bus.h> 52 #include <machine/devmap.h> 53 #include <machine/machdep.h> 54 55 #include <arm/xilinx/zy7_reg.h> 56 57 void (*zynq7_cpu_reset)(void); 58 59 vm_offset_t 60 initarm_lastaddr(void) 61 { 62 63 return (ZYNQ7_PSIO_VBASE); 64 } 65 66 void 67 initarm_early_init(void) 68 { 69 70 } 71 72 void 73 initarm_gpio_init(void) 74 { 75 } 76 77 void 78 initarm_late_init(void) 79 { 80 } 81 82 #define FDT_DEVMAP_SIZE 3 83 static struct arm_devmap_entry fdt_devmap[FDT_DEVMAP_SIZE]; 84 85 /* 86 * Construct pmap_devmap[] with DT-derived config data. 87 */ 88 int 89 initarm_devmap_init(void) 90 { 91 int i = 0; 92 93 fdt_devmap[i].pd_va = ZYNQ7_PSIO_VBASE; 94 fdt_devmap[i].pd_pa = ZYNQ7_PSIO_HWBASE; 95 fdt_devmap[i].pd_size = ZYNQ7_PSIO_SIZE; 96 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE; 97 fdt_devmap[i].pd_cache = PTE_DEVICE; 98 i++; 99 100 fdt_devmap[i].pd_va = ZYNQ7_PSCTL_VBASE; 101 fdt_devmap[i].pd_pa = ZYNQ7_PSCTL_HWBASE; 102 fdt_devmap[i].pd_size = ZYNQ7_PSCTL_SIZE; 103 fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE; 104 fdt_devmap[i].pd_cache = PTE_DEVICE; 105 i++; 106 107 /* end of table */ 108 fdt_devmap[i].pd_va = 0; 109 fdt_devmap[i].pd_pa = 0; 110 fdt_devmap[i].pd_size = 0; 111 fdt_devmap[i].pd_prot = 0; 112 fdt_devmap[i].pd_cache = 0; 113 114 arm_devmap_register_table(&fdt_devmap[0]); 115 return (0); 116 } 117 118 119 struct fdt_fixup_entry fdt_fixup_table[] = { 120 { NULL, NULL } 121 }; 122 123 static int 124 fdt_gic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, 125 int *pol) 126 { 127 128 if (!fdt_is_compatible(node, "arm,gic")) 129 return (ENXIO); 130 131 *interrupt = fdt32_to_cpu(intr[0]); 132 *trig = INTR_TRIGGER_CONFORM; 133 *pol = INTR_POLARITY_CONFORM; 134 135 return (0); 136 } 137 138 fdt_pic_decode_t fdt_pic_table[] = { 139 &fdt_gic_decode_ic, 140 NULL 141 }; 142 143 144 struct arm32_dma_range * 145 bus_dma_get_range(void) 146 { 147 148 return (NULL); 149 } 150 151 int 152 bus_dma_get_range_nb(void) 153 { 154 155 return (0); 156 } 157 158 void 159 cpu_reset() 160 { 161 if (zynq7_cpu_reset != NULL) 162 (*zynq7_cpu_reset)(); 163 164 printf("cpu_reset: no platform cpu_reset. hanging.\n"); 165 for (;;) 166 ; 167 } 168