1 /*- 2 * Copyright (c) 2012-2013 Thomas Skibo 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 /* 30 * A host-controller driver for Zynq-7000's USB OTG controller. 31 * 32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual. 33 * (v1.4) November 16, 2012. Xilinx doc UG585. Ch. 15 covers the USB 34 * controller and register definitions are in appendix B.34. 35 */ 36 37 38 #include <sys/cdefs.h> 39 __FBSDID("$FreeBSD$"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/bus.h> 44 #include <sys/conf.h> 45 #include <sys/kernel.h> 46 #include <sys/lock.h> 47 #include <sys/module.h> 48 #include <sys/mutex.h> 49 #include <sys/condvar.h> 50 #include <sys/resource.h> 51 #include <sys/rman.h> 52 53 #include <machine/bus.h> 54 #include <machine/resource.h> 55 #include <machine/stdarg.h> 56 57 #include <dev/ofw/ofw_bus.h> 58 #include <dev/ofw/ofw_bus_subr.h> 59 60 #include <dev/usb/usb.h> 61 #include <dev/usb/usbdi.h> 62 63 #include <dev/usb/usb_core.h> 64 #include <dev/usb/usb_busdma.h> 65 #include <dev/usb/usb_process.h> 66 #include <dev/usb/usb_util.h> 67 68 #include <dev/usb/usb_controller.h> 69 #include <dev/usb/usb_bus.h> 70 #include <dev/usb/controller/ehci.h> 71 #include <dev/usb/controller/ehcireg.h> 72 73 74 /* Register definitions. */ 75 #define ZY7_USB_ID 0x0000 76 #define ZY7_USB_HWGENERAL 0x0004 77 #define ZY7_USB_HWHOST 0x0008 78 #define ZY7_USB_HWDEVICE 0x000c 79 #define ZY7_USB_HWTXBUF 0x0010 80 #define ZY7_USB_HWRXBUF 0x0014 81 #define ZY7_USB_GPTIMER0LD 0x0080 82 #define ZY7_USB_GPTIMER0CTRL 0x0084 83 #define ZY7_USB_GPTIMER1LD 0x0088 84 #define ZY7_USB_GPTIMER1CTRL 0x008c 85 #define ZY7_USB_SBUSCFG 0x0090 86 #define ZY7_USB_CAPLENGTH_HCIVERSION 0x0100 87 #define ZY7_USB_HCSPARAMS 0x0104 88 #define ZY7_USB_HCCPARAMS 0x0108 89 #define ZY7_USB_DCIVERSION 0x0120 90 #define ZY7_USB_DCCPARAMS 0x0124 91 #define ZY7_USB_USBCMD 0x0140 92 #define ZY7_USB_USBSTS 0x0144 93 #define ZY7_USB_USBINTR 0x0148 94 #define ZY7_USB_FRINDEX 0x014c 95 #define ZY7_USB_PERIODICLISTBASE_DEICEADDR 0x0154 96 #define ZY7_USB_ASYNCLISTADDR_ENDPOINTLISTADDR 0x0158 97 #define ZY7_USB_TTCTRL 0x015c 98 #define ZY7_USB_BURSTSIZE 0x0160 99 #define ZY7_USB_TXFILLTUNING 0x0164 100 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT 16 101 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_MASK (0x3f<<16) 102 #define ZY7_USB_TXTFILLTUNING 0x0168 103 #define ZY7_USB_IC_USB 0x016c 104 #define ZY7_USB_ULPI_VIEWPORT 0x0170 105 #define ZY7_USB_ULPI_VIEWPORT_WU (1<<31) 106 #define ZY7_USB_ULPI_VIEWPORT_RUN (1<<30) 107 #define ZY7_USB_ULPI_VIEWPORT_RW (1<<29) 108 #define ZY7_USB_ULPI_VIEWPORT_SS (1<<27) 109 #define ZY7_USB_ULPI_VIEWPORT_PORT_MASK (7<<24) 110 #define ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT 24 111 #define ZY7_USB_ULPI_VIEWPORT_ADDR_MASK (0xff<<16) 112 #define ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT 16 113 #define ZY7_USB_ULPI_VIEWPORT_DATARD_MASK (0xff<<8) 114 #define ZY7_USB_ULPI_VIEWPORT_DATARD_SHIFT 8 115 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_MASK (0xff<<0) 116 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT 0 117 #define ZY7_USB_ENDPTNAK 0x0178 118 #define ZY7_USB_ENDPTNAKEN 0x017c 119 #define ZY7_USB_CONFIGFLAG 0x0180 120 #define ZY7_USB_PORTSC(n) (0x0180+4*(n)) 121 #define ZY7_USB_PORTSC_PTS_MASK (3<<30) 122 #define ZY7_USB_PORTSC_PTS_SHIFT 30 123 #define ZY7_USB_PORTSC_PTS_UTMI (0<<30) 124 #define ZY7_USB_PORTSC_PTS_ULPI (2<<30) 125 #define ZY7_USB_PORTSC_PTS_SERIAL (3<<30) 126 #define ZY7_USB_PORTSC_PTW (1<<28) 127 #define ZY7_USB_PORTSC_PTS2 (1<<25) 128 #define ZY7_USB_OTGSC 0x01a4 129 #define ZY7_USB_USBMODE 0x01a8 130 #define ZY7_USB_ENDPTSETUPSTAT 0x01ac 131 #define ZY7_USB_ENDPTPRIME 0x01b0 132 #define ZY7_USB_ENDPTFLUSH 0x01b4 133 #define ZY7_USB_ENDPTSTAT 0x01b8 134 #define ZY7_USB_ENDPTCOMPLETE 0x01bc 135 #define ZY7_USB_ENDPTCTRL(n) (0x01c0+4*(n)) 136 137 #define EHCI_REG_OFFSET ZY7_USB_CAPLENGTH_HCIVERSION 138 #define EHCI_REG_SIZE 0x100 139 140 static void 141 zy7_ehci_post_reset(struct ehci_softc *ehci_softc) 142 { 143 uint32_t usbmode; 144 145 /* Force HOST mode */ 146 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM); 147 usbmode &= ~EHCI_UM_CM; 148 usbmode |= EHCI_UM_CM_HOST; 149 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode); 150 } 151 152 static int 153 zy7_phy_config(device_t dev, bus_space_tag_t io_tag, bus_space_handle_t bsh) 154 { 155 phandle_t node; 156 char buf[64]; 157 uint32_t portsc; 158 int tries; 159 160 node = ofw_bus_get_node(dev); 161 162 if (OF_getprop(node, "phy_type", buf, sizeof(buf)) > 0) { 163 portsc = bus_space_read_4(io_tag, bsh, ZY7_USB_PORTSC(1)); 164 portsc &= ~(ZY7_USB_PORTSC_PTS_MASK | ZY7_USB_PORTSC_PTW | 165 ZY7_USB_PORTSC_PTS2); 166 167 if (strcmp(buf,"ulpi") == 0) 168 portsc |= ZY7_USB_PORTSC_PTS_ULPI; 169 else if (strcmp(buf,"utmi") == 0) 170 portsc |= ZY7_USB_PORTSC_PTS_UTMI; 171 else if (strcmp(buf,"utmi-wide") == 0) 172 portsc |= (ZY7_USB_PORTSC_PTS_UTMI | 173 ZY7_USB_PORTSC_PTW); 174 else if (strcmp(buf, "serial") == 0) 175 portsc |= ZY7_USB_PORTSC_PTS_SERIAL; 176 177 bus_space_write_4(io_tag, bsh, ZY7_USB_PORTSC(1), portsc); 178 } 179 180 if (OF_getprop(node, "phy_vbus_ext", buf, sizeof(buf)) >= 0) { 181 182 /* Tell PHY that VBUS is supplied externally. */ 183 bus_space_write_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT, 184 ZY7_USB_ULPI_VIEWPORT_RUN | 185 ZY7_USB_ULPI_VIEWPORT_RW | 186 (0 << ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT) | 187 (0x0b << ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT) | 188 (0x60 << ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT) 189 ); 190 191 tries = 100; 192 while ((bus_space_read_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT) & 193 ZY7_USB_ULPI_VIEWPORT_RUN) != 0) { 194 if (--tries < 0) 195 return (-1); 196 DELAY(1); 197 } 198 } 199 200 return (0); 201 } 202 203 static int 204 zy7_ehci_probe(device_t dev) 205 { 206 207 if (!ofw_bus_status_okay(dev)) 208 return (ENXIO); 209 210 if (!ofw_bus_is_compatible(dev, "xlnx,zy7_ehci")) 211 return (ENXIO); 212 213 device_set_desc(dev, "Zynq-7000 EHCI USB 2.0 controller"); 214 return (0); 215 } 216 217 static int zy7_ehci_detach(device_t dev); 218 219 static int 220 zy7_ehci_attach(device_t dev) 221 { 222 ehci_softc_t *sc = device_get_softc(dev); 223 bus_space_handle_t bsh; 224 int err, rid; 225 226 /* initialize some bus fields */ 227 sc->sc_bus.parent = dev; 228 sc->sc_bus.devices = sc->sc_devices; 229 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 230 sc->sc_bus.dma_bits = 32; 231 232 /* get all DMA memory */ 233 if (usb_bus_mem_alloc_all(&sc->sc_bus, 234 USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc)) 235 return (ENOMEM); 236 237 /* Allocate memory. */ 238 rid = 0; 239 sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 240 &rid, RF_ACTIVE); 241 if (sc->sc_io_res == NULL) { 242 device_printf(dev, "Can't allocate memory"); 243 zy7_ehci_detach(dev); 244 return (ENOMEM); 245 } 246 247 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 248 bsh = rman_get_bushandle(sc->sc_io_res); 249 sc->sc_io_size = EHCI_REG_SIZE; 250 251 if (bus_space_subregion(sc->sc_io_tag, bsh, EHCI_REG_OFFSET, 252 sc->sc_io_size, &sc->sc_io_hdl) != 0) 253 panic("%s: unable to subregion USB host registers", 254 device_get_name(dev)); 255 256 /* Allocate IRQ. */ 257 rid = 0; 258 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 259 RF_ACTIVE); 260 if (sc->sc_irq_res == NULL) { 261 device_printf(dev, "Can't allocate IRQ\n"); 262 zy7_ehci_detach(dev); 263 return (ENOMEM); 264 } 265 266 /* Add USB device */ 267 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); 268 if (!sc->sc_bus.bdev) { 269 device_printf(dev, "Could not add USB device\n"); 270 zy7_ehci_detach(dev); 271 return (ENXIO); 272 } 273 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 274 device_set_desc(sc->sc_bus.bdev, "Zynq-7000 ehci USB 2.0 controller"); 275 276 strcpy(sc->sc_vendor, "Xilinx"); /* or IP vendor? */ 277 278 /* Activate the interrupt */ 279 err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 280 NULL, (driver_intr_t *)ehci_interrupt, sc, 281 &sc->sc_intr_hdl); 282 if (err) { 283 device_printf(dev, "Cannot setup IRQ\n"); 284 zy7_ehci_detach(dev); 285 return (err); 286 } 287 288 /* Customization. */ 289 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM; 290 sc->sc_vendor_post_reset = zy7_ehci_post_reset; 291 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc; 292 293 /* Modify FIFO burst threshold from 2 to 8. */ 294 bus_space_write_4(sc->sc_io_tag, bsh, 295 ZY7_USB_TXFILLTUNING, 296 8 << ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT); 297 298 /* Handle PHY options. */ 299 if (zy7_phy_config(dev, sc->sc_io_tag, bsh) < 0) { 300 device_printf(dev, "Cannot config phy!\n"); 301 zy7_ehci_detach(dev); 302 return (EIO); 303 } 304 305 /* Init ehci. */ 306 err = ehci_init(sc); 307 if (!err) { 308 sc->sc_flags |= EHCI_SCFLG_DONEINIT; 309 err = device_probe_and_attach(sc->sc_bus.bdev); 310 } 311 if (err) { 312 device_printf(dev, "USB init failed err=%d\n", err); 313 zy7_ehci_detach(dev); 314 return (err); 315 } 316 317 return (0); 318 } 319 320 static int 321 zy7_ehci_detach(device_t dev) 322 { 323 ehci_softc_t *sc = device_get_softc(dev); 324 325 /* during module unload there are lots of children leftover */ 326 device_delete_children(dev); 327 328 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT; 329 330 if (sc->sc_irq_res && sc->sc_intr_hdl) 331 /* call ehci_detach() after ehci_init() called after 332 * successful bus_setup_intr(). 333 */ 334 ehci_detach(sc); 335 336 if (sc->sc_irq_res) { 337 if (sc->sc_intr_hdl != NULL) 338 bus_teardown_intr(dev, sc->sc_irq_res, 339 sc->sc_intr_hdl); 340 bus_release_resource(dev, SYS_RES_IRQ, 341 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 342 } 343 344 if (sc->sc_io_res) 345 bus_release_resource(dev, SYS_RES_MEMORY, 346 rman_get_rid(sc->sc_io_res), sc->sc_io_res); 347 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 348 349 return (0); 350 } 351 352 static device_method_t ehci_methods[] = { 353 /* Device interface */ 354 DEVMETHOD(device_probe, zy7_ehci_probe), 355 DEVMETHOD(device_attach, zy7_ehci_attach), 356 DEVMETHOD(device_detach, zy7_ehci_detach), 357 DEVMETHOD(device_suspend, bus_generic_suspend), 358 DEVMETHOD(device_resume, bus_generic_resume), 359 DEVMETHOD(device_shutdown, bus_generic_shutdown), 360 361 /* Bus interface */ 362 DEVMETHOD(bus_print_child, bus_generic_print_child), 363 364 DEVMETHOD_END 365 }; 366 367 static driver_t ehci_driver = { 368 "ehci", 369 ehci_methods, 370 sizeof(struct ehci_softc), 371 }; 372 static devclass_t ehci_devclass; 373 374 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, NULL, NULL); 375 MODULE_DEPEND(ehci, usb, 1, 1, 1); 376