1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2012-2013 Thomas Skibo 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * A host-controller driver for Zynq-7000's USB OTG controller. 31 * 32 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual. 33 * (v1.4) November 16, 2012. Xilinx doc UG585. Ch. 15 covers the USB 34 * controller and register definitions are in appendix B.34. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/bus.h> 40 #include <sys/conf.h> 41 #include <sys/kernel.h> 42 #include <sys/lock.h> 43 #include <sys/module.h> 44 #include <sys/mutex.h> 45 #include <sys/condvar.h> 46 #include <sys/resource.h> 47 #include <sys/rman.h> 48 49 #include <machine/bus.h> 50 #include <machine/resource.h> 51 #include <machine/stdarg.h> 52 53 #include <dev/ofw/ofw_bus.h> 54 #include <dev/ofw/ofw_bus_subr.h> 55 56 #include <dev/usb/usb.h> 57 #include <dev/usb/usbdi.h> 58 59 #include <dev/usb/usb_core.h> 60 #include <dev/usb/usb_busdma.h> 61 #include <dev/usb/usb_process.h> 62 #include <dev/usb/usb_util.h> 63 64 #include <dev/usb/usb_controller.h> 65 #include <dev/usb/usb_bus.h> 66 #include <dev/usb/controller/ehci.h> 67 #include <dev/usb/controller/ehcireg.h> 68 69 /* Register definitions. */ 70 #define ZY7_USB_ID 0x0000 71 #define ZY7_USB_HWGENERAL 0x0004 72 #define ZY7_USB_HWHOST 0x0008 73 #define ZY7_USB_HWDEVICE 0x000c 74 #define ZY7_USB_HWTXBUF 0x0010 75 #define ZY7_USB_HWRXBUF 0x0014 76 #define ZY7_USB_GPTIMER0LD 0x0080 77 #define ZY7_USB_GPTIMER0CTRL 0x0084 78 #define ZY7_USB_GPTIMER1LD 0x0088 79 #define ZY7_USB_GPTIMER1CTRL 0x008c 80 #define ZY7_USB_SBUSCFG 0x0090 81 #define ZY7_USB_CAPLENGTH_HCIVERSION 0x0100 82 #define ZY7_USB_HCSPARAMS 0x0104 83 #define ZY7_USB_HCCPARAMS 0x0108 84 #define ZY7_USB_DCIVERSION 0x0120 85 #define ZY7_USB_DCCPARAMS 0x0124 86 #define ZY7_USB_USBCMD 0x0140 87 #define ZY7_USB_USBSTS 0x0144 88 #define ZY7_USB_USBINTR 0x0148 89 #define ZY7_USB_FRINDEX 0x014c 90 #define ZY7_USB_PERIODICLISTBASE_DEICEADDR 0x0154 91 #define ZY7_USB_ASYNCLISTADDR_ENDPOINTLISTADDR 0x0158 92 #define ZY7_USB_TTCTRL 0x015c 93 #define ZY7_USB_BURSTSIZE 0x0160 94 #define ZY7_USB_TXFILLTUNING 0x0164 95 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT 16 96 #define ZY7_USB_TXFILLTUNING_TXFIFOTHRES_MASK (0x3f<<16) 97 #define ZY7_USB_TXTFILLTUNING 0x0168 98 #define ZY7_USB_IC_USB 0x016c 99 #define ZY7_USB_ULPI_VIEWPORT 0x0170 100 #define ZY7_USB_ULPI_VIEWPORT_WU (1<<31) 101 #define ZY7_USB_ULPI_VIEWPORT_RUN (1<<30) 102 #define ZY7_USB_ULPI_VIEWPORT_RW (1<<29) 103 #define ZY7_USB_ULPI_VIEWPORT_SS (1<<27) 104 #define ZY7_USB_ULPI_VIEWPORT_PORT_MASK (7<<24) 105 #define ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT 24 106 #define ZY7_USB_ULPI_VIEWPORT_ADDR_MASK (0xff<<16) 107 #define ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT 16 108 #define ZY7_USB_ULPI_VIEWPORT_DATARD_MASK (0xff<<8) 109 #define ZY7_USB_ULPI_VIEWPORT_DATARD_SHIFT 8 110 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_MASK (0xff<<0) 111 #define ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT 0 112 #define ZY7_USB_ENDPTNAK 0x0178 113 #define ZY7_USB_ENDPTNAKEN 0x017c 114 #define ZY7_USB_CONFIGFLAG 0x0180 115 #define ZY7_USB_PORTSC(n) (0x0180+4*(n)) 116 #define ZY7_USB_PORTSC_PTS_MASK (3<<30) 117 #define ZY7_USB_PORTSC_PTS_SHIFT 30 118 #define ZY7_USB_PORTSC_PTS_UTMI (0<<30) 119 #define ZY7_USB_PORTSC_PTS_ULPI (2<<30) 120 #define ZY7_USB_PORTSC_PTS_SERIAL (3<<30) 121 #define ZY7_USB_PORTSC_PTW (1<<28) 122 #define ZY7_USB_PORTSC_PTS2 (1<<25) 123 #define ZY7_USB_OTGSC 0x01a4 124 #define ZY7_USB_USBMODE 0x01a8 125 #define ZY7_USB_ENDPTSETUPSTAT 0x01ac 126 #define ZY7_USB_ENDPTPRIME 0x01b0 127 #define ZY7_USB_ENDPTFLUSH 0x01b4 128 #define ZY7_USB_ENDPTSTAT 0x01b8 129 #define ZY7_USB_ENDPTCOMPLETE 0x01bc 130 #define ZY7_USB_ENDPTCTRL(n) (0x01c0+4*(n)) 131 132 #define EHCI_REG_OFFSET ZY7_USB_CAPLENGTH_HCIVERSION 133 #define EHCI_REG_SIZE 0x100 134 135 static void 136 zy7_ehci_post_reset(struct ehci_softc *ehci_softc) 137 { 138 uint32_t usbmode; 139 140 /* Force HOST mode */ 141 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM); 142 usbmode &= ~EHCI_UM_CM; 143 usbmode |= EHCI_UM_CM_HOST; 144 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode); 145 } 146 147 static int 148 zy7_phy_config(device_t dev, bus_space_tag_t io_tag, bus_space_handle_t bsh) 149 { 150 phandle_t node; 151 char buf[64]; 152 uint32_t portsc; 153 int tries; 154 155 node = ofw_bus_get_node(dev); 156 157 if (OF_getprop(node, "phy_type", buf, sizeof(buf)) > 0) { 158 portsc = bus_space_read_4(io_tag, bsh, ZY7_USB_PORTSC(1)); 159 portsc &= ~(ZY7_USB_PORTSC_PTS_MASK | ZY7_USB_PORTSC_PTW | 160 ZY7_USB_PORTSC_PTS2); 161 162 if (strcmp(buf,"ulpi") == 0) 163 portsc |= ZY7_USB_PORTSC_PTS_ULPI; 164 else if (strcmp(buf,"utmi") == 0) 165 portsc |= ZY7_USB_PORTSC_PTS_UTMI; 166 else if (strcmp(buf,"utmi-wide") == 0) 167 portsc |= (ZY7_USB_PORTSC_PTS_UTMI | 168 ZY7_USB_PORTSC_PTW); 169 else if (strcmp(buf, "serial") == 0) 170 portsc |= ZY7_USB_PORTSC_PTS_SERIAL; 171 172 bus_space_write_4(io_tag, bsh, ZY7_USB_PORTSC(1), portsc); 173 } 174 175 if (OF_getprop(node, "phy_vbus_ext", buf, sizeof(buf)) >= 0) { 176 /* Tell PHY that VBUS is supplied externally. */ 177 bus_space_write_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT, 178 ZY7_USB_ULPI_VIEWPORT_RUN | 179 ZY7_USB_ULPI_VIEWPORT_RW | 180 (0 << ZY7_USB_ULPI_VIEWPORT_PORT_SHIFT) | 181 (0x0b << ZY7_USB_ULPI_VIEWPORT_ADDR_SHIFT) | 182 (0x60 << ZY7_USB_ULPI_VIEWPORT_DATAWR_SHIFT) 183 ); 184 185 tries = 100; 186 while ((bus_space_read_4(io_tag, bsh, ZY7_USB_ULPI_VIEWPORT) & 187 ZY7_USB_ULPI_VIEWPORT_RUN) != 0) { 188 if (--tries < 0) 189 return (-1); 190 DELAY(1); 191 } 192 } 193 194 return (0); 195 } 196 197 static int 198 zy7_ehci_probe(device_t dev) 199 { 200 201 if (!ofw_bus_status_okay(dev)) 202 return (ENXIO); 203 204 if (!ofw_bus_is_compatible(dev, "xlnx,zy7_ehci")) 205 return (ENXIO); 206 207 device_set_desc(dev, "Zynq-7000 EHCI USB 2.0 controller"); 208 return (0); 209 } 210 211 static int zy7_ehci_detach(device_t dev); 212 213 static int 214 zy7_ehci_attach(device_t dev) 215 { 216 ehci_softc_t *sc = device_get_softc(dev); 217 bus_space_handle_t bsh; 218 int err, rid; 219 220 /* initialize some bus fields */ 221 sc->sc_bus.parent = dev; 222 sc->sc_bus.devices = sc->sc_devices; 223 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 224 sc->sc_bus.dma_bits = 32; 225 226 /* get all DMA memory */ 227 if (usb_bus_mem_alloc_all(&sc->sc_bus, 228 USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc)) 229 return (ENOMEM); 230 231 /* Allocate memory. */ 232 rid = 0; 233 sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 234 &rid, RF_ACTIVE); 235 if (sc->sc_io_res == NULL) { 236 device_printf(dev, "Can't allocate memory"); 237 zy7_ehci_detach(dev); 238 return (ENOMEM); 239 } 240 241 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 242 bsh = rman_get_bushandle(sc->sc_io_res); 243 sc->sc_io_size = EHCI_REG_SIZE; 244 245 if (bus_space_subregion(sc->sc_io_tag, bsh, EHCI_REG_OFFSET, 246 sc->sc_io_size, &sc->sc_io_hdl) != 0) 247 panic("%s: unable to subregion USB host registers", 248 device_get_name(dev)); 249 250 /* Allocate IRQ. */ 251 rid = 0; 252 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 253 RF_ACTIVE); 254 if (sc->sc_irq_res == NULL) { 255 device_printf(dev, "Can't allocate IRQ\n"); 256 zy7_ehci_detach(dev); 257 return (ENOMEM); 258 } 259 260 /* Add USB device */ 261 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); 262 if (!sc->sc_bus.bdev) { 263 device_printf(dev, "Could not add USB device\n"); 264 zy7_ehci_detach(dev); 265 return (ENXIO); 266 } 267 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 268 device_set_desc(sc->sc_bus.bdev, "Zynq-7000 ehci USB 2.0 controller"); 269 270 strcpy(sc->sc_vendor, "Xilinx"); /* or IP vendor? */ 271 272 /* Activate the interrupt */ 273 err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 274 NULL, (driver_intr_t *)ehci_interrupt, sc, 275 &sc->sc_intr_hdl); 276 if (err) { 277 device_printf(dev, "Cannot setup IRQ\n"); 278 zy7_ehci_detach(dev); 279 return (err); 280 } 281 282 /* Customization. */ 283 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM; 284 sc->sc_vendor_post_reset = zy7_ehci_post_reset; 285 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc; 286 287 /* Modify FIFO burst threshold from 2 to 8. */ 288 bus_space_write_4(sc->sc_io_tag, bsh, 289 ZY7_USB_TXFILLTUNING, 290 8 << ZY7_USB_TXFILLTUNING_TXFIFOTHRES_SHFT); 291 292 /* Handle PHY options. */ 293 if (zy7_phy_config(dev, sc->sc_io_tag, bsh) < 0) { 294 device_printf(dev, "Cannot config phy!\n"); 295 zy7_ehci_detach(dev); 296 return (EIO); 297 } 298 299 /* Init ehci. */ 300 err = ehci_init(sc); 301 if (!err) { 302 sc->sc_flags |= EHCI_SCFLG_DONEINIT; 303 err = device_probe_and_attach(sc->sc_bus.bdev); 304 } 305 if (err) { 306 device_printf(dev, "USB init failed err=%d\n", err); 307 zy7_ehci_detach(dev); 308 return (err); 309 } 310 311 return (0); 312 } 313 314 static int 315 zy7_ehci_detach(device_t dev) 316 { 317 ehci_softc_t *sc = device_get_softc(dev); 318 319 /* during module unload there are lots of children leftover */ 320 device_delete_children(dev); 321 322 if ((sc->sc_flags & EHCI_SCFLG_DONEINIT) != 0) { 323 ehci_detach(sc); 324 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT; 325 } 326 327 if (sc->sc_irq_res) { 328 if (sc->sc_intr_hdl != NULL) 329 bus_teardown_intr(dev, sc->sc_irq_res, 330 sc->sc_intr_hdl); 331 bus_release_resource(dev, SYS_RES_IRQ, 332 rman_get_rid(sc->sc_irq_res), sc->sc_irq_res); 333 } 334 335 if (sc->sc_io_res) 336 bus_release_resource(dev, SYS_RES_MEMORY, 337 rman_get_rid(sc->sc_io_res), sc->sc_io_res); 338 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 339 340 return (0); 341 } 342 343 static device_method_t ehci_methods[] = { 344 /* Device interface */ 345 DEVMETHOD(device_probe, zy7_ehci_probe), 346 DEVMETHOD(device_attach, zy7_ehci_attach), 347 DEVMETHOD(device_detach, zy7_ehci_detach), 348 DEVMETHOD(device_suspend, bus_generic_suspend), 349 DEVMETHOD(device_resume, bus_generic_resume), 350 DEVMETHOD(device_shutdown, bus_generic_shutdown), 351 352 /* Bus interface */ 353 DEVMETHOD(bus_print_child, bus_generic_print_child), 354 355 DEVMETHOD_END 356 }; 357 358 static driver_t ehci_driver = { 359 "ehci", 360 ehci_methods, 361 sizeof(struct ehci_softc), 362 }; 363 364 DRIVER_MODULE(zy7_ehci, simplebus, ehci_driver, NULL, NULL); 365 MODULE_DEPEND(zy7_ehci, usb, 1, 1, 1); 366