1 /*- 2 * Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.org> 3 * 4 * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 /* Based on sys/arm/ti/ti_sysc.c */ 28 29 #include <sys/cdefs.h> 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/module.h> 34 #include <sys/bus.h> 35 #include <sys/resource.h> 36 #include <sys/rman.h> 37 #include <sys/lock.h> 38 #include <sys/mutex.h> 39 40 #include <machine/bus.h> 41 #include <machine/resource.h> 42 43 #include <dev/fdt/simplebus.h> 44 45 #include <dev/ofw/openfirm.h> 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include "syscon_if.h" 50 #include <dev/extres/syscon/syscon.h> 51 #include "clkdev_if.h" 52 53 #include <arm/ti/ti_cpuid.h> 54 55 #if 0 56 #define DPRINTF(dev, msg...) device_printf(dev, msg) 57 #else 58 #define DPRINTF(dev, msg...) 59 #endif 60 61 MALLOC_DECLARE(M_SYSCON); 62 63 struct ti_scm_syscon_softc { 64 struct simplebus_softc sc_simplebus; 65 device_t dev; 66 struct syscon * syscon; 67 struct resource * res[1]; 68 bus_space_tag_t bst; 69 bus_space_handle_t bsh; 70 struct mtx mtx; 71 }; 72 73 static struct resource_spec ti_scm_syscon_res_spec[] = { 74 { SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE }, 75 { -1, 0 } 76 }; 77 78 /* Device */ 79 static struct ofw_compat_data compat_data[] = { 80 { "syscon", 1 }, 81 { NULL, 0 } 82 }; 83 84 /* --- dev/extres/syscon syscon_method_t interface --- */ 85 static int 86 ti_scm_syscon_write_4(struct syscon *syscon, bus_size_t offset, uint32_t val) 87 { 88 struct ti_scm_syscon_softc *sc; 89 90 sc = device_get_softc(syscon->pdev); 91 DPRINTF(sc->dev, "offset=%lx write %x\n", offset, val); 92 mtx_lock(&sc->mtx); 93 bus_space_write_4(sc->bst, sc->bsh, offset, val); 94 mtx_unlock(&sc->mtx); 95 return (0); 96 } 97 98 static uint32_t 99 ti_scm_syscon_read_4(struct syscon *syscon, bus_size_t offset) 100 { 101 struct ti_scm_syscon_softc *sc; 102 uint32_t val; 103 104 sc = device_get_softc(syscon->pdev); 105 106 mtx_lock(&sc->mtx); 107 val = bus_space_read_4(sc->bst, sc->bsh, offset); 108 mtx_unlock(&sc->mtx); 109 DPRINTF(sc->dev, "offset=%lx Read %x\n", offset, val); 110 return (val); 111 } 112 static int 113 ti_scm_syscon_modify_4(struct syscon *syscon, bus_size_t offset, uint32_t clr, uint32_t set) 114 { 115 struct ti_scm_syscon_softc *sc; 116 uint32_t reg; 117 118 sc = device_get_softc(syscon->pdev); 119 120 mtx_lock(&sc->mtx); 121 reg = bus_space_read_4(sc->bst, sc->bsh, offset); 122 reg &= ~clr; 123 reg |= set; 124 bus_space_write_4(sc->bst, sc->bsh, offset, reg); 125 mtx_unlock(&sc->mtx); 126 DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", offset, reg, clr, set); 127 128 return (0); 129 } 130 131 static syscon_method_t ti_scm_syscon_reg_methods[] = { 132 SYSCONMETHOD(syscon_read_4, ti_scm_syscon_read_4), 133 SYSCONMETHOD(syscon_write_4, ti_scm_syscon_write_4), 134 SYSCONMETHOD(syscon_modify_4, ti_scm_syscon_modify_4), 135 136 SYSCONMETHOD_END 137 }; 138 139 DEFINE_CLASS_1(ti_scm_syscon_reg, ti_scm_syscon_reg_class, ti_scm_syscon_reg_methods, 140 0, syscon_class); 141 142 /* device interface */ 143 static int 144 ti_scm_syscon_probe(device_t dev) 145 { 146 if (!ofw_bus_status_okay(dev)) 147 return (ENXIO); 148 149 if (!ti_soc_is_supported()) 150 return (ENXIO); 151 152 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 153 return (ENXIO); 154 155 device_set_desc(dev, "TI OMAP Control Module Syscon"); 156 return(BUS_PROBE_DEFAULT); 157 } 158 159 static int 160 ti_scm_syscon_attach(device_t dev) 161 { 162 struct ti_scm_syscon_softc *sc; 163 phandle_t node, child; 164 165 sc = device_get_softc(dev); 166 sc->dev = dev; 167 168 if (bus_alloc_resources(dev, ti_scm_syscon_res_spec, sc->res)) { 169 device_printf(sc->dev, "Cant allocate resources\n"); 170 return (ENXIO); 171 } 172 173 sc->dev = dev; 174 sc->bst = rman_get_bustag(sc->res[0]); 175 sc->bsh = rman_get_bushandle(sc->res[0]); 176 177 mtx_init(&sc->mtx, device_get_nameunit(sc->dev), NULL, MTX_DEF); 178 node = ofw_bus_get_node(sc->dev); 179 180 /* dev/extres/syscon interface */ 181 sc->syscon = syscon_create_ofw_node(dev, &ti_scm_syscon_reg_class, node); 182 if (sc->syscon == NULL) { 183 device_printf(dev, "Failed to create/register syscon\n"); 184 return (ENXIO); 185 } 186 187 simplebus_init(sc->dev, node); 188 189 bus_generic_probe(sc->dev); 190 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 191 simplebus_add_device(sc->dev, child, 0, NULL, -1, NULL); 192 } 193 194 return (bus_generic_attach(sc->dev)); 195 } 196 197 /* syscon interface */ 198 static int 199 ti_scm_syscon_get_handle(device_t dev, struct syscon **syscon) 200 { 201 struct ti_scm_syscon_softc *sc; 202 203 sc = device_get_softc(dev); 204 *syscon = sc->syscon; 205 if (*syscon == NULL) 206 return (ENODEV); 207 return (0); 208 } 209 210 /* clkdev interface */ 211 static int 212 ti_scm_syscon_clk_write_4(device_t dev, bus_addr_t addr, uint32_t val) 213 { 214 struct ti_scm_syscon_softc *sc; 215 216 sc = device_get_softc(dev); 217 DPRINTF(sc->dev, "offset=%lx write %x\n", addr, val); 218 bus_space_write_4(sc->bst, sc->bsh, addr, val); 219 return (0); 220 } 221 222 static int 223 ti_scm_syscon_clk_read_4(device_t dev, bus_addr_t addr, uint32_t *val) 224 { 225 struct ti_scm_syscon_softc *sc; 226 227 sc = device_get_softc(dev); 228 229 *val = bus_space_read_4(sc->bst, sc->bsh, addr); 230 DPRINTF(sc->dev, "offset=%lx Read %x\n", addr, *val); 231 return (0); 232 } 233 234 static int 235 ti_scm_syscon_clk_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) 236 { 237 struct ti_scm_syscon_softc *sc; 238 uint32_t reg; 239 240 sc = device_get_softc(dev); 241 242 reg = bus_space_read_4(sc->bst, sc->bsh, addr); 243 reg &= ~clr; 244 reg |= set; 245 bus_space_write_4(sc->bst, sc->bsh, addr, reg); 246 DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", addr, reg, clr, set); 247 248 return (0); 249 } 250 251 static void 252 ti_scm_syscon_clk_device_lock(device_t dev) 253 { 254 struct ti_scm_syscon_softc *sc; 255 256 sc = device_get_softc(dev); 257 mtx_lock(&sc->mtx); 258 } 259 260 static void 261 ti_scm_syscon_clk_device_unlock(device_t dev) 262 { 263 struct ti_scm_syscon_softc *sc; 264 sc = device_get_softc(dev); 265 mtx_unlock(&sc->mtx); 266 } 267 268 static device_method_t ti_scm_syscon_methods[] = { 269 DEVMETHOD(device_probe, ti_scm_syscon_probe), 270 DEVMETHOD(device_attach, ti_scm_syscon_attach), 271 272 /* syscon interface */ 273 DEVMETHOD(syscon_get_handle, ti_scm_syscon_get_handle), 274 275 /* clkdev interface */ 276 DEVMETHOD(clkdev_write_4, ti_scm_syscon_clk_write_4), 277 DEVMETHOD(clkdev_read_4, ti_scm_syscon_clk_read_4), 278 DEVMETHOD(clkdev_modify_4, ti_scm_syscon_clk_modify_4), 279 DEVMETHOD(clkdev_device_lock, ti_scm_syscon_clk_device_lock), 280 DEVMETHOD(clkdev_device_unlock, ti_scm_syscon_clk_device_unlock), 281 282 DEVMETHOD_END 283 }; 284 285 DEFINE_CLASS_1(ti_scm_syscon, ti_scm_syscon_driver, ti_scm_syscon_methods, 286 sizeof(struct ti_scm_syscon_softc), simplebus_driver); 287 288 EARLY_DRIVER_MODULE(ti_scm_syscon, simplebus, ti_scm_syscon_driver, 0, 0, 289 BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 290 MODULE_VERSION(ti_scm_syscon, 1); 291 MODULE_DEPEND(ti_scm_syscon, ti_scm, 1, 1, 1); 292