10050ea24SMichal Meloun /*- 20050ea24SMichal Meloun * Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.org> 30050ea24SMichal Meloun * 40050ea24SMichal Meloun * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se> 50050ea24SMichal Meloun * 60050ea24SMichal Meloun * Redistribution and use in source and binary forms, with or without 70050ea24SMichal Meloun * modification, are permitted provided that the following conditions 80050ea24SMichal Meloun * are met: 90050ea24SMichal Meloun * 1. Redistributions of source code must retain the above copyright 100050ea24SMichal Meloun * notice, this list of conditions and the following disclaimer. 110050ea24SMichal Meloun * 2. Redistributions in binary form must reproduce the above copyright 120050ea24SMichal Meloun * notice, this list of conditions and the following disclaimer in the 130050ea24SMichal Meloun * documentation and/or other materials provided with the distribution. 140050ea24SMichal Meloun * 150050ea24SMichal Meloun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 160050ea24SMichal Meloun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 170050ea24SMichal Meloun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 180050ea24SMichal Meloun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 190050ea24SMichal Meloun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 200050ea24SMichal Meloun * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 210050ea24SMichal Meloun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 220050ea24SMichal Meloun * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 230050ea24SMichal Meloun * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 240050ea24SMichal Meloun * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 250050ea24SMichal Meloun * SUCH DAMAGE. 260050ea24SMichal Meloun */ 270050ea24SMichal Meloun /* Based on sys/arm/ti/ti_sysc.c */ 280050ea24SMichal Meloun 290050ea24SMichal Meloun #include <sys/param.h> 300050ea24SMichal Meloun #include <sys/systm.h> 310050ea24SMichal Meloun #include <sys/kernel.h> 320050ea24SMichal Meloun #include <sys/module.h> 330050ea24SMichal Meloun #include <sys/bus.h> 340050ea24SMichal Meloun #include <sys/resource.h> 350050ea24SMichal Meloun #include <sys/rman.h> 360050ea24SMichal Meloun #include <sys/lock.h> 370050ea24SMichal Meloun #include <sys/mutex.h> 380050ea24SMichal Meloun 390050ea24SMichal Meloun #include <machine/bus.h> 400050ea24SMichal Meloun #include <machine/resource.h> 410050ea24SMichal Meloun 420050ea24SMichal Meloun #include <dev/fdt/simplebus.h> 430050ea24SMichal Meloun 440050ea24SMichal Meloun #include <dev/ofw/openfirm.h> 450050ea24SMichal Meloun #include <dev/ofw/ofw_bus.h> 460050ea24SMichal Meloun #include <dev/ofw/ofw_bus_subr.h> 470050ea24SMichal Meloun 480050ea24SMichal Meloun #include "syscon_if.h" 4962e8ccc3SEmmanuel Vadot #include <dev/syscon/syscon.h> 500050ea24SMichal Meloun #include "clkdev_if.h" 510050ea24SMichal Meloun 52ddd30dd8SIan Lepore #include <arm/ti/ti_cpuid.h> 53ddd30dd8SIan Lepore 540050ea24SMichal Meloun #if 0 550050ea24SMichal Meloun #define DPRINTF(dev, msg...) device_printf(dev, msg) 560050ea24SMichal Meloun #else 570050ea24SMichal Meloun #define DPRINTF(dev, msg...) 580050ea24SMichal Meloun #endif 590050ea24SMichal Meloun 600050ea24SMichal Meloun MALLOC_DECLARE(M_SYSCON); 610050ea24SMichal Meloun 620050ea24SMichal Meloun struct ti_scm_syscon_softc { 630050ea24SMichal Meloun struct simplebus_softc sc_simplebus; 640050ea24SMichal Meloun device_t dev; 650050ea24SMichal Meloun struct syscon * syscon; 660050ea24SMichal Meloun struct resource * res[1]; 670050ea24SMichal Meloun bus_space_tag_t bst; 680050ea24SMichal Meloun bus_space_handle_t bsh; 690050ea24SMichal Meloun struct mtx mtx; 700050ea24SMichal Meloun }; 710050ea24SMichal Meloun 720050ea24SMichal Meloun static struct resource_spec ti_scm_syscon_res_spec[] = { 730050ea24SMichal Meloun { SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE }, 740050ea24SMichal Meloun { -1, 0 } 750050ea24SMichal Meloun }; 760050ea24SMichal Meloun 770050ea24SMichal Meloun /* Device */ 780050ea24SMichal Meloun static struct ofw_compat_data compat_data[] = { 790050ea24SMichal Meloun { "syscon", 1 }, 800050ea24SMichal Meloun { NULL, 0 } 810050ea24SMichal Meloun }; 820050ea24SMichal Meloun 830050ea24SMichal Meloun /* --- dev/extres/syscon syscon_method_t interface --- */ 840050ea24SMichal Meloun static int 850050ea24SMichal Meloun ti_scm_syscon_write_4(struct syscon *syscon, bus_size_t offset, uint32_t val) 860050ea24SMichal Meloun { 870050ea24SMichal Meloun struct ti_scm_syscon_softc *sc; 880050ea24SMichal Meloun 890050ea24SMichal Meloun sc = device_get_softc(syscon->pdev); 900050ea24SMichal Meloun DPRINTF(sc->dev, "offset=%lx write %x\n", offset, val); 910050ea24SMichal Meloun mtx_lock(&sc->mtx); 920050ea24SMichal Meloun bus_space_write_4(sc->bst, sc->bsh, offset, val); 930050ea24SMichal Meloun mtx_unlock(&sc->mtx); 940050ea24SMichal Meloun return (0); 950050ea24SMichal Meloun } 960050ea24SMichal Meloun 970050ea24SMichal Meloun static uint32_t 980050ea24SMichal Meloun ti_scm_syscon_read_4(struct syscon *syscon, bus_size_t offset) 990050ea24SMichal Meloun { 1000050ea24SMichal Meloun struct ti_scm_syscon_softc *sc; 1010050ea24SMichal Meloun uint32_t val; 1020050ea24SMichal Meloun 1030050ea24SMichal Meloun sc = device_get_softc(syscon->pdev); 1040050ea24SMichal Meloun 1050050ea24SMichal Meloun mtx_lock(&sc->mtx); 1060050ea24SMichal Meloun val = bus_space_read_4(sc->bst, sc->bsh, offset); 1070050ea24SMichal Meloun mtx_unlock(&sc->mtx); 1080050ea24SMichal Meloun DPRINTF(sc->dev, "offset=%lx Read %x\n", offset, val); 1090050ea24SMichal Meloun return (val); 1100050ea24SMichal Meloun } 1110050ea24SMichal Meloun static int 1120050ea24SMichal Meloun ti_scm_syscon_modify_4(struct syscon *syscon, bus_size_t offset, uint32_t clr, uint32_t set) 1130050ea24SMichal Meloun { 1140050ea24SMichal Meloun struct ti_scm_syscon_softc *sc; 1150050ea24SMichal Meloun uint32_t reg; 1160050ea24SMichal Meloun 1170050ea24SMichal Meloun sc = device_get_softc(syscon->pdev); 1180050ea24SMichal Meloun 1190050ea24SMichal Meloun mtx_lock(&sc->mtx); 1200050ea24SMichal Meloun reg = bus_space_read_4(sc->bst, sc->bsh, offset); 1210050ea24SMichal Meloun reg &= ~clr; 1220050ea24SMichal Meloun reg |= set; 1230050ea24SMichal Meloun bus_space_write_4(sc->bst, sc->bsh, offset, reg); 1240050ea24SMichal Meloun mtx_unlock(&sc->mtx); 1250050ea24SMichal Meloun DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", offset, reg, clr, set); 1260050ea24SMichal Meloun 1270050ea24SMichal Meloun return (0); 1280050ea24SMichal Meloun } 1290050ea24SMichal Meloun 1300050ea24SMichal Meloun static syscon_method_t ti_scm_syscon_reg_methods[] = { 1310050ea24SMichal Meloun SYSCONMETHOD(syscon_read_4, ti_scm_syscon_read_4), 1320050ea24SMichal Meloun SYSCONMETHOD(syscon_write_4, ti_scm_syscon_write_4), 1330050ea24SMichal Meloun SYSCONMETHOD(syscon_modify_4, ti_scm_syscon_modify_4), 1340050ea24SMichal Meloun 1350050ea24SMichal Meloun SYSCONMETHOD_END 1360050ea24SMichal Meloun }; 1370050ea24SMichal Meloun 1380050ea24SMichal Meloun DEFINE_CLASS_1(ti_scm_syscon_reg, ti_scm_syscon_reg_class, ti_scm_syscon_reg_methods, 1390050ea24SMichal Meloun 0, syscon_class); 1400050ea24SMichal Meloun 1410050ea24SMichal Meloun /* device interface */ 1420050ea24SMichal Meloun static int 1430050ea24SMichal Meloun ti_scm_syscon_probe(device_t dev) 1440050ea24SMichal Meloun { 1450050ea24SMichal Meloun if (!ofw_bus_status_okay(dev)) 1460050ea24SMichal Meloun return (ENXIO); 1470050ea24SMichal Meloun 148ddd30dd8SIan Lepore if (!ti_soc_is_supported()) 149ddd30dd8SIan Lepore return (ENXIO); 150ddd30dd8SIan Lepore 1510050ea24SMichal Meloun if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 1520050ea24SMichal Meloun return (ENXIO); 1530050ea24SMichal Meloun 1540050ea24SMichal Meloun device_set_desc(dev, "TI OMAP Control Module Syscon"); 1550050ea24SMichal Meloun return(BUS_PROBE_DEFAULT); 1560050ea24SMichal Meloun } 1570050ea24SMichal Meloun 1580050ea24SMichal Meloun static int 1590050ea24SMichal Meloun ti_scm_syscon_attach(device_t dev) 1600050ea24SMichal Meloun { 1610050ea24SMichal Meloun struct ti_scm_syscon_softc *sc; 1620050ea24SMichal Meloun phandle_t node, child; 1630050ea24SMichal Meloun 1640050ea24SMichal Meloun sc = device_get_softc(dev); 1650050ea24SMichal Meloun sc->dev = dev; 1660050ea24SMichal Meloun 1670050ea24SMichal Meloun if (bus_alloc_resources(dev, ti_scm_syscon_res_spec, sc->res)) { 1680050ea24SMichal Meloun device_printf(sc->dev, "Cant allocate resources\n"); 1690050ea24SMichal Meloun return (ENXIO); 1700050ea24SMichal Meloun } 1710050ea24SMichal Meloun 1720050ea24SMichal Meloun sc->dev = dev; 1730050ea24SMichal Meloun sc->bst = rman_get_bustag(sc->res[0]); 1740050ea24SMichal Meloun sc->bsh = rman_get_bushandle(sc->res[0]); 1750050ea24SMichal Meloun 1760050ea24SMichal Meloun mtx_init(&sc->mtx, device_get_nameunit(sc->dev), NULL, MTX_DEF); 1770050ea24SMichal Meloun node = ofw_bus_get_node(sc->dev); 1780050ea24SMichal Meloun 1790050ea24SMichal Meloun /* dev/extres/syscon interface */ 1800050ea24SMichal Meloun sc->syscon = syscon_create_ofw_node(dev, &ti_scm_syscon_reg_class, node); 1810050ea24SMichal Meloun if (sc->syscon == NULL) { 1820050ea24SMichal Meloun device_printf(dev, "Failed to create/register syscon\n"); 1830050ea24SMichal Meloun return (ENXIO); 1840050ea24SMichal Meloun } 1850050ea24SMichal Meloun 1860050ea24SMichal Meloun simplebus_init(sc->dev, node); 1870050ea24SMichal Meloun 188*723da5d9SJohn Baldwin bus_identify_children(sc->dev); 1890050ea24SMichal Meloun for (child = OF_child(node); child != 0; child = OF_peer(child)) { 1900050ea24SMichal Meloun simplebus_add_device(sc->dev, child, 0, NULL, -1, NULL); 1910050ea24SMichal Meloun } 1920050ea24SMichal Meloun 1930050ea24SMichal Meloun return (bus_generic_attach(sc->dev)); 1940050ea24SMichal Meloun } 1950050ea24SMichal Meloun 1960050ea24SMichal Meloun /* syscon interface */ 1970050ea24SMichal Meloun static int 1980050ea24SMichal Meloun ti_scm_syscon_get_handle(device_t dev, struct syscon **syscon) 1990050ea24SMichal Meloun { 2000050ea24SMichal Meloun struct ti_scm_syscon_softc *sc; 2010050ea24SMichal Meloun 2020050ea24SMichal Meloun sc = device_get_softc(dev); 2030050ea24SMichal Meloun *syscon = sc->syscon; 2040050ea24SMichal Meloun if (*syscon == NULL) 2050050ea24SMichal Meloun return (ENODEV); 2060050ea24SMichal Meloun return (0); 2070050ea24SMichal Meloun } 2080050ea24SMichal Meloun 2090050ea24SMichal Meloun /* clkdev interface */ 2100050ea24SMichal Meloun static int 2110050ea24SMichal Meloun ti_scm_syscon_clk_write_4(device_t dev, bus_addr_t addr, uint32_t val) 2120050ea24SMichal Meloun { 2130050ea24SMichal Meloun struct ti_scm_syscon_softc *sc; 2140050ea24SMichal Meloun 2150050ea24SMichal Meloun sc = device_get_softc(dev); 2160050ea24SMichal Meloun DPRINTF(sc->dev, "offset=%lx write %x\n", addr, val); 2170050ea24SMichal Meloun bus_space_write_4(sc->bst, sc->bsh, addr, val); 2180050ea24SMichal Meloun return (0); 2190050ea24SMichal Meloun } 2200050ea24SMichal Meloun 2210050ea24SMichal Meloun static int 2220050ea24SMichal Meloun ti_scm_syscon_clk_read_4(device_t dev, bus_addr_t addr, uint32_t *val) 2230050ea24SMichal Meloun { 2240050ea24SMichal Meloun struct ti_scm_syscon_softc *sc; 2250050ea24SMichal Meloun 2260050ea24SMichal Meloun sc = device_get_softc(dev); 2270050ea24SMichal Meloun 2280050ea24SMichal Meloun *val = bus_space_read_4(sc->bst, sc->bsh, addr); 2290050ea24SMichal Meloun DPRINTF(sc->dev, "offset=%lx Read %x\n", addr, *val); 2300050ea24SMichal Meloun return (0); 2310050ea24SMichal Meloun } 2320050ea24SMichal Meloun 2330050ea24SMichal Meloun static int 2340050ea24SMichal Meloun ti_scm_syscon_clk_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) 2350050ea24SMichal Meloun { 2360050ea24SMichal Meloun struct ti_scm_syscon_softc *sc; 2370050ea24SMichal Meloun uint32_t reg; 2380050ea24SMichal Meloun 2390050ea24SMichal Meloun sc = device_get_softc(dev); 2400050ea24SMichal Meloun 2410050ea24SMichal Meloun reg = bus_space_read_4(sc->bst, sc->bsh, addr); 2420050ea24SMichal Meloun reg &= ~clr; 2430050ea24SMichal Meloun reg |= set; 2440050ea24SMichal Meloun bus_space_write_4(sc->bst, sc->bsh, addr, reg); 2450050ea24SMichal Meloun DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", addr, reg, clr, set); 2460050ea24SMichal Meloun 2470050ea24SMichal Meloun return (0); 2480050ea24SMichal Meloun } 2490050ea24SMichal Meloun 2500050ea24SMichal Meloun static void 2510050ea24SMichal Meloun ti_scm_syscon_clk_device_lock(device_t dev) 2520050ea24SMichal Meloun { 2530050ea24SMichal Meloun struct ti_scm_syscon_softc *sc; 2540050ea24SMichal Meloun 2550050ea24SMichal Meloun sc = device_get_softc(dev); 2560050ea24SMichal Meloun mtx_lock(&sc->mtx); 2570050ea24SMichal Meloun } 2580050ea24SMichal Meloun 2590050ea24SMichal Meloun static void 2600050ea24SMichal Meloun ti_scm_syscon_clk_device_unlock(device_t dev) 2610050ea24SMichal Meloun { 2620050ea24SMichal Meloun struct ti_scm_syscon_softc *sc; 2630050ea24SMichal Meloun sc = device_get_softc(dev); 2640050ea24SMichal Meloun mtx_unlock(&sc->mtx); 2650050ea24SMichal Meloun } 2660050ea24SMichal Meloun 2670050ea24SMichal Meloun static device_method_t ti_scm_syscon_methods[] = { 2680050ea24SMichal Meloun DEVMETHOD(device_probe, ti_scm_syscon_probe), 2690050ea24SMichal Meloun DEVMETHOD(device_attach, ti_scm_syscon_attach), 2700050ea24SMichal Meloun 2710050ea24SMichal Meloun /* syscon interface */ 2720050ea24SMichal Meloun DEVMETHOD(syscon_get_handle, ti_scm_syscon_get_handle), 2730050ea24SMichal Meloun 2740050ea24SMichal Meloun /* clkdev interface */ 2750050ea24SMichal Meloun DEVMETHOD(clkdev_write_4, ti_scm_syscon_clk_write_4), 2760050ea24SMichal Meloun DEVMETHOD(clkdev_read_4, ti_scm_syscon_clk_read_4), 2770050ea24SMichal Meloun DEVMETHOD(clkdev_modify_4, ti_scm_syscon_clk_modify_4), 2780050ea24SMichal Meloun DEVMETHOD(clkdev_device_lock, ti_scm_syscon_clk_device_lock), 2790050ea24SMichal Meloun DEVMETHOD(clkdev_device_unlock, ti_scm_syscon_clk_device_unlock), 2800050ea24SMichal Meloun 2810050ea24SMichal Meloun DEVMETHOD_END 2820050ea24SMichal Meloun }; 2830050ea24SMichal Meloun 2840050ea24SMichal Meloun DEFINE_CLASS_1(ti_scm_syscon, ti_scm_syscon_driver, ti_scm_syscon_methods, 2850050ea24SMichal Meloun sizeof(struct ti_scm_syscon_softc), simplebus_driver); 2860050ea24SMichal Meloun 2878537e671SJohn Baldwin EARLY_DRIVER_MODULE(ti_scm_syscon, simplebus, ti_scm_syscon_driver, 0, 0, 2888537e671SJohn Baldwin BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 2890050ea24SMichal Meloun MODULE_VERSION(ti_scm_syscon, 1); 2900050ea24SMichal Meloun MODULE_DEPEND(ti_scm_syscon, ti_scm, 1, 1, 1); 291