1 /* 2 * Copyright (c) 2010 3 * Ben Gray <ben.r.gray@gmail.com>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Ben Gray. 17 * 4. The name of the company nor the name of the author may be used to 18 * endorse or promote products derived from this software without specific 19 * prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 30 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /** 34 * SCM - System Control Module 35 * 36 * Hopefully in the end this module will contain a bunch of utility functions 37 * for configuring and querying the general system control registers, but for 38 * now it only does pin(pad) multiplexing. 39 * 40 * This is different from the GPIO module in that it is used to configure the 41 * pins between modules not just GPIO input/output. 42 * 43 * This file contains the generic top level driver, however it relies on chip 44 * specific settings and therefore expects an array of ti_scm_padconf structs 45 * call ti_padconf_devmap to be located somewhere in the kernel. 46 * 47 */ 48 #include <sys/cdefs.h> 49 __FBSDID("$FreeBSD$"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/kernel.h> 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #include <sys/resource.h> 57 #include <sys/rman.h> 58 #include <sys/lock.h> 59 #include <sys/mutex.h> 60 61 #include <machine/bus.h> 62 #include <machine/cpu.h> 63 #include <machine/cpufunc.h> 64 #include <machine/frame.h> 65 #include <machine/resource.h> 66 67 #include <dev/fdt/fdt_common.h> 68 #include <dev/ofw/openfirm.h> 69 #include <dev/ofw/ofw_bus.h> 70 #include <dev/ofw/ofw_bus_subr.h> 71 72 #include "ti_scm.h" 73 74 static struct resource_spec ti_scm_res_spec[] = { 75 { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */ 76 { -1, 0 } 77 }; 78 79 static struct ti_scm_softc *ti_scm_sc; 80 81 #define ti_scm_read_2(sc, reg) \ 82 bus_space_read_2((sc)->sc_bst, (sc)->sc_bsh, (reg)) 83 #define ti_scm_write_2(sc, reg, val) \ 84 bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 85 #define ti_scm_read_4(sc, reg) \ 86 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 87 #define ti_scm_write_4(sc, reg, val) \ 88 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 89 90 91 /** 92 * ti_padconf_devmap - Array of pins, should be defined one per SoC 93 * 94 * This array is typically defined in one of the targeted *_scm_pinumx.c 95 * files and is specific to the given SoC platform. Each entry in the array 96 * corresponds to an individual pin. 97 */ 98 extern const struct ti_scm_device ti_scm_dev; 99 100 101 /** 102 * ti_scm_padconf_from_name - searches the list of pads and returns entry 103 * with matching ball name. 104 * @ballname: the name of the ball 105 * 106 * RETURNS: 107 * A pointer to the matching padconf or NULL if the ball wasn't found. 108 */ 109 static const struct ti_scm_padconf* 110 ti_scm_padconf_from_name(const char *ballname) 111 { 112 const struct ti_scm_padconf *padconf; 113 114 padconf = ti_scm_dev.padconf; 115 while (padconf->ballname != NULL) { 116 if (strcmp(ballname, padconf->ballname) == 0) 117 return(padconf); 118 padconf++; 119 } 120 121 return (NULL); 122 } 123 124 /** 125 * ti_scm_padconf_set_internal - sets the muxmode and state for a pad/pin 126 * @padconf: pointer to the pad structure 127 * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx" 128 * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? 129 * 130 * 131 * LOCKING: 132 * Internally locks it's own context. 133 * 134 * RETURNS: 135 * 0 on success. 136 * EINVAL if pin requested is outside valid range or already in use. 137 */ 138 static int 139 ti_scm_padconf_set_internal(struct ti_scm_softc *sc, 140 const struct ti_scm_padconf *padconf, 141 const char *muxmode, unsigned int state) 142 { 143 unsigned int mode; 144 uint16_t reg_val; 145 146 /* populate the new value for the PADCONF register */ 147 reg_val = (uint16_t)(state & ti_scm_dev.padconf_sate_mask); 148 149 /* find the new mode requested */ 150 for (mode = 0; mode < 8; mode++) { 151 if ((padconf->muxmodes[mode] != NULL) && 152 (strcmp(padconf->muxmodes[mode], muxmode) == 0)) { 153 break; 154 } 155 } 156 157 /* couldn't find the mux mode */ 158 if (mode >= 8) 159 return (EINVAL); 160 161 /* set the mux mode */ 162 reg_val |= (uint16_t)(mode & ti_scm_dev.padconf_muxmode_mask); 163 164 printf("setting internal %x for %s\n", reg_val, muxmode); 165 /* write the register value (16-bit writes) */ 166 ti_scm_write_2(sc, padconf->reg_off, reg_val); 167 168 return (0); 169 } 170 171 /** 172 * ti_scm_padconf_set - sets the muxmode and state for a pad/pin 173 * @padname: the name of the pad, i.e. "c12" 174 * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx" 175 * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? 176 * 177 * 178 * LOCKING: 179 * Internally locks it's own context. 180 * 181 * RETURNS: 182 * 0 on success. 183 * EINVAL if pin requested is outside valid range or already in use. 184 */ 185 int 186 ti_scm_padconf_set(const char *padname, const char *muxmode, unsigned int state) 187 { 188 const struct ti_scm_padconf *padconf; 189 190 if (!ti_scm_sc) 191 return (ENXIO); 192 193 /* find the pin in the devmap */ 194 padconf = ti_scm_padconf_from_name(padname); 195 if (padconf == NULL) 196 return (EINVAL); 197 198 return (ti_scm_padconf_set_internal(ti_scm_sc, padconf, muxmode, state)); 199 } 200 201 /** 202 * ti_scm_padconf_get - gets the muxmode and state for a pad/pin 203 * @padname: the name of the pad, i.e. "c12" 204 * @muxmode: upon return will contain the name of the muxmode of the pin 205 * @state: upon return will contain the state of the pad/pin 206 * 207 * 208 * LOCKING: 209 * Internally locks it's own context. 210 * 211 * RETURNS: 212 * 0 on success. 213 * EINVAL if pin requested is outside valid range or already in use. 214 */ 215 int 216 ti_scm_padconf_get(const char *padname, const char **muxmode, 217 unsigned int *state) 218 { 219 const struct ti_scm_padconf *padconf; 220 uint16_t reg_val; 221 222 if (!ti_scm_sc) 223 return (ENXIO); 224 225 /* find the pin in the devmap */ 226 padconf = ti_scm_padconf_from_name(padname); 227 if (padconf == NULL) 228 return (EINVAL); 229 230 /* read the register value (16-bit reads) */ 231 reg_val = ti_scm_read_2(ti_scm_sc, padconf->reg_off); 232 233 /* save the state */ 234 if (state) 235 *state = (reg_val & ti_scm_dev.padconf_sate_mask); 236 237 /* save the mode */ 238 if (muxmode) 239 *muxmode = padconf->muxmodes[(reg_val & ti_scm_dev.padconf_muxmode_mask)]; 240 241 return (0); 242 } 243 244 /** 245 * ti_scm_padconf_set_gpiomode - converts a pad to GPIO mode. 246 * @gpio: the GPIO pin number (0-195) 247 * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? 248 * 249 * 250 * 251 * LOCKING: 252 * Internally locks it's own context. 253 * 254 * RETURNS: 255 * 0 on success. 256 * EINVAL if pin requested is outside valid range or already in use. 257 */ 258 int 259 ti_scm_padconf_set_gpiomode(uint32_t gpio, unsigned int state) 260 { 261 const struct ti_scm_padconf *padconf; 262 uint16_t reg_val; 263 264 if (!ti_scm_sc) 265 return (ENXIO); 266 267 /* find the gpio pin in the padconf array */ 268 padconf = ti_scm_dev.padconf; 269 while (padconf->ballname != NULL) { 270 if (padconf->gpio_pin == gpio) 271 break; 272 padconf++; 273 } 274 if (padconf->ballname == NULL) 275 return (EINVAL); 276 277 /* populate the new value for the PADCONF register */ 278 reg_val = (uint16_t)(state & ti_scm_dev.padconf_sate_mask); 279 280 /* set the mux mode */ 281 reg_val |= (uint16_t)(padconf->gpio_mode & ti_scm_dev.padconf_muxmode_mask); 282 283 /* write the register value (16-bit writes) */ 284 ti_scm_write_2(ti_scm_sc, padconf->reg_off, reg_val); 285 286 return (0); 287 } 288 289 /** 290 * ti_scm_padconf_get_gpiomode - gets the current GPIO mode of the pin 291 * @gpio: the GPIO pin number (0-195) 292 * @state: upon return will contain the state 293 * 294 * 295 * 296 * LOCKING: 297 * Internally locks it's own context. 298 * 299 * RETURNS: 300 * 0 on success. 301 * EINVAL if pin requested is outside valid range or not configured as GPIO. 302 */ 303 int 304 ti_scm_padconf_get_gpiomode(uint32_t gpio, unsigned int *state) 305 { 306 const struct ti_scm_padconf *padconf; 307 uint16_t reg_val; 308 309 if (!ti_scm_sc) 310 return (ENXIO); 311 312 /* find the gpio pin in the padconf array */ 313 padconf = ti_scm_dev.padconf; 314 while (padconf->ballname != NULL) { 315 if (padconf->gpio_pin == gpio) 316 break; 317 padconf++; 318 } 319 if (padconf->ballname == NULL) 320 return (EINVAL); 321 322 /* read the current register settings */ 323 reg_val = ti_scm_read_2(ti_scm_sc, padconf->reg_off); 324 325 /* check to make sure the pins is configured as GPIO in the first state */ 326 if ((reg_val & ti_scm_dev.padconf_muxmode_mask) != padconf->gpio_mode) 327 return (EINVAL); 328 329 /* read and store the reset of the state, i.e. pull-up, pull-down, etc */ 330 if (state) 331 *state = (reg_val & ti_scm_dev.padconf_sate_mask); 332 333 return (0); 334 } 335 336 /** 337 * ti_scm_padconf_init_from_hints - processes the hints for padconf 338 * @sc: the driver soft context 339 * 340 * 341 * 342 * LOCKING: 343 * Internally locks it's own context. 344 * 345 * RETURNS: 346 * 0 on success. 347 * EINVAL if pin requested is outside valid range or already in use. 348 */ 349 static int 350 ti_scm_padconf_init_from_fdt(struct ti_scm_softc *sc) 351 { 352 const struct ti_scm_padconf *padconf; 353 const struct ti_scm_padstate *padstates; 354 int err; 355 phandle_t node; 356 int len; 357 char *fdt_pad_config; 358 int i; 359 char *padname, *muxname, *padstate; 360 361 node = ofw_bus_get_node(sc->sc_dev); 362 len = OF_getproplen(node, "scm-pad-config"); 363 OF_getprop_alloc(node, "scm-pad-config", 1, (void **)&fdt_pad_config); 364 365 i = len; 366 while (i > 0) { 367 padname = fdt_pad_config; 368 fdt_pad_config += strlen(padname) + 1; 369 i -= strlen(padname) + 1; 370 if (i <= 0) 371 break; 372 373 muxname = fdt_pad_config; 374 fdt_pad_config += strlen(muxname) + 1; 375 i -= strlen(muxname) + 1; 376 if (i <= 0) 377 break; 378 379 padstate = fdt_pad_config; 380 fdt_pad_config += strlen(padstate) + 1; 381 i -= strlen(padstate) + 1; 382 if (i < 0) 383 break; 384 385 padconf = ti_scm_dev.padconf; 386 387 while (padconf->ballname != NULL) { 388 if (strcmp(padconf->ballname, padname) == 0) { 389 padstates = ti_scm_dev.padstate; 390 err = 1; 391 while (padstates->state != NULL) { 392 if (strcmp(padstates->state, padstate) == 0) { 393 err = ti_scm_padconf_set_internal(sc, 394 padconf, muxname, padstates->reg); 395 } 396 padstates++; 397 } 398 if (err) 399 device_printf(sc->sc_dev, "err: failed to configure" 400 "pin \"%s\"\n", padconf->ballname); 401 } 402 padconf++; 403 } 404 } 405 return (0); 406 } 407 408 /* 409 * Device part of OMAP SCM driver 410 */ 411 412 static int 413 ti_scm_probe(device_t dev) 414 { 415 if (!ofw_bus_is_compatible(dev, "ti,scm")) 416 return (ENXIO); 417 418 device_set_desc(dev, "TI Control Module"); 419 return (BUS_PROBE_DEFAULT); 420 } 421 422 /** 423 * ti_scm_attach - attaches the timer to the simplebus 424 * @dev: new device 425 * 426 * Reserves memory and interrupt resources, stores the softc structure 427 * globally and registers both the timecount and eventtimer objects. 428 * 429 * RETURNS 430 * Zero on sucess or ENXIO if an error occuried. 431 */ 432 static int 433 ti_scm_attach(device_t dev) 434 { 435 struct ti_scm_softc *sc = device_get_softc(dev); 436 437 if (ti_scm_sc) 438 return (ENXIO); 439 440 sc->sc_dev = dev; 441 442 if (bus_alloc_resources(dev, ti_scm_res_spec, sc->sc_res)) { 443 device_printf(dev, "could not allocate resources\n"); 444 return (ENXIO); 445 } 446 447 /* Global timer interface */ 448 sc->sc_bst = rman_get_bustag(sc->sc_res[0]); 449 sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]); 450 451 ti_scm_sc = sc; 452 453 ti_scm_padconf_init_from_fdt(sc); 454 455 return (0); 456 } 457 458 int 459 ti_scm_reg_read_4(uint32_t reg, uint32_t *val) 460 { 461 if (!ti_scm_sc) 462 return (ENXIO); 463 464 *val = ti_scm_read_4(ti_scm_sc, reg); 465 return (0); 466 } 467 468 int 469 ti_scm_reg_write_4(uint32_t reg, uint32_t val) 470 { 471 if (!ti_scm_sc) 472 return (ENXIO); 473 474 ti_scm_write_4(ti_scm_sc, reg, val); 475 return (0); 476 } 477 478 479 static device_method_t ti_scm_methods[] = { 480 DEVMETHOD(device_probe, ti_scm_probe), 481 DEVMETHOD(device_attach, ti_scm_attach), 482 { 0, 0 } 483 }; 484 485 static driver_t ti_scm_driver = { 486 "ti_scm", 487 ti_scm_methods, 488 sizeof(struct ti_scm_softc), 489 }; 490 491 static devclass_t ti_scm_devclass; 492 493 DRIVER_MODULE(ti_scm, simplebus, ti_scm_driver, ti_scm_devclass, 0, 0); 494