1 /* 2 * Copyright (c) 2010 3 * Ben Gray <ben.r.gray@gmail.com>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Ben Gray. 17 * 4. The name of the company nor the name of the author may be used to 18 * endorse or promote products derived from this software without specific 19 * prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 30 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /** 34 * SCM - System Control Module 35 * 36 * Hopefully in the end this module will contain a bunch of utility functions 37 * for configuring and querying the general system control registers, but for 38 * now it only does pin(pad) multiplexing. 39 * 40 * This is different from the GPIO module in that it is used to configure the 41 * pins between modules not just GPIO input/output. 42 * 43 * This file contains the generic top level driver, however it relies on chip 44 * specific settings and therefore expects an array of ti_scm_padconf structs 45 * call ti_padconf_devmap to be located somewhere in the kernel. 46 * 47 */ 48 #include <sys/cdefs.h> 49 __FBSDID("$FreeBSD$"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/kernel.h> 54 #include <sys/module.h> 55 #include <sys/bus.h> 56 #include <sys/resource.h> 57 #include <sys/rman.h> 58 #include <sys/lock.h> 59 #include <sys/mutex.h> 60 61 #include <machine/bus.h> 62 #include <machine/cpu.h> 63 #include <machine/cpufunc.h> 64 #include <machine/frame.h> 65 #include <machine/resource.h> 66 67 #include <dev/fdt/fdt_common.h> 68 #include <dev/ofw/openfirm.h> 69 #include <dev/ofw/ofw_bus.h> 70 #include <dev/ofw/ofw_bus_subr.h> 71 72 #include "ti_scm.h" 73 74 static struct resource_spec ti_scm_res_spec[] = { 75 { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */ 76 { -1, 0 } 77 }; 78 79 static struct ti_scm_softc *ti_scm_sc; 80 81 #define ti_scm_read_2(sc, reg) \ 82 bus_space_read_2((sc)->sc_bst, (sc)->sc_bsh, (reg)) 83 #define ti_scm_write_2(sc, reg, val) \ 84 bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 85 #define ti_scm_read_4(sc, reg) \ 86 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 87 #define ti_scm_write_4(sc, reg, val) \ 88 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 89 90 91 /** 92 * ti_padconf_devmap - Array of pins, should be defined one per SoC 93 * 94 * This array is typically defined in one of the targeted *_scm_pinumx.c 95 * files and is specific to the given SoC platform. Each entry in the array 96 * corresponds to an individual pin. 97 */ 98 extern const struct ti_scm_device ti_scm_dev; 99 100 101 /** 102 * ti_scm_padconf_from_name - searches the list of pads and returns entry 103 * with matching ball name. 104 * @ballname: the name of the ball 105 * 106 * RETURNS: 107 * A pointer to the matching padconf or NULL if the ball wasn't found. 108 */ 109 static const struct ti_scm_padconf* 110 ti_scm_padconf_from_name(const char *ballname) 111 { 112 const struct ti_scm_padconf *padconf; 113 114 padconf = ti_scm_dev.padconf; 115 while (padconf->ballname != NULL) { 116 if (strcmp(ballname, padconf->ballname) == 0) 117 return(padconf); 118 padconf++; 119 } 120 121 return (NULL); 122 } 123 124 /** 125 * ti_scm_padconf_set_internal - sets the muxmode and state for a pad/pin 126 * @padconf: pointer to the pad structure 127 * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx" 128 * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? 129 * 130 * 131 * LOCKING: 132 * Internally locks it's own context. 133 * 134 * RETURNS: 135 * 0 on success. 136 * EINVAL if pin requested is outside valid range or already in use. 137 */ 138 static int 139 ti_scm_padconf_set_internal(struct ti_scm_softc *sc, 140 const struct ti_scm_padconf *padconf, 141 const char *muxmode, unsigned int state) 142 { 143 unsigned int mode; 144 uint16_t reg_val; 145 146 /* populate the new value for the PADCONF register */ 147 reg_val = (uint16_t)(state & ti_scm_dev.padconf_sate_mask); 148 149 /* find the new mode requested */ 150 for (mode = 0; mode < 8; mode++) { 151 if ((padconf->muxmodes[mode] != NULL) && 152 (strcmp(padconf->muxmodes[mode], muxmode) == 0)) { 153 break; 154 } 155 } 156 157 /* couldn't find the mux mode */ 158 if (mode >= 8) { 159 printf("Invalid mode \"%s\"\n", muxmode); 160 return (EINVAL); 161 } 162 163 /* set the mux mode */ 164 reg_val |= (uint16_t)(mode & ti_scm_dev.padconf_muxmode_mask); 165 166 printf("setting internal %x for %s\n", reg_val, muxmode); 167 /* write the register value (16-bit writes) */ 168 ti_scm_write_2(sc, padconf->reg_off, reg_val); 169 170 return (0); 171 } 172 173 /** 174 * ti_scm_padconf_set - sets the muxmode and state for a pad/pin 175 * @padname: the name of the pad, i.e. "c12" 176 * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx" 177 * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? 178 * 179 * 180 * LOCKING: 181 * Internally locks it's own context. 182 * 183 * RETURNS: 184 * 0 on success. 185 * EINVAL if pin requested is outside valid range or already in use. 186 */ 187 int 188 ti_scm_padconf_set(const char *padname, const char *muxmode, unsigned int state) 189 { 190 const struct ti_scm_padconf *padconf; 191 192 if (!ti_scm_sc) 193 return (ENXIO); 194 195 /* find the pin in the devmap */ 196 padconf = ti_scm_padconf_from_name(padname); 197 if (padconf == NULL) 198 return (EINVAL); 199 200 return (ti_scm_padconf_set_internal(ti_scm_sc, padconf, muxmode, state)); 201 } 202 203 /** 204 * ti_scm_padconf_get - gets the muxmode and state for a pad/pin 205 * @padname: the name of the pad, i.e. "c12" 206 * @muxmode: upon return will contain the name of the muxmode of the pin 207 * @state: upon return will contain the state of the pad/pin 208 * 209 * 210 * LOCKING: 211 * Internally locks it's own context. 212 * 213 * RETURNS: 214 * 0 on success. 215 * EINVAL if pin requested is outside valid range or already in use. 216 */ 217 int 218 ti_scm_padconf_get(const char *padname, const char **muxmode, 219 unsigned int *state) 220 { 221 const struct ti_scm_padconf *padconf; 222 uint16_t reg_val; 223 224 if (!ti_scm_sc) 225 return (ENXIO); 226 227 /* find the pin in the devmap */ 228 padconf = ti_scm_padconf_from_name(padname); 229 if (padconf == NULL) 230 return (EINVAL); 231 232 /* read the register value (16-bit reads) */ 233 reg_val = ti_scm_read_2(ti_scm_sc, padconf->reg_off); 234 235 /* save the state */ 236 if (state) 237 *state = (reg_val & ti_scm_dev.padconf_sate_mask); 238 239 /* save the mode */ 240 if (muxmode) 241 *muxmode = padconf->muxmodes[(reg_val & ti_scm_dev.padconf_muxmode_mask)]; 242 243 return (0); 244 } 245 246 /** 247 * ti_scm_padconf_set_gpiomode - converts a pad to GPIO mode. 248 * @gpio: the GPIO pin number (0-195) 249 * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? 250 * 251 * 252 * 253 * LOCKING: 254 * Internally locks it's own context. 255 * 256 * RETURNS: 257 * 0 on success. 258 * EINVAL if pin requested is outside valid range or already in use. 259 */ 260 int 261 ti_scm_padconf_set_gpiomode(uint32_t gpio, unsigned int state) 262 { 263 const struct ti_scm_padconf *padconf; 264 uint16_t reg_val; 265 266 if (!ti_scm_sc) 267 return (ENXIO); 268 269 /* find the gpio pin in the padconf array */ 270 padconf = ti_scm_dev.padconf; 271 while (padconf->ballname != NULL) { 272 if (padconf->gpio_pin == gpio) 273 break; 274 padconf++; 275 } 276 if (padconf->ballname == NULL) 277 return (EINVAL); 278 279 /* populate the new value for the PADCONF register */ 280 reg_val = (uint16_t)(state & ti_scm_dev.padconf_sate_mask); 281 282 /* set the mux mode */ 283 reg_val |= (uint16_t)(padconf->gpio_mode & ti_scm_dev.padconf_muxmode_mask); 284 285 /* write the register value (16-bit writes) */ 286 ti_scm_write_2(ti_scm_sc, padconf->reg_off, reg_val); 287 288 return (0); 289 } 290 291 /** 292 * ti_scm_padconf_get_gpiomode - gets the current GPIO mode of the pin 293 * @gpio: the GPIO pin number (0-195) 294 * @state: upon return will contain the state 295 * 296 * 297 * 298 * LOCKING: 299 * Internally locks it's own context. 300 * 301 * RETURNS: 302 * 0 on success. 303 * EINVAL if pin requested is outside valid range or not configured as GPIO. 304 */ 305 int 306 ti_scm_padconf_get_gpiomode(uint32_t gpio, unsigned int *state) 307 { 308 const struct ti_scm_padconf *padconf; 309 uint16_t reg_val; 310 311 if (!ti_scm_sc) 312 return (ENXIO); 313 314 /* find the gpio pin in the padconf array */ 315 padconf = ti_scm_dev.padconf; 316 while (padconf->ballname != NULL) { 317 if (padconf->gpio_pin == gpio) 318 break; 319 padconf++; 320 } 321 if (padconf->ballname == NULL) 322 return (EINVAL); 323 324 /* read the current register settings */ 325 reg_val = ti_scm_read_2(ti_scm_sc, padconf->reg_off); 326 327 /* check to make sure the pins is configured as GPIO in the first state */ 328 if ((reg_val & ti_scm_dev.padconf_muxmode_mask) != padconf->gpio_mode) 329 return (EINVAL); 330 331 /* read and store the reset of the state, i.e. pull-up, pull-down, etc */ 332 if (state) 333 *state = (reg_val & ti_scm_dev.padconf_sate_mask); 334 335 return (0); 336 } 337 338 /** 339 * ti_scm_padconf_init_from_hints - processes the hints for padconf 340 * @sc: the driver soft context 341 * 342 * 343 * 344 * LOCKING: 345 * Internally locks it's own context. 346 * 347 * RETURNS: 348 * 0 on success. 349 * EINVAL if pin requested is outside valid range or already in use. 350 */ 351 static int 352 ti_scm_padconf_init_from_fdt(struct ti_scm_softc *sc) 353 { 354 const struct ti_scm_padconf *padconf; 355 const struct ti_scm_padstate *padstates; 356 int err; 357 phandle_t node; 358 int len; 359 char *fdt_pad_config; 360 int i; 361 char *padname, *muxname, *padstate; 362 363 node = ofw_bus_get_node(sc->sc_dev); 364 len = OF_getproplen(node, "scm-pad-config"); 365 OF_getprop_alloc(node, "scm-pad-config", 1, (void **)&fdt_pad_config); 366 367 i = len; 368 while (i > 0) { 369 padname = fdt_pad_config; 370 fdt_pad_config += strlen(padname) + 1; 371 i -= strlen(padname) + 1; 372 if (i <= 0) 373 break; 374 375 muxname = fdt_pad_config; 376 fdt_pad_config += strlen(muxname) + 1; 377 i -= strlen(muxname) + 1; 378 if (i <= 0) 379 break; 380 381 padstate = fdt_pad_config; 382 fdt_pad_config += strlen(padstate) + 1; 383 i -= strlen(padstate) + 1; 384 if (i < 0) 385 break; 386 387 padconf = ti_scm_dev.padconf; 388 389 while (padconf->ballname != NULL) { 390 if (strcmp(padconf->ballname, padname) == 0) { 391 padstates = ti_scm_dev.padstate; 392 err = 1; 393 while (padstates->state != NULL) { 394 if (strcmp(padstates->state, padstate) == 0) { 395 err = ti_scm_padconf_set_internal(sc, 396 padconf, muxname, padstates->reg); 397 } 398 padstates++; 399 } 400 if (err) 401 device_printf(sc->sc_dev, 402 "err: failed to configure " 403 "pin \"%s\" as \"%s\"\n", 404 padconf->ballname, 405 muxname); 406 } 407 padconf++; 408 } 409 } 410 return (0); 411 } 412 413 /* 414 * Device part of OMAP SCM driver 415 */ 416 417 static int 418 ti_scm_probe(device_t dev) 419 { 420 if (!ofw_bus_is_compatible(dev, "ti,scm")) 421 return (ENXIO); 422 423 device_set_desc(dev, "TI Control Module"); 424 return (BUS_PROBE_DEFAULT); 425 } 426 427 /** 428 * ti_scm_attach - attaches the timer to the simplebus 429 * @dev: new device 430 * 431 * Reserves memory and interrupt resources, stores the softc structure 432 * globally and registers both the timecount and eventtimer objects. 433 * 434 * RETURNS 435 * Zero on sucess or ENXIO if an error occuried. 436 */ 437 static int 438 ti_scm_attach(device_t dev) 439 { 440 struct ti_scm_softc *sc = device_get_softc(dev); 441 442 if (ti_scm_sc) 443 return (ENXIO); 444 445 sc->sc_dev = dev; 446 447 if (bus_alloc_resources(dev, ti_scm_res_spec, sc->sc_res)) { 448 device_printf(dev, "could not allocate resources\n"); 449 return (ENXIO); 450 } 451 452 /* Global timer interface */ 453 sc->sc_bst = rman_get_bustag(sc->sc_res[0]); 454 sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]); 455 456 ti_scm_sc = sc; 457 458 ti_scm_padconf_init_from_fdt(sc); 459 460 return (0); 461 } 462 463 int 464 ti_scm_reg_read_4(uint32_t reg, uint32_t *val) 465 { 466 if (!ti_scm_sc) 467 return (ENXIO); 468 469 *val = ti_scm_read_4(ti_scm_sc, reg); 470 return (0); 471 } 472 473 int 474 ti_scm_reg_write_4(uint32_t reg, uint32_t val) 475 { 476 if (!ti_scm_sc) 477 return (ENXIO); 478 479 ti_scm_write_4(ti_scm_sc, reg, val); 480 return (0); 481 } 482 483 484 static device_method_t ti_scm_methods[] = { 485 DEVMETHOD(device_probe, ti_scm_probe), 486 DEVMETHOD(device_attach, ti_scm_attach), 487 { 0, 0 } 488 }; 489 490 static driver_t ti_scm_driver = { 491 "ti_scm", 492 ti_scm_methods, 493 sizeof(struct ti_scm_softc), 494 }; 495 496 static devclass_t ti_scm_devclass; 497 498 DRIVER_MODULE(ti_scm, simplebus, ti_scm_driver, ti_scm_devclass, 0, 0); 499