xref: /freebsd/sys/arm/ti/ti_prcm.c (revision d0b2dbfa0ecf2bbc9709efc5e20baf8e4b44bbbf)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
5  * All rights reserved.
6  *
7  * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
24  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  */
30 
31 /* Based on sys/arm/ti/am335x/am335x_prcm.c */
32 
33 #include <sys/cdefs.h>
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/malloc.h>
40 #include <sys/rman.h>
41 #include <sys/timeet.h>
42 #include <sys/timetc.h>
43 #include <sys/watchdog.h>
44 #include <machine/bus.h>
45 #include <machine/cpu.h>
46 #include <machine/intr.h>
47 
48 #include <arm/ti/ti_cpuid.h>
49 #include <arm/ti/ti_prcm.h>
50 #include <arm/ti/tivar.h>
51 
52 #include <dev/fdt/simplebus.h>
53 
54 #include <dev/ofw/openfirm.h>
55 #include <dev/ofw/ofw_bus.h>
56 #include <dev/ofw/ofw_bus_subr.h>
57 
58 #include "clkdev_if.h"
59 
60 #if 0
61 #define DPRINTF(dev, msg...) device_printf(dev, msg)
62 #else
63 #define DPRINTF(dev, msg...)
64 #endif
65 
66 struct ti_prcm_softc {
67 	struct simplebus_softc  sc_simplebus;
68 	device_t		dev;
69 	struct resource *	mem_res;
70 	bus_space_tag_t		bst;
71 	bus_space_handle_t	bsh;
72 	int			attach_done;
73 	struct mtx		mtx;
74 };
75 
76 static struct ti_prcm_softc *ti_prcm_sc = NULL;
77 static void omap4_prcm_reset(void);
78 static void am335x_prcm_reset(void);
79 
80 #define TI_AM3_PRCM		18
81 #define TI_AM4_PRCM		17
82 #define TI_OMAP2_PRCM		16
83 #define TI_OMAP3_PRM		15
84 #define TI_OMAP3_CM		14
85 #define TI_OMAP4_CM1		13
86 #define TI_OMAP4_PRM		12
87 #define TI_OMAP4_CM2		11
88 #define TI_OMAP4_SCRM		10
89 #define TI_OMAP5_PRM		9
90 #define TI_OMAP5_CM_CORE_AON	8
91 #define TI_OMAP5_SCRM		7
92 #define TI_OMAP5_CM_CORE	6
93 #define TI_DRA7_PRM		5
94 #define TI_DRA7_CM_CORE_AON	4
95 #define TI_DRA7_CM_CORE		3
96 #define TI_DM814_PRCM		2
97 #define TI_DM816_PRCM		1
98 #define TI_PRCM_END		0
99 
100 static struct ofw_compat_data compat_data[] = {
101 	{ "ti,am3-prcm",		TI_AM3_PRCM },
102 	{ "ti,am4-prcm",		TI_AM4_PRCM },
103 	{ "ti,omap2-prcm",		TI_OMAP2_PRCM },
104 	{ "ti,omap3-prm",		TI_OMAP3_PRM },
105 	{ "ti,omap3-cm",		TI_OMAP3_CM },
106 	{ "ti,omap4-cm1",		TI_OMAP4_CM1 },
107 	{ "ti,omap4-prm",		TI_OMAP4_PRM },
108 	{ "ti,omap4-cm2",		TI_OMAP4_CM2 },
109 	{ "ti,omap4-scrm",		TI_OMAP4_SCRM },
110 	{ "ti,omap5-prm",		TI_OMAP5_PRM },
111 	{ "ti,omap5-cm-core-aon",	TI_OMAP5_CM_CORE_AON },
112 	{ "ti,omap5-scrm",		TI_OMAP5_SCRM },
113 	{ "ti,omap5-cm-core",		TI_OMAP5_CM_CORE },
114 	{ "ti,dra7-prm",		TI_DRA7_PRM },
115 	{ "ti,dra7-cm-core-aon",	TI_DRA7_CM_CORE_AON },
116 	{ "ti,dra7-cm-core",		TI_DRA7_CM_CORE },
117 	{ "ti,dm814-prcm",		TI_DM814_PRCM },
118 	{ "ti,dm816-prcm",		TI_DM816_PRCM },
119 	{ NULL,				TI_PRCM_END}
120 };
121 
122 static int
123 ti_prcm_probe(device_t dev)
124 {
125 	if (!ofw_bus_status_okay(dev))
126 		return (ENXIO);
127 
128 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) {
129 		return (ENXIO);
130 	}
131 
132 	device_set_desc(dev, "TI Power and Clock Management");
133 	return(BUS_PROBE_DEFAULT);
134 }
135 
136 static int
137 ti_prcm_attach(device_t dev)
138 {
139 	struct ti_prcm_softc *sc;
140 	phandle_t node, child;
141 	int rid;
142 
143 	sc = device_get_softc(dev);
144 	sc->dev = dev;
145 
146 	node = ofw_bus_get_node(sc->dev);
147 	simplebus_init(sc->dev, node);
148 
149 	if (simplebus_fill_ranges(node, &sc->sc_simplebus) < 0) {
150 		device_printf(sc->dev, "could not get ranges\n");
151 		return (ENXIO);
152 	}
153 	if (sc->sc_simplebus.nranges == 0) {
154 		device_printf(sc->dev, "nranges == 0\n");
155 		return (ENXIO);
156 	}
157 
158 	sc->mem_res = bus_alloc_resource(sc->dev, SYS_RES_MEMORY, &rid,
159 		sc->sc_simplebus.ranges[0].host,
160 		(sc->sc_simplebus.ranges[0].host +
161 			sc->sc_simplebus.ranges[0].size - 1),
162 		sc->sc_simplebus.ranges[0].size,
163 		RF_ACTIVE | RF_SHAREABLE);
164 
165 	if (sc->mem_res == NULL) {
166 		return (ENXIO);
167 	}
168 
169 	sc->bst = rman_get_bustag(sc->mem_res);
170 	sc->bsh = rman_get_bushandle(sc->mem_res);
171 
172 	mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
173 
174 	/* Fixme: for xxx_prcm_reset functions.
175 	 * Get rid of global variables?
176 	 */
177 	ti_prcm_sc = sc;
178 
179 	switch(ti_chip()) {
180 #ifdef SOC_OMAP4
181 	case CHIP_OMAP_4:
182 		ti_cpu_reset = omap4_prcm_reset;
183 		break;
184 #endif
185 #ifdef SOC_TI_AM335X
186 	case CHIP_AM335X:
187 		ti_cpu_reset = am335x_prcm_reset;
188 		break;
189 #endif
190 	}
191 
192 	bus_generic_probe(sc->dev);
193 	for (child = OF_child(node); child != 0; child = OF_peer(child)) {
194 		simplebus_add_device(dev, child, 0, NULL, -1, NULL);
195 	}
196 
197 	return (bus_generic_attach(sc->dev));
198 }
199 
200 int
201 ti_prcm_write_4(device_t dev, bus_addr_t addr, uint32_t val)
202 {
203 	struct ti_prcm_softc *sc;
204 
205 	sc = device_get_softc(dev);
206 	DPRINTF(sc->dev, "offset=%lx write %x\n", addr, val);
207 	bus_space_write_4(sc->bst, sc->bsh, addr, val);
208 	return (0);
209 }
210 int
211 ti_prcm_read_4(device_t dev, bus_addr_t addr, uint32_t *val)
212 {
213 	struct ti_prcm_softc *sc;
214 
215 	sc = device_get_softc(dev);
216 
217 	*val = bus_space_read_4(sc->bst, sc->bsh, addr);
218 	DPRINTF(sc->dev, "offset=%lx Read %x\n", addr, *val);
219 	return (0);
220 }
221 
222 int
223 ti_prcm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set)
224 {
225 	struct ti_prcm_softc *sc;
226 	uint32_t reg;
227 
228 	sc = device_get_softc(dev);
229 
230 	reg = bus_space_read_4(sc->bst, sc->bsh, addr);
231 	reg &= ~clr;
232 	reg |= set;
233 	bus_space_write_4(sc->bst, sc->bsh, addr, reg);
234 	DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", addr, reg, clr, set);
235 
236 	return (0);
237 }
238 
239 void
240 ti_prcm_device_lock(device_t dev)
241 {
242 	struct ti_prcm_softc *sc;
243 
244 	sc = device_get_softc(dev);
245 	mtx_lock(&sc->mtx);
246 }
247 
248 void
249 ti_prcm_device_unlock(device_t dev)
250 {
251 	struct ti_prcm_softc *sc;
252 
253 	sc = device_get_softc(dev);
254 	mtx_unlock(&sc->mtx);
255 }
256 
257 static device_method_t ti_prcm_methods[] = {
258 	DEVMETHOD(device_probe,		ti_prcm_probe),
259 	DEVMETHOD(device_attach,	ti_prcm_attach),
260 
261 	/* clkdev interface */
262 	DEVMETHOD(clkdev_write_4,	ti_prcm_write_4),
263 	DEVMETHOD(clkdev_read_4,	ti_prcm_read_4),
264 	DEVMETHOD(clkdev_modify_4,	ti_prcm_modify_4),
265 	DEVMETHOD(clkdev_device_lock,	ti_prcm_device_lock),
266 	DEVMETHOD(clkdev_device_unlock, ti_prcm_device_unlock),
267 
268 	DEVMETHOD_END
269 };
270 
271 DEFINE_CLASS_1(ti_prcm, ti_prcm_driver, ti_prcm_methods,
272     sizeof(struct ti_prcm_softc), simplebus_driver);
273 
274 EARLY_DRIVER_MODULE(ti_prcm, ofwbus, ti_prcm_driver, 0, 0, BUS_PASS_BUS);
275 EARLY_DRIVER_MODULE(ti_prcm, simplebus, ti_prcm_driver, 0, 0,
276     BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
277 MODULE_VERSION(ti_prcm, 1);
278 MODULE_DEPEND(ti_prcm, ti_scm, 1, 1, 1);
279 
280 /* From sys/arm/ti/am335x/am335x_prcm.c
281  * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
282  */
283 #define PRM_DEVICE_OFFSET		0xF00
284 #define AM335x_PRM_RSTCTRL		(PRM_DEVICE_OFFSET + 0x00)
285 
286 static void
287 am335x_prcm_reset(void)
288 {
289 	ti_prcm_write_4(ti_prcm_sc->dev, AM335x_PRM_RSTCTRL, (1<<1));
290 }
291 
292 /* FIXME: Is this correct - or should the license part be ontop? */
293 
294 /* From sys/arm/ti/omap4/omap4_prcm_clks.c */
295 /*-
296  * SPDX-License-Identifier: BSD-3-Clause
297  *
298  * Copyright (c) 2011
299  *      Ben Gray <ben.r.gray@gmail.com>.
300  * All rights reserved.
301  *
302  * Redistribution and use in source and binary forms, with or without
303  * modification, are permitted provided that the following conditions
304  * are met:
305  * 1. Redistributions of source code must retain the above copyright
306  *    notice, this list of conditions and the following disclaimer.
307  * 2. Redistributions in binary form must reproduce the above copyright
308  *    notice, this list of conditions and the following disclaimer in the
309  *    documentation and/or other materials provided with the distribution.
310  * 3. The name of the company nor the name of the author may be used to
311  *    endorse or promote products derived from this software without specific
312  *    prior written permission.
313  *
314  * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR
315  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
316  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
317  * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
318  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
319  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
320  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
321  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
322  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
323  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
324  */
325 #define PRM_RSTCTRL		0x1b00
326 #define PRM_RSTCTRL_RESET	0x2
327 
328 static void
329 omap4_prcm_reset(void)
330 {
331 	uint32_t reg;
332 
333 	ti_prcm_read_4(ti_prcm_sc->dev, PRM_RSTCTRL, &reg);
334 	reg = reg | PRM_RSTCTRL_RESET;
335 	ti_prcm_write_4(ti_prcm_sc->dev, PRM_RSTCTRL, reg);
336 	ti_prcm_read_4(ti_prcm_sc->dev, PRM_RSTCTRL, &reg);
337 }
338