xref: /freebsd/sys/arm/ti/ti_cpuid.c (revision f0cfa1b168014f56c02b83e5f28412cc5f78d117)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2011
5  *	Ben Gray <ben.r.gray@gmail.com>.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/bus.h>
38 #include <sys/resource.h>
39 #include <sys/rman.h>
40 #include <sys/lock.h>
41 #include <sys/mutex.h>
42 
43 #include <machine/bus.h>
44 #include <machine/fdt.h>
45 #include <machine/resource.h>
46 #include <machine/intr.h>
47 
48 #include <dev/fdt/simplebus.h>
49 #include <dev/fdt/fdt_common.h>
50 #include <dev/ofw/ofw_bus_subr.h>
51 
52 #include <arm/ti/tivar.h>
53 #include <arm/ti/ti_cpuid.h>
54 
55 #include <arm/ti/omap4/omap4_reg.h>
56 #include <arm/ti/am335x/am335x_reg.h>
57 
58 #define OMAP4_STD_FUSE_DIE_ID_0    0x2200
59 #define OMAP4_ID_CODE              0x2204
60 #define OMAP4_STD_FUSE_DIE_ID_1    0x2208
61 #define OMAP4_STD_FUSE_DIE_ID_2    0x220C
62 #define OMAP4_STD_FUSE_DIE_ID_3    0x2210
63 #define OMAP4_STD_FUSE_PROD_ID_0   0x2214
64 #define OMAP4_STD_FUSE_PROD_ID_1   0x2218
65 
66 #define OMAP3_ID_CODE              0xA204
67 
68 static uint32_t chip_revision = 0xffffffff;
69 
70 /**
71  *	ti_revision - Returns the revision number of the device
72  *
73  *	Simply returns an identifier for the revision of the chip we are running
74  *	on.
75  *
76  *	RETURNS
77  *	A 32-bit identifier for the current chip
78  */
79 uint32_t
80 ti_revision(void)
81 {
82 	return chip_revision;
83 }
84 
85 /**
86  *	omap4_get_revision - determines omap4 revision
87  *
88  *	Reads the registers to determine the revision of the chip we are currently
89  *	running on.  Stores the information in global variables.
90  *
91  *
92  */
93 static void
94 omap4_get_revision(void)
95 {
96 	uint32_t id_code;
97 	uint32_t revision;
98 	uint32_t hawkeye;
99 	bus_space_handle_t bsh;
100 
101 	/* The chip revsion is read from the device identification registers and
102 	 * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to
103 	 * 0x4A00_2218.  This is part of the L4_CORE memory range and should have
104 	 * been mapped in by the machdep.c code.
105 	 *
106 	 *   STD_FUSE_DIE_ID_0    0x4A00 2200
107 	 *   ID_CODE              0x4A00 2204   (this is the only one we need)
108 	 *   STD_FUSE_DIE_ID_1    0x4A00 2208
109 	 *   STD_FUSE_DIE_ID_2    0x4A00 220C
110 	 *   STD_FUSE_DIE_ID_3    0x4A00 2210
111 	 *   STD_FUSE_PROD_ID_0   0x4A00 2214
112 	 *   STD_FUSE_PROD_ID_1   0x4A00 2218
113 	 */
114 	/* FIXME Should we map somewhere else? */
115 	bus_space_map(fdtbus_bs_tag,OMAP44XX_L4_CORE_HWBASE, 0x4000, 0, &bsh);
116 	id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP4_ID_CODE);
117 	bus_space_unmap(fdtbus_bs_tag, bsh, 0x4000);
118 
119 	hawkeye = ((id_code >> 12) & 0xffff);
120 	revision = ((id_code >> 28) & 0xf);
121 
122 	/* Apparently according to the linux code there were some ES2.0 samples that
123 	 * have the wrong id code and report themselves as ES1.0 silicon.  So used
124 	 * the ARM cpuid to get the correct revision.
125 	 */
126 	if (revision == 0) {
127 		id_code = cpu_ident();
128 		revision = (id_code & 0xf) - 1;
129 	}
130 
131 	switch (hawkeye) {
132 	case 0xB852:
133 		switch (revision) {
134 		case 0:
135 			chip_revision = OMAP4430_REV_ES1_0;
136 			break;
137 		case 1:
138 			chip_revision = OMAP4430_REV_ES2_1;
139 			break;
140 		default:
141 			chip_revision = OMAP4430_REV_UNKNOWN;
142 			break;
143 		}
144 		break;
145 
146 	case 0xB95C:
147 		switch (revision) {
148 		case 3:
149 			chip_revision = OMAP4430_REV_ES2_1;
150 			break;
151 		case 4:
152 			chip_revision = OMAP4430_REV_ES2_2;
153 			break;
154 		case 6:
155 			chip_revision = OMAP4430_REV_ES2_3;
156 			break;
157 		default:
158 			chip_revision = OMAP4430_REV_UNKNOWN;
159 			break;
160 		}
161 		break;
162 
163 	case 0xB94E:
164 		switch (revision) {
165 		case 0:
166 			chip_revision = OMAP4460_REV_ES1_0;
167 			break;
168 		case 2:
169 			chip_revision = OMAP4460_REV_ES1_1;
170 			break;
171 		default:
172 			chip_revision = OMAP4460_REV_UNKNOWN;
173 			break;
174 		}
175 		break;
176 
177 	case 0xB975:
178 		switch (revision) {
179 		case 0:
180 			chip_revision = OMAP4470_REV_ES1_0;
181 			break;
182 		default:
183 			chip_revision = OMAP4470_REV_UNKNOWN;
184 			break;
185 		}
186 		break;
187 
188 	default:
189 		/* Default to the latest revision if we can't determine type */
190 		chip_revision = OMAP_UNKNOWN_DEV;
191 		break;
192 	}
193 	if (chip_revision != OMAP_UNKNOWN_DEV) {
194 		printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n",
195 		    OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision),
196 		    OMAP_REV_MINOR(chip_revision));
197 	}
198 	else {
199 		printf("Texas Instruments unknown OMAP chip: %04x, rev %d\n",
200 		    hawkeye, revision);
201 	}
202 }
203 
204 static void
205 am335x_get_revision(void)
206 {
207 	uint32_t dev_feature;
208 	char cpu_last_char;
209 	bus_space_handle_t bsh;
210 	int major;
211 	int minor;
212 
213 	bus_space_map(fdtbus_bs_tag, AM335X_CONTROL_BASE, AM335X_CONTROL_SIZE, 0, &bsh);
214 	chip_revision = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEVICE_ID);
215 	dev_feature = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEV_FEATURE);
216 	bus_space_unmap(fdtbus_bs_tag, bsh, AM335X_CONTROL_SIZE);
217 
218 	switch (dev_feature) {
219 		case 0x00FF0382:
220 			cpu_last_char='2';
221 			break;
222 		case 0x20FF0382:
223 			cpu_last_char='4';
224 			break;
225 		case 0x00FF0383:
226 			cpu_last_char='6';
227 			break;
228 		case 0x00FE0383:
229 			cpu_last_char='7';
230 			break;
231 		case 0x20FF0383:
232 			cpu_last_char='8';
233 			break;
234 		case 0x20FE0383:
235 			cpu_last_char='9';
236 			break;
237 		default:
238 			cpu_last_char='x';
239 	}
240 
241 	switch(AM335X_DEVREV(chip_revision)) {
242 		case 0:
243 			major = 1;
244 			minor = 0;
245 			break;
246 		case 1:
247 			major = 2;
248 			minor = 0;
249 			break;
250 		case 2:
251 			major = 2;
252 			minor = 1;
253 			break;
254 		default:
255 			major = 0;
256 			minor = AM335X_DEVREV(chip_revision);
257 			break;
258 	}
259 	printf("Texas Instruments AM335%c Processor, Revision ES%u.%u\n",
260 		cpu_last_char, major, minor);
261 }
262 
263 /**
264  *	ti_cpu_ident - attempts to identify the chip we are running on
265  *	@dummy: ignored
266  *
267  *	This function is called before any of the driver are initialised, however
268  *	the basic virt to phys maps have been setup in machdep.c so we can still
269  *	access the required registers, we just have to use direct register reads
270  *	and writes rather than going through the bus stuff.
271  *
272  *
273  */
274 static void
275 ti_cpu_ident(void *dummy)
276 {
277 	if (!ti_soc_is_supported())
278 		return;
279 	switch(ti_chip()) {
280 	case CHIP_OMAP_4:
281 		omap4_get_revision();
282 		break;
283 	case CHIP_AM335X:
284 		am335x_get_revision();
285 		break;
286 	default:
287 		panic("Unknown chip type, fixme!\n");
288 	}
289 }
290 
291 SYSINIT(ti_cpu_ident, SI_SUB_CPU, SI_ORDER_SECOND, ti_cpu_ident, NULL);
292