xref: /freebsd/sys/arm/ti/ti_cpuid.c (revision bdd1243df58e60e85101c09001d9812a789b6bc4)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2011
5  *	Ben Gray <ben.r.gray@gmail.com>.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/bus.h>
38 #include <sys/resource.h>
39 #include <sys/rman.h>
40 #include <sys/lock.h>
41 #include <sys/mutex.h>
42 
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 #include <machine/fdt.h>
46 #include <machine/resource.h>
47 #include <machine/intr.h>
48 
49 #include <dev/fdt/simplebus.h>
50 #include <dev/fdt/fdt_common.h>
51 #include <dev/ofw/ofw_bus_subr.h>
52 
53 #include <arm/ti/tivar.h>
54 #include <arm/ti/ti_cpuid.h>
55 
56 #include <arm/ti/omap4/omap4_reg.h>
57 #include <arm/ti/am335x/am335x_reg.h>
58 
59 #define OMAP4_STD_FUSE_DIE_ID_0    0x2200
60 #define OMAP4_ID_CODE              0x2204
61 #define OMAP4_STD_FUSE_DIE_ID_1    0x2208
62 #define OMAP4_STD_FUSE_DIE_ID_2    0x220C
63 #define OMAP4_STD_FUSE_DIE_ID_3    0x2210
64 #define OMAP4_STD_FUSE_PROD_ID_0   0x2214
65 #define OMAP4_STD_FUSE_PROD_ID_1   0x2218
66 
67 #define OMAP3_ID_CODE              0xA204
68 
69 static uint32_t chip_revision = 0xffffffff;
70 
71 /**
72  *	ti_revision - Returns the revision number of the device
73  *
74  *	Simply returns an identifier for the revision of the chip we are running
75  *	on.
76  *
77  *	RETURNS
78  *	A 32-bit identifier for the current chip
79  */
80 uint32_t
81 ti_revision(void)
82 {
83 	return chip_revision;
84 }
85 
86 /**
87  *	omap4_get_revision - determines omap4 revision
88  *
89  *	Reads the registers to determine the revision of the chip we are currently
90  *	running on.  Stores the information in global variables.
91  *
92  *
93  */
94 static void
95 omap4_get_revision(void)
96 {
97 	uint32_t id_code;
98 	uint32_t revision;
99 	uint32_t hawkeye;
100 	bus_space_handle_t bsh;
101 
102 	/* The chip revsion is read from the device identification registers and
103 	 * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to
104 	 * 0x4A00_2218.  This is part of the L4_CORE memory range and should have
105 	 * been mapped in by the machdep.c code.
106 	 *
107 	 *   STD_FUSE_DIE_ID_0    0x4A00 2200
108 	 *   ID_CODE              0x4A00 2204   (this is the only one we need)
109 	 *   STD_FUSE_DIE_ID_1    0x4A00 2208
110 	 *   STD_FUSE_DIE_ID_2    0x4A00 220C
111 	 *   STD_FUSE_DIE_ID_3    0x4A00 2210
112 	 *   STD_FUSE_PROD_ID_0   0x4A00 2214
113 	 *   STD_FUSE_PROD_ID_1   0x4A00 2218
114 	 */
115 	/* FIXME Should we map somewhere else? */
116 	bus_space_map(fdtbus_bs_tag,OMAP44XX_L4_CORE_HWBASE, 0x4000, 0, &bsh);
117 	id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP4_ID_CODE);
118 	bus_space_unmap(fdtbus_bs_tag, bsh, 0x4000);
119 
120 	hawkeye = ((id_code >> 12) & 0xffff);
121 	revision = ((id_code >> 28) & 0xf);
122 
123 	/* Apparently according to the linux code there were some ES2.0 samples that
124 	 * have the wrong id code and report themselves as ES1.0 silicon.  So used
125 	 * the ARM cpuid to get the correct revision.
126 	 */
127 	if (revision == 0) {
128 		id_code = cp15_midr_get();
129 		revision = (id_code & 0xf) - 1;
130 	}
131 
132 	switch (hawkeye) {
133 	case 0xB852:
134 		switch (revision) {
135 		case 0:
136 			chip_revision = OMAP4430_REV_ES1_0;
137 			break;
138 		case 1:
139 			chip_revision = OMAP4430_REV_ES2_1;
140 			break;
141 		default:
142 			chip_revision = OMAP4430_REV_UNKNOWN;
143 			break;
144 		}
145 		break;
146 
147 	case 0xB95C:
148 		switch (revision) {
149 		case 3:
150 			chip_revision = OMAP4430_REV_ES2_1;
151 			break;
152 		case 4:
153 			chip_revision = OMAP4430_REV_ES2_2;
154 			break;
155 		case 6:
156 			chip_revision = OMAP4430_REV_ES2_3;
157 			break;
158 		default:
159 			chip_revision = OMAP4430_REV_UNKNOWN;
160 			break;
161 		}
162 		break;
163 
164 	case 0xB94E:
165 		switch (revision) {
166 		case 0:
167 			chip_revision = OMAP4460_REV_ES1_0;
168 			break;
169 		case 2:
170 			chip_revision = OMAP4460_REV_ES1_1;
171 			break;
172 		default:
173 			chip_revision = OMAP4460_REV_UNKNOWN;
174 			break;
175 		}
176 		break;
177 
178 	case 0xB975:
179 		switch (revision) {
180 		case 0:
181 			chip_revision = OMAP4470_REV_ES1_0;
182 			break;
183 		default:
184 			chip_revision = OMAP4470_REV_UNKNOWN;
185 			break;
186 		}
187 		break;
188 
189 	default:
190 		/* Default to the latest revision if we can't determine type */
191 		chip_revision = OMAP_UNKNOWN_DEV;
192 		break;
193 	}
194 	if (chip_revision != OMAP_UNKNOWN_DEV) {
195 		printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n",
196 		    OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision),
197 		    OMAP_REV_MINOR(chip_revision));
198 	}
199 	else {
200 		printf("Texas Instruments unknown OMAP chip: %04x, rev %d\n",
201 		    hawkeye, revision);
202 	}
203 }
204 
205 static void
206 am335x_get_revision(void)
207 {
208 	uint32_t dev_feature;
209 	char cpu_last_char;
210 	bus_space_handle_t bsh;
211 	int major;
212 	int minor;
213 
214 	bus_space_map(fdtbus_bs_tag, AM335X_CONTROL_BASE, AM335X_CONTROL_SIZE, 0, &bsh);
215 	chip_revision = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEVICE_ID);
216 	dev_feature = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEV_FEATURE);
217 	bus_space_unmap(fdtbus_bs_tag, bsh, AM335X_CONTROL_SIZE);
218 
219 	switch (dev_feature) {
220 		case 0x00FF0382:
221 			cpu_last_char='2';
222 			break;
223 		case 0x20FF0382:
224 			cpu_last_char='4';
225 			break;
226 		case 0x00FF0383:
227 			cpu_last_char='6';
228 			break;
229 		case 0x00FE0383:
230 			cpu_last_char='7';
231 			break;
232 		case 0x20FF0383:
233 			cpu_last_char='8';
234 			break;
235 		case 0x20FE0383:
236 			cpu_last_char='9';
237 			break;
238 		default:
239 			cpu_last_char='x';
240 	}
241 
242 	switch(AM335X_DEVREV(chip_revision)) {
243 		case 0:
244 			major = 1;
245 			minor = 0;
246 			break;
247 		case 1:
248 			major = 2;
249 			minor = 0;
250 			break;
251 		case 2:
252 			major = 2;
253 			minor = 1;
254 			break;
255 		default:
256 			major = 0;
257 			minor = AM335X_DEVREV(chip_revision);
258 			break;
259 	}
260 	printf("Texas Instruments AM335%c Processor, Revision ES%u.%u\n",
261 		cpu_last_char, major, minor);
262 }
263 
264 /**
265  *	ti_cpu_ident - attempts to identify the chip we are running on
266  *	@dummy: ignored
267  *
268  *	This function is called before any of the driver are initialised, however
269  *	the basic virt to phys maps have been setup in machdep.c so we can still
270  *	access the required registers, we just have to use direct register reads
271  *	and writes rather than going through the bus stuff.
272  *
273  *
274  */
275 static void
276 ti_cpu_ident(void *dummy)
277 {
278 	if (!ti_soc_is_supported())
279 		return;
280 	switch(ti_chip()) {
281 	case CHIP_OMAP_4:
282 		omap4_get_revision();
283 		break;
284 	case CHIP_AM335X:
285 		am335x_get_revision();
286 		break;
287 	default:
288 		panic("Unknown chip type, fixme!\n");
289 	}
290 }
291 
292 SYSINIT(ti_cpu_ident, SI_SUB_CPU, SI_ORDER_SECOND, ti_cpu_ident, NULL);
293