1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2011 5 * Ben Gray <ben.r.gray@gmail.com>. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/module.h> 34 #include <sys/bus.h> 35 #include <sys/resource.h> 36 #include <sys/rman.h> 37 #include <sys/lock.h> 38 #include <sys/mutex.h> 39 40 #include <machine/bus.h> 41 #include <machine/cpu.h> 42 #include <machine/fdt.h> 43 #include <machine/resource.h> 44 #include <machine/intr.h> 45 46 #include <dev/fdt/simplebus.h> 47 #include <dev/fdt/fdt_common.h> 48 #include <dev/ofw/ofw_bus_subr.h> 49 50 #include <arm/ti/tivar.h> 51 #include <arm/ti/ti_cpuid.h> 52 53 #include <arm/ti/omap4/omap4_reg.h> 54 #include <arm/ti/am335x/am335x_reg.h> 55 56 #define OMAP4_STD_FUSE_DIE_ID_0 0x2200 57 #define OMAP4_ID_CODE 0x2204 58 #define OMAP4_STD_FUSE_DIE_ID_1 0x2208 59 #define OMAP4_STD_FUSE_DIE_ID_2 0x220C 60 #define OMAP4_STD_FUSE_DIE_ID_3 0x2210 61 #define OMAP4_STD_FUSE_PROD_ID_0 0x2214 62 #define OMAP4_STD_FUSE_PROD_ID_1 0x2218 63 64 #define OMAP3_ID_CODE 0xA204 65 66 static uint32_t chip_revision = 0xffffffff; 67 68 /** 69 * ti_revision - Returns the revision number of the device 70 * 71 * Simply returns an identifier for the revision of the chip we are running 72 * on. 73 * 74 * RETURNS 75 * A 32-bit identifier for the current chip 76 */ 77 uint32_t 78 ti_revision(void) 79 { 80 return chip_revision; 81 } 82 83 /** 84 * omap4_get_revision - determines omap4 revision 85 * 86 * Reads the registers to determine the revision of the chip we are currently 87 * running on. Stores the information in global variables. 88 * 89 * 90 */ 91 static void 92 omap4_get_revision(void) 93 { 94 uint32_t id_code; 95 uint32_t revision; 96 uint32_t hawkeye; 97 bus_space_handle_t bsh; 98 99 /* The chip revsion is read from the device identification registers and 100 * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to 101 * 0x4A00_2218. This is part of the L4_CORE memory range and should have 102 * been mapped in by the machdep.c code. 103 * 104 * STD_FUSE_DIE_ID_0 0x4A00 2200 105 * ID_CODE 0x4A00 2204 (this is the only one we need) 106 * STD_FUSE_DIE_ID_1 0x4A00 2208 107 * STD_FUSE_DIE_ID_2 0x4A00 220C 108 * STD_FUSE_DIE_ID_3 0x4A00 2210 109 * STD_FUSE_PROD_ID_0 0x4A00 2214 110 * STD_FUSE_PROD_ID_1 0x4A00 2218 111 */ 112 /* FIXME Should we map somewhere else? */ 113 bus_space_map(fdtbus_bs_tag,OMAP44XX_L4_CORE_HWBASE, 0x4000, 0, &bsh); 114 id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP4_ID_CODE); 115 bus_space_unmap(fdtbus_bs_tag, bsh, 0x4000); 116 117 hawkeye = ((id_code >> 12) & 0xffff); 118 revision = ((id_code >> 28) & 0xf); 119 120 /* Apparently according to the linux code there were some ES2.0 samples that 121 * have the wrong id code and report themselves as ES1.0 silicon. So used 122 * the ARM cpuid to get the correct revision. 123 */ 124 if (revision == 0) { 125 id_code = cp15_midr_get(); 126 revision = (id_code & 0xf) - 1; 127 } 128 129 switch (hawkeye) { 130 case 0xB852: 131 switch (revision) { 132 case 0: 133 chip_revision = OMAP4430_REV_ES1_0; 134 break; 135 case 1: 136 chip_revision = OMAP4430_REV_ES2_1; 137 break; 138 default: 139 chip_revision = OMAP4430_REV_UNKNOWN; 140 break; 141 } 142 break; 143 144 case 0xB95C: 145 switch (revision) { 146 case 3: 147 chip_revision = OMAP4430_REV_ES2_1; 148 break; 149 case 4: 150 chip_revision = OMAP4430_REV_ES2_2; 151 break; 152 case 6: 153 chip_revision = OMAP4430_REV_ES2_3; 154 break; 155 default: 156 chip_revision = OMAP4430_REV_UNKNOWN; 157 break; 158 } 159 break; 160 161 case 0xB94E: 162 switch (revision) { 163 case 0: 164 chip_revision = OMAP4460_REV_ES1_0; 165 break; 166 case 2: 167 chip_revision = OMAP4460_REV_ES1_1; 168 break; 169 default: 170 chip_revision = OMAP4460_REV_UNKNOWN; 171 break; 172 } 173 break; 174 175 case 0xB975: 176 switch (revision) { 177 case 0: 178 chip_revision = OMAP4470_REV_ES1_0; 179 break; 180 default: 181 chip_revision = OMAP4470_REV_UNKNOWN; 182 break; 183 } 184 break; 185 186 default: 187 /* Default to the latest revision if we can't determine type */ 188 chip_revision = OMAP_UNKNOWN_DEV; 189 break; 190 } 191 if (chip_revision != OMAP_UNKNOWN_DEV) { 192 printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n", 193 OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision), 194 OMAP_REV_MINOR(chip_revision)); 195 } 196 else { 197 printf("Texas Instruments unknown OMAP chip: %04x, rev %d\n", 198 hawkeye, revision); 199 } 200 } 201 202 static void 203 am335x_get_revision(void) 204 { 205 uint32_t dev_feature; 206 char cpu_last_char; 207 bus_space_handle_t bsh; 208 int major; 209 int minor; 210 211 bus_space_map(fdtbus_bs_tag, AM335X_CONTROL_BASE, AM335X_CONTROL_SIZE, 0, &bsh); 212 chip_revision = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEVICE_ID); 213 dev_feature = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEV_FEATURE); 214 bus_space_unmap(fdtbus_bs_tag, bsh, AM335X_CONTROL_SIZE); 215 216 switch (dev_feature) { 217 case 0x00FF0382: 218 cpu_last_char='2'; 219 break; 220 case 0x20FF0382: 221 cpu_last_char='4'; 222 break; 223 case 0x00FF0383: 224 cpu_last_char='6'; 225 break; 226 case 0x00FE0383: 227 cpu_last_char='7'; 228 break; 229 case 0x20FF0383: 230 cpu_last_char='8'; 231 break; 232 case 0x20FE0383: 233 cpu_last_char='9'; 234 break; 235 default: 236 cpu_last_char='x'; 237 } 238 239 switch(AM335X_DEVREV(chip_revision)) { 240 case 0: 241 major = 1; 242 minor = 0; 243 break; 244 case 1: 245 major = 2; 246 minor = 0; 247 break; 248 case 2: 249 major = 2; 250 minor = 1; 251 break; 252 default: 253 major = 0; 254 minor = AM335X_DEVREV(chip_revision); 255 break; 256 } 257 printf("Texas Instruments AM335%c Processor, Revision ES%u.%u\n", 258 cpu_last_char, major, minor); 259 } 260 261 /** 262 * ti_cpu_ident - attempts to identify the chip we are running on 263 * @dummy: ignored 264 * 265 * This function is called before any of the driver are initialised, however 266 * the basic virt to phys maps have been setup in machdep.c so we can still 267 * access the required registers, we just have to use direct register reads 268 * and writes rather than going through the bus stuff. 269 * 270 * 271 */ 272 static void 273 ti_cpu_ident(void *dummy) 274 { 275 if (!ti_soc_is_supported()) 276 return; 277 switch(ti_chip()) { 278 case CHIP_OMAP_4: 279 omap4_get_revision(); 280 break; 281 case CHIP_AM335X: 282 am335x_get_revision(); 283 break; 284 default: 285 panic("Unknown chip type, fixme!\n"); 286 } 287 } 288 289 SYSINIT(ti_cpu_ident, SI_SUB_CPU, SI_ORDER_SECOND, ti_cpu_ident, NULL); 290