xref: /freebsd/sys/arm/ti/ti_cpuid.c (revision 734e82fe33aa764367791a7d603b383996c6b40b)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2011
5  *	Ben Gray <ben.r.gray@gmail.com>.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #include <sys/cdefs.h>
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/bus.h>
36 #include <sys/resource.h>
37 #include <sys/rman.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 
41 #include <machine/bus.h>
42 #include <machine/cpu.h>
43 #include <machine/fdt.h>
44 #include <machine/resource.h>
45 #include <machine/intr.h>
46 
47 #include <dev/fdt/simplebus.h>
48 #include <dev/fdt/fdt_common.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 
51 #include <arm/ti/tivar.h>
52 #include <arm/ti/ti_cpuid.h>
53 
54 #include <arm/ti/omap4/omap4_reg.h>
55 #include <arm/ti/am335x/am335x_reg.h>
56 
57 #define OMAP4_STD_FUSE_DIE_ID_0    0x2200
58 #define OMAP4_ID_CODE              0x2204
59 #define OMAP4_STD_FUSE_DIE_ID_1    0x2208
60 #define OMAP4_STD_FUSE_DIE_ID_2    0x220C
61 #define OMAP4_STD_FUSE_DIE_ID_3    0x2210
62 #define OMAP4_STD_FUSE_PROD_ID_0   0x2214
63 #define OMAP4_STD_FUSE_PROD_ID_1   0x2218
64 
65 #define OMAP3_ID_CODE              0xA204
66 
67 static uint32_t chip_revision = 0xffffffff;
68 
69 /**
70  *	ti_revision - Returns the revision number of the device
71  *
72  *	Simply returns an identifier for the revision of the chip we are running
73  *	on.
74  *
75  *	RETURNS
76  *	A 32-bit identifier for the current chip
77  */
78 uint32_t
79 ti_revision(void)
80 {
81 	return chip_revision;
82 }
83 
84 /**
85  *	omap4_get_revision - determines omap4 revision
86  *
87  *	Reads the registers to determine the revision of the chip we are currently
88  *	running on.  Stores the information in global variables.
89  *
90  *
91  */
92 static void
93 omap4_get_revision(void)
94 {
95 	uint32_t id_code;
96 	uint32_t revision;
97 	uint32_t hawkeye;
98 	bus_space_handle_t bsh;
99 
100 	/* The chip revsion is read from the device identification registers and
101 	 * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to
102 	 * 0x4A00_2218.  This is part of the L4_CORE memory range and should have
103 	 * been mapped in by the machdep.c code.
104 	 *
105 	 *   STD_FUSE_DIE_ID_0    0x4A00 2200
106 	 *   ID_CODE              0x4A00 2204   (this is the only one we need)
107 	 *   STD_FUSE_DIE_ID_1    0x4A00 2208
108 	 *   STD_FUSE_DIE_ID_2    0x4A00 220C
109 	 *   STD_FUSE_DIE_ID_3    0x4A00 2210
110 	 *   STD_FUSE_PROD_ID_0   0x4A00 2214
111 	 *   STD_FUSE_PROD_ID_1   0x4A00 2218
112 	 */
113 	/* FIXME Should we map somewhere else? */
114 	bus_space_map(fdtbus_bs_tag,OMAP44XX_L4_CORE_HWBASE, 0x4000, 0, &bsh);
115 	id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP4_ID_CODE);
116 	bus_space_unmap(fdtbus_bs_tag, bsh, 0x4000);
117 
118 	hawkeye = ((id_code >> 12) & 0xffff);
119 	revision = ((id_code >> 28) & 0xf);
120 
121 	/* Apparently according to the linux code there were some ES2.0 samples that
122 	 * have the wrong id code and report themselves as ES1.0 silicon.  So used
123 	 * the ARM cpuid to get the correct revision.
124 	 */
125 	if (revision == 0) {
126 		id_code = cp15_midr_get();
127 		revision = (id_code & 0xf) - 1;
128 	}
129 
130 	switch (hawkeye) {
131 	case 0xB852:
132 		switch (revision) {
133 		case 0:
134 			chip_revision = OMAP4430_REV_ES1_0;
135 			break;
136 		case 1:
137 			chip_revision = OMAP4430_REV_ES2_1;
138 			break;
139 		default:
140 			chip_revision = OMAP4430_REV_UNKNOWN;
141 			break;
142 		}
143 		break;
144 
145 	case 0xB95C:
146 		switch (revision) {
147 		case 3:
148 			chip_revision = OMAP4430_REV_ES2_1;
149 			break;
150 		case 4:
151 			chip_revision = OMAP4430_REV_ES2_2;
152 			break;
153 		case 6:
154 			chip_revision = OMAP4430_REV_ES2_3;
155 			break;
156 		default:
157 			chip_revision = OMAP4430_REV_UNKNOWN;
158 			break;
159 		}
160 		break;
161 
162 	case 0xB94E:
163 		switch (revision) {
164 		case 0:
165 			chip_revision = OMAP4460_REV_ES1_0;
166 			break;
167 		case 2:
168 			chip_revision = OMAP4460_REV_ES1_1;
169 			break;
170 		default:
171 			chip_revision = OMAP4460_REV_UNKNOWN;
172 			break;
173 		}
174 		break;
175 
176 	case 0xB975:
177 		switch (revision) {
178 		case 0:
179 			chip_revision = OMAP4470_REV_ES1_0;
180 			break;
181 		default:
182 			chip_revision = OMAP4470_REV_UNKNOWN;
183 			break;
184 		}
185 		break;
186 
187 	default:
188 		/* Default to the latest revision if we can't determine type */
189 		chip_revision = OMAP_UNKNOWN_DEV;
190 		break;
191 	}
192 	if (chip_revision != OMAP_UNKNOWN_DEV) {
193 		printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n",
194 		    OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision),
195 		    OMAP_REV_MINOR(chip_revision));
196 	}
197 	else {
198 		printf("Texas Instruments unknown OMAP chip: %04x, rev %d\n",
199 		    hawkeye, revision);
200 	}
201 }
202 
203 static void
204 am335x_get_revision(void)
205 {
206 	uint32_t dev_feature;
207 	char cpu_last_char;
208 	bus_space_handle_t bsh;
209 	int major;
210 	int minor;
211 
212 	bus_space_map(fdtbus_bs_tag, AM335X_CONTROL_BASE, AM335X_CONTROL_SIZE, 0, &bsh);
213 	chip_revision = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEVICE_ID);
214 	dev_feature = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEV_FEATURE);
215 	bus_space_unmap(fdtbus_bs_tag, bsh, AM335X_CONTROL_SIZE);
216 
217 	switch (dev_feature) {
218 		case 0x00FF0382:
219 			cpu_last_char='2';
220 			break;
221 		case 0x20FF0382:
222 			cpu_last_char='4';
223 			break;
224 		case 0x00FF0383:
225 			cpu_last_char='6';
226 			break;
227 		case 0x00FE0383:
228 			cpu_last_char='7';
229 			break;
230 		case 0x20FF0383:
231 			cpu_last_char='8';
232 			break;
233 		case 0x20FE0383:
234 			cpu_last_char='9';
235 			break;
236 		default:
237 			cpu_last_char='x';
238 	}
239 
240 	switch(AM335X_DEVREV(chip_revision)) {
241 		case 0:
242 			major = 1;
243 			minor = 0;
244 			break;
245 		case 1:
246 			major = 2;
247 			minor = 0;
248 			break;
249 		case 2:
250 			major = 2;
251 			minor = 1;
252 			break;
253 		default:
254 			major = 0;
255 			minor = AM335X_DEVREV(chip_revision);
256 			break;
257 	}
258 	printf("Texas Instruments AM335%c Processor, Revision ES%u.%u\n",
259 		cpu_last_char, major, minor);
260 }
261 
262 /**
263  *	ti_cpu_ident - attempts to identify the chip we are running on
264  *	@dummy: ignored
265  *
266  *	This function is called before any of the driver are initialised, however
267  *	the basic virt to phys maps have been setup in machdep.c so we can still
268  *	access the required registers, we just have to use direct register reads
269  *	and writes rather than going through the bus stuff.
270  *
271  *
272  */
273 static void
274 ti_cpu_ident(void *dummy)
275 {
276 	if (!ti_soc_is_supported())
277 		return;
278 	switch(ti_chip()) {
279 	case CHIP_OMAP_4:
280 		omap4_get_revision();
281 		break;
282 	case CHIP_AM335X:
283 		am335x_get_revision();
284 		break;
285 	default:
286 		panic("Unknown chip type, fixme!\n");
287 	}
288 }
289 
290 SYSINIT(ti_cpu_ident, SI_SUB_CPU, SI_ORDER_SECOND, ti_cpu_ident, NULL);
291