1 /*- 2 * Copyright 2014 Luiz Otavio O Souza <loos@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #ifndef _TI_ADCVAR_H_ 28 #define _TI_ADCVAR_H_ 29 30 #define TI_ADC_NPINS 8 31 32 #define ADC_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg) 33 #define ADC_WRITE4(_sc, reg, value) \ 34 bus_write_4((_sc)->sc_mem_res, reg, value) 35 36 struct ti_adc_softc { 37 device_t sc_dev; 38 int sc_last_state; 39 struct mtx sc_mtx; 40 struct resource *sc_mem_res; 41 struct resource *sc_irq_res; 42 void *sc_intrhand; 43 int sc_tsc_wires; 44 int sc_tsc_wire_config[TI_ADC_NPINS]; 45 int sc_coord_readouts; 46 int sc_x_plate_resistance; 47 int sc_charge_delay; 48 int sc_adc_nchannels; 49 int sc_adc_channels[TI_ADC_NPINS]; 50 int sc_xp_bit, sc_xp_inp; 51 int sc_xn_bit, sc_xn_inp; 52 int sc_yp_bit, sc_yp_inp; 53 int sc_yn_bit, sc_yn_inp; 54 uint32_t sc_tsc_enabled; 55 int sc_pen_down; 56 #ifdef EVDEV_SUPPORT 57 int sc_x; 58 int sc_y; 59 struct evdev_dev *sc_evdev; 60 #endif 61 }; 62 63 struct ti_adc_input { 64 int32_t enable; /* input enabled */ 65 int32_t samples; /* samples average */ 66 int32_t input; /* input number */ 67 int32_t value; /* raw converted value */ 68 uint32_t stepconfig; /* step config register */ 69 uint32_t stepdelay; /* step delay register */ 70 struct ti_adc_softc *sc; /* pointer to adc softc */ 71 }; 72 73 #define TI_ADC_LOCK(_sc) \ 74 mtx_lock(&(_sc)->sc_mtx) 75 #define TI_ADC_UNLOCK(_sc) \ 76 mtx_unlock(&(_sc)->sc_mtx) 77 #define TI_ADC_LOCK_INIT(_sc) \ 78 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 79 "ti_adc", MTX_DEF) 80 #define TI_ADC_LOCK_DESTROY(_sc) \ 81 mtx_destroy(&_sc->sc_mtx); 82 #define TI_ADC_LOCK_ASSERT(_sc) \ 83 mtx_assert(&(_sc)->sc_mtx, MA_OWNED) 84 85 #endif /* _TI_ADCVAR_H_ */ 86