1 /*- 2 * Copyright (c) 2016 Svatopluk Kraus 3 * Copyright (c) 2016 Michal Meloun 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 #include <sys/param.h> 30 #include <sys/bus.h> 31 #include <sys/conf.h> 32 #include <sys/kernel.h> 33 #include <sys/module.h> 34 #include <sys/rman.h> 35 #include <sys/systm.h> 36 37 #include <machine/fdt.h> 38 #include <machine/intr.h> 39 #include <machine/resource.h> 40 41 #include <dev/ofw/ofw_bus.h> 42 #include <dev/ofw/ofw_bus_subr.h> 43 44 #include "pic_if.h" 45 46 static struct ofw_compat_data compat_data[] = { 47 {"ti,omap4-wugen-mpu", 1}, 48 {NULL, 0} 49 }; 50 51 struct omap4_wugen_sc { 52 device_t sc_dev; 53 struct resource *sc_mem_res; 54 device_t sc_parent; 55 }; 56 57 static int 58 omap4_wugen_activate_intr(device_t dev, struct intr_irqsrc *isrc, 59 struct resource *res, struct intr_map_data *data) 60 { 61 struct omap4_wugen_sc *sc = device_get_softc(dev); 62 63 return (PIC_ACTIVATE_INTR(sc->sc_parent, isrc, res, data)); 64 } 65 66 static void 67 omap4_wugen_disable_intr(device_t dev, struct intr_irqsrc *isrc) 68 { 69 struct omap4_wugen_sc *sc = device_get_softc(dev); 70 71 PIC_DISABLE_INTR(sc->sc_parent, isrc); 72 } 73 74 static void 75 omap4_wugen_enable_intr(device_t dev, struct intr_irqsrc *isrc) 76 { 77 struct omap4_wugen_sc *sc = device_get_softc(dev); 78 79 PIC_ENABLE_INTR(sc->sc_parent, isrc); 80 } 81 82 static int 83 omap4_wugen_map_intr(device_t dev, struct intr_map_data *data, 84 struct intr_irqsrc **isrcp) 85 { 86 struct omap4_wugen_sc *sc = device_get_softc(dev); 87 88 return (PIC_MAP_INTR(sc->sc_parent, data, isrcp)); 89 } 90 91 static int 92 omap4_wugen_deactivate_intr(device_t dev, struct intr_irqsrc *isrc, 93 struct resource *res, struct intr_map_data *data) 94 { 95 struct omap4_wugen_sc *sc = device_get_softc(dev); 96 97 return (PIC_DEACTIVATE_INTR(sc->sc_parent, isrc, res, data)); 98 } 99 100 static int 101 omap4_wugen_setup_intr(device_t dev, struct intr_irqsrc *isrc, 102 struct resource *res, struct intr_map_data *data) 103 { 104 struct omap4_wugen_sc *sc = device_get_softc(dev); 105 106 return (PIC_SETUP_INTR(sc->sc_parent, isrc, res, data)); 107 } 108 109 static int 110 omap4_wugen_teardown_intr(device_t dev, struct intr_irqsrc *isrc, 111 struct resource *res, struct intr_map_data *data) 112 { 113 struct omap4_wugen_sc *sc = device_get_softc(dev); 114 115 return (PIC_TEARDOWN_INTR(sc->sc_parent, isrc, res, data)); 116 } 117 118 static void 119 omap4_wugen_pre_ithread(device_t dev, struct intr_irqsrc *isrc) 120 { 121 struct omap4_wugen_sc *sc = device_get_softc(dev); 122 123 PIC_PRE_ITHREAD(sc->sc_parent, isrc); 124 } 125 126 static void 127 omap4_wugen_post_ithread(device_t dev, struct intr_irqsrc *isrc) 128 { 129 struct omap4_wugen_sc *sc = device_get_softc(dev); 130 131 PIC_POST_ITHREAD(sc->sc_parent, isrc); 132 } 133 134 static void 135 omap4_wugen_post_filter(device_t dev, struct intr_irqsrc *isrc) 136 { 137 struct omap4_wugen_sc *sc = device_get_softc(dev); 138 139 PIC_POST_FILTER(sc->sc_parent, isrc); 140 } 141 142 #ifdef SMP 143 static int 144 omap4_wugen_bind_intr(device_t dev, struct intr_irqsrc *isrc) 145 { 146 struct omap4_wugen_sc *sc = device_get_softc(dev); 147 148 return (PIC_BIND_INTR(sc->sc_parent, isrc)); 149 } 150 #endif 151 152 static int 153 omap4_wugen_probe(device_t dev) 154 { 155 156 if (!ofw_bus_status_okay(dev)) 157 return (ENXIO); 158 159 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 160 return (ENXIO); 161 162 return (BUS_PROBE_DEFAULT); 163 } 164 165 static int 166 omap4_wugen_detach(device_t dev) 167 { 168 struct omap4_wugen_sc *sc; 169 170 sc = device_get_softc(dev); 171 if (sc->sc_mem_res != NULL) { 172 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 173 sc->sc_mem_res = NULL; 174 } 175 return (0); 176 } 177 178 static int 179 omap4_wugen_attach(device_t dev) 180 { 181 struct omap4_wugen_sc *sc; 182 phandle_t node; 183 phandle_t parent_xref; 184 int rid, rv; 185 186 sc = device_get_softc(dev); 187 sc->sc_dev = dev; 188 node = ofw_bus_get_node(dev); 189 190 rv = OF_getencprop(node, "interrupt-parent", &parent_xref, 191 sizeof(parent_xref)); 192 if (rv <= 0) { 193 device_printf(dev, "can't read parent node property\n"); 194 goto fail; 195 } 196 sc->sc_parent = OF_device_from_xref(parent_xref); 197 if (sc->sc_parent == NULL) { 198 device_printf(dev, "can't find parent controller\n"); 199 goto fail; 200 } 201 202 rid = 0; 203 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 204 RF_ACTIVE); 205 if (sc->sc_mem_res == NULL) { 206 device_printf(dev, "can't allocate resources\n"); 207 return (ENXIO); 208 } 209 210 if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) { 211 device_printf(dev, "can't register PIC\n"); 212 goto fail; 213 } 214 return (0); 215 216 fail: 217 omap4_wugen_detach(dev); 218 return (ENXIO); 219 } 220 221 static device_method_t omap4_wugen_methods[] = { 222 DEVMETHOD(device_probe, omap4_wugen_probe), 223 DEVMETHOD(device_attach, omap4_wugen_attach), 224 DEVMETHOD(device_detach, omap4_wugen_detach), 225 226 /* Interrupt controller interface */ 227 DEVMETHOD(pic_activate_intr, omap4_wugen_activate_intr), 228 DEVMETHOD(pic_disable_intr, omap4_wugen_disable_intr), 229 DEVMETHOD(pic_enable_intr, omap4_wugen_enable_intr), 230 DEVMETHOD(pic_map_intr, omap4_wugen_map_intr), 231 DEVMETHOD(pic_deactivate_intr, omap4_wugen_deactivate_intr), 232 DEVMETHOD(pic_setup_intr, omap4_wugen_setup_intr), 233 DEVMETHOD(pic_teardown_intr, omap4_wugen_teardown_intr), 234 DEVMETHOD(pic_pre_ithread, omap4_wugen_pre_ithread), 235 DEVMETHOD(pic_post_ithread, omap4_wugen_post_ithread), 236 DEVMETHOD(pic_post_filter, omap4_wugen_post_filter), 237 #ifdef SMP 238 DEVMETHOD(pic_bind_intr, omap4_wugen_bind_intr), 239 #endif 240 DEVMETHOD_END 241 }; 242 243 DEFINE_CLASS_0(omap4_wugen, omap4_wugen_driver, omap4_wugen_methods, 244 sizeof(struct omap4_wugen_sc)); 245 EARLY_DRIVER_MODULE(omap4_wugen, simplebus, omap4_wugen_driver, NULL, NULL, 246 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE + 1); 247