1 /*- 2 * Copyright (c) 2016 Svatopluk Kraus 3 * Copyright (c) 2016 Michal Meloun 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/bus.h> 33 #include <sys/conf.h> 34 #include <sys/kernel.h> 35 #include <sys/module.h> 36 #include <sys/rman.h> 37 #include <sys/systm.h> 38 39 #include <machine/fdt.h> 40 #include <machine/intr.h> 41 #include <machine/resource.h> 42 43 #include <dev/ofw/ofw_bus.h> 44 #include <dev/ofw/ofw_bus_subr.h> 45 46 #include "pic_if.h" 47 48 static struct ofw_compat_data compat_data[] = { 49 {"ti,omap4-wugen-mpu", 1}, 50 {NULL, 0} 51 }; 52 53 struct omap4_wugen_sc { 54 device_t sc_dev; 55 struct resource *sc_mem_res; 56 device_t sc_parent; 57 }; 58 59 static int 60 omap4_wugen_register(device_t dev, struct intr_irqsrc *isrc, 61 boolean_t *is_percpu) 62 { 63 struct omap4_wugen_sc *sc = device_get_softc(dev); 64 65 return (PIC_REGISTER(sc->sc_parent, isrc, is_percpu)); 66 } 67 68 static int 69 omap4_wugen_unregister(device_t dev, struct intr_irqsrc *isrc) 70 { 71 struct omap4_wugen_sc *sc = device_get_softc(dev); 72 73 return (PIC_UNREGISTER(sc->sc_parent, isrc)); 74 } 75 76 static void 77 omap4_wugen_enable_source(device_t dev, struct intr_irqsrc *isrc) 78 { 79 struct omap4_wugen_sc *sc = device_get_softc(dev); 80 81 PIC_ENABLE_SOURCE(sc->sc_parent, isrc); 82 } 83 84 static void 85 omap4_wugen_disable_source(device_t dev, struct intr_irqsrc *isrc) 86 { 87 struct omap4_wugen_sc *sc = device_get_softc(dev); 88 89 PIC_DISABLE_SOURCE(sc->sc_parent, isrc); 90 } 91 92 static void 93 omap4_wugen_enable_intr(device_t dev, struct intr_irqsrc *isrc) 94 { 95 struct omap4_wugen_sc *sc = device_get_softc(dev); 96 97 PIC_ENABLE_INTR(sc->sc_parent, isrc); 98 } 99 100 static void 101 omap4_wugen_pre_ithread(device_t dev, struct intr_irqsrc *isrc) 102 { 103 struct omap4_wugen_sc *sc = device_get_softc(dev); 104 105 PIC_PRE_ITHREAD(sc->sc_parent, isrc); 106 } 107 108 109 static void 110 omap4_wugen_post_ithread(device_t dev, struct intr_irqsrc *isrc) 111 { 112 struct omap4_wugen_sc *sc = device_get_softc(dev); 113 114 PIC_POST_ITHREAD(sc->sc_parent, isrc); 115 } 116 117 static void 118 omap4_wugen_post_filter(device_t dev, struct intr_irqsrc *isrc) 119 { 120 struct omap4_wugen_sc *sc = device_get_softc(dev); 121 122 PIC_POST_FILTER(sc->sc_parent, isrc); 123 } 124 125 #ifdef SMP 126 static int 127 omap4_wugen_bind(device_t dev, struct intr_irqsrc *isrc) 128 { 129 struct omap4_wugen_sc *sc = device_get_softc(dev); 130 131 return (PIC_BIND(sc->sc_parent, isrc)); 132 } 133 #endif 134 135 static int 136 omap4_wugen_probe(device_t dev) 137 { 138 139 if (!ofw_bus_status_okay(dev)) 140 return (ENXIO); 141 142 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 143 return (ENXIO); 144 145 return (BUS_PROBE_DEFAULT); 146 } 147 148 static int 149 omap4_wugen_detach(device_t dev) 150 { 151 struct omap4_wugen_sc *sc; 152 153 sc = device_get_softc(dev); 154 if (sc->sc_mem_res != NULL) { 155 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 156 sc->sc_mem_res = NULL; 157 } 158 return (0); 159 } 160 161 static int 162 omap4_wugen_attach(device_t dev) 163 { 164 struct omap4_wugen_sc *sc; 165 phandle_t node; 166 phandle_t parent_xref; 167 int rid, rv; 168 169 sc = device_get_softc(dev); 170 sc->sc_dev = dev; 171 node = ofw_bus_get_node(dev); 172 173 rv = OF_getencprop(node, "interrupt-parent", &parent_xref, 174 sizeof(parent_xref)); 175 if (rv <= 0) { 176 device_printf(dev, "can't read parent node property\n"); 177 goto fail; 178 } 179 sc->sc_parent = OF_device_from_xref(parent_xref); 180 if (sc->sc_parent == NULL) { 181 device_printf(dev, "can't find parent controller\n"); 182 goto fail; 183 } 184 185 rid = 0; 186 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 187 RF_ACTIVE); 188 if (sc->sc_mem_res == NULL) { 189 device_printf(dev, "can't allocate resources\n"); 190 return (ENXIO); 191 } 192 193 if (intr_pic_register(dev, OF_xref_from_node(node)) != 0) { 194 device_printf(dev, "can't register PIC\n"); 195 goto fail; 196 } 197 return (0); 198 199 fail: 200 omap4_wugen_detach(dev); 201 return (ENXIO); 202 } 203 204 static device_method_t omap4_wugen_methods[] = { 205 DEVMETHOD(device_probe, omap4_wugen_probe), 206 DEVMETHOD(device_attach, omap4_wugen_attach), 207 DEVMETHOD(device_detach, omap4_wugen_detach), 208 209 /* Interrupt controller interface */ 210 DEVMETHOD(pic_register, omap4_wugen_register), 211 DEVMETHOD(pic_unregister, omap4_wugen_unregister), 212 DEVMETHOD(pic_enable_source, omap4_wugen_enable_source), 213 DEVMETHOD(pic_disable_source, omap4_wugen_disable_source), 214 DEVMETHOD(pic_enable_intr, omap4_wugen_enable_intr), 215 DEVMETHOD(pic_pre_ithread, omap4_wugen_pre_ithread), 216 DEVMETHOD(pic_post_ithread, omap4_wugen_post_ithread), 217 DEVMETHOD(pic_post_filter, omap4_wugen_post_filter), 218 #ifdef SMP 219 DEVMETHOD(pic_bind, omap4_wugen_bind), 220 #endif 221 DEVMETHOD_END 222 }; 223 devclass_t omap4_wugen_devclass; 224 DEFINE_CLASS_0(omap4_wugen, omap4_wugen_driver, omap4_wugen_methods, 225 sizeof(struct omap4_wugen_sc)); 226 EARLY_DRIVER_MODULE(omap4_wugen, simplebus, omap4_wugen_driver, 227 omap4_wugen_devclass, NULL, NULL, 228 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE + 1); 229