1 /*- 2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _IF_CPSWVAR_H 30 #define _IF_CPSWVAR_H 31 32 #define CPSW_PORTS 2 33 #define CPSW_INTR_COUNT 4 34 35 /* MII BUS */ 36 #define CPSW_MIIBUS_RETRIES 5 37 #define CPSW_MIIBUS_DELAY 1000 38 39 #define CPSW_MAX_ALE_ENTRIES 1024 40 41 #define CPSW_SYSCTL_COUNT 34 42 43 struct cpsw_slot { 44 uint32_t bd_offset; /* Offset of corresponding BD within CPPI RAM. */ 45 bus_dmamap_t dmamap; 46 struct ifnet *ifp; 47 struct mbuf *mbuf; 48 STAILQ_ENTRY(cpsw_slot) next; 49 }; 50 STAILQ_HEAD(cpsw_slots, cpsw_slot); 51 52 struct cpsw_queue { 53 struct mtx lock; 54 int running; 55 struct cpsw_slots active; 56 struct cpsw_slots avail; 57 uint32_t queue_adds; /* total bufs added */ 58 uint32_t queue_removes; /* total bufs removed */ 59 uint32_t queue_removes_at_last_tick; /* Used by watchdog */ 60 int queue_slots; 61 int active_queue_len; 62 int max_active_queue_len; 63 int avail_queue_len; 64 int max_avail_queue_len; 65 int longest_chain; /* Largest # segments in a single packet. */ 66 int hdp_offset; 67 }; 68 69 struct cpsw_port { 70 device_t dev; 71 int phy; 72 int vlan; 73 }; 74 75 struct cpsw_softc { 76 device_t dev; 77 int active_slave; 78 int debug; 79 int dualemac; 80 phandle_t node; 81 struct bintime attach_uptime; /* system uptime when attach happened. */ 82 struct cpsw_port port[2]; 83 84 /* RX and TX buffer tracking */ 85 struct cpsw_queue rx, tx; 86 87 /* We expect 1 memory resource and 4 interrupts from the device tree. */ 88 int mem_rid; 89 struct resource *mem_res; 90 struct resource *irq_res[CPSW_INTR_COUNT]; 91 void *ih_cookie[CPSW_INTR_COUNT]; 92 93 /* An mbuf full of nulls for TX padding. */ 94 bus_dmamap_t null_mbuf_dmamap; 95 struct mbuf *null_mbuf; 96 bus_addr_t null_mbuf_paddr; 97 98 bus_dma_tag_t mbuf_dtag; 99 100 struct { 101 int resets; 102 int timer; 103 struct callout callout; 104 } watchdog; 105 106 /* 64-bit versions of 32-bit hardware statistics counters */ 107 uint64_t shadow_stats[CPSW_SYSCTL_COUNT]; 108 109 /* CPPI STATERAM has 512 slots for building TX/RX queues. */ 110 /* TODO: Size here supposedly varies with different versions 111 of the controller. Check DaVinci specs and find a good 112 way to adjust this. One option is to have a separate 113 Device Tree parameter for number slots; another option 114 is to calculate it from the memory size in the device tree. */ 115 struct cpsw_slot _slots[CPSW_CPPI_RAM_SIZE / sizeof(struct cpsw_cpdma_bd)]; 116 struct cpsw_slots avail; 117 }; 118 119 struct cpswp_softc { 120 device_t dev; 121 device_t miibus; 122 device_t pdev; 123 int media_status; 124 int unit; 125 int vlan; 126 struct bintime init_uptime; /* system uptime when init happened. */ 127 struct callout mii_callout; 128 struct cpsw_softc *swsc; 129 struct ifnet *ifp; 130 struct mii_data *mii; 131 struct mtx lock; 132 uint32_t if_flags; 133 uint32_t phy; 134 uint32_t phyaccess; 135 uint32_t physel; 136 }; 137 138 #endif /*_IF_CPSWVAR_H */ 139