xref: /freebsd/sys/arm/ti/cpsw/if_cpswvar.h (revision 640235e2c2ba32947f7c59d168437ffa1280f1e6)
1 /*-
2  * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 #ifndef	_IF_CPSWVAR_H
30 #define	_IF_CPSWVAR_H
31 
32 #define	CPSW_PORTS		2
33 #define	CPSW_INTR_COUNT		4
34 
35 /* MII BUS  */
36 #define	CPSW_MIIBUS_RETRIES	5
37 #define	CPSW_MIIBUS_DELAY	1000
38 
39 #define	CPSW_MAX_ALE_ENTRIES	1024
40 
41 #define	CPSW_SYSCTL_COUNT	34
42 
43 struct cpsw_slot {
44 	uint32_t bd_offset;  /* Offset of corresponding BD within CPPI RAM. */
45 	bus_dmamap_t dmamap;
46 	struct ifnet *ifp;
47 	struct mbuf *mbuf;
48 	STAILQ_ENTRY(cpsw_slot) next;
49 };
50 STAILQ_HEAD(cpsw_slots, cpsw_slot);
51 
52 struct cpsw_queue {
53 	struct mtx	lock;
54 	int		running;
55 	struct cpsw_slots active;
56 	struct cpsw_slots avail;
57 	uint32_t	queue_adds; /* total bufs added */
58 	uint32_t	queue_removes; /* total bufs removed */
59 	uint32_t	queue_removes_at_last_tick; /* Used by watchdog */
60 	int		queue_slots;
61 	int		active_queue_len;
62 	int		max_active_queue_len;
63 	int		avail_queue_len;
64 	int		max_avail_queue_len;
65 	int		longest_chain; /* Largest # segments in a single packet. */
66 	int		hdp_offset;
67 };
68 
69 struct cpsw_port {
70 	device_t	dev;
71 	int		phy;
72 	int		vlan;
73 };
74 
75 struct cpsw_softc {
76 	device_t	dev;
77 	int		active_slave;
78 	int		debug;
79 	int		dualemac;
80 	phandle_t	node;
81 	struct bintime	attach_uptime; /* system uptime when attach happened. */
82 	struct cpsw_port port[2];
83 
84 	/* RX and TX buffer tracking */
85 	struct cpsw_queue rx, tx;
86 	uint32_t	last_hdp;
87 
88 	/* We expect 1 memory resource and 4 interrupts from the device tree. */
89 	int		mem_rid;
90 	struct resource	*mem_res;
91 	struct resource	*irq_res[CPSW_INTR_COUNT];
92 	void		*ih_cookie[CPSW_INTR_COUNT];
93 
94 	/* An mbuf full of nulls for TX padding. */
95 	bus_dmamap_t null_mbuf_dmamap;
96 	struct mbuf *null_mbuf;
97 	bus_addr_t null_mbuf_paddr;
98 
99 	bus_dma_tag_t	mbuf_dtag;
100 
101 	struct {
102 		int resets;
103 		int timer;
104 		struct callout  callout;
105 	} watchdog;
106 
107 	/* 64-bit versions of 32-bit hardware statistics counters */
108 	uint64_t shadow_stats[CPSW_SYSCTL_COUNT];
109 
110 	/* CPPI STATERAM has 512 slots for building TX/RX queues. */
111 	/* TODO: Size here supposedly varies with different versions
112 	   of the controller.  Check DaVinci specs and find a good
113 	   way to adjust this.  One option is to have a separate
114 	   Device Tree parameter for number slots; another option
115 	   is to calculate it from the memory size in the device tree. */
116 	struct cpsw_slot _slots[CPSW_CPPI_RAM_SIZE / sizeof(struct cpsw_cpdma_bd)];
117 	struct cpsw_slots avail;
118 };
119 
120 struct cpswp_softc {
121 	device_t	dev;
122 	device_t	miibus;
123 	device_t	pdev;
124 	int		media_status;
125 	int		unit;
126 	int		vlan;
127 	struct bintime	init_uptime; /* system uptime when init happened. */
128 	struct callout	mii_callout;
129 	struct cpsw_softc *swsc;
130 	struct ifnet	*ifp;
131 	struct mii_data	*mii;
132 	struct mtx	lock;
133 	uint32_t	if_flags;
134 	uint32_t	phy;
135 	uint32_t	phyaccess;
136 	uint32_t	physel;
137 };
138 
139 #endif /*_IF_CPSWVAR_H */
140