1 /*- 2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _IF_CPSWVAR_H 30 #define _IF_CPSWVAR_H 31 32 #define CPSW_PORTS 2 33 #define CPSW_INTR_COUNT 4 34 35 /* MII BUS */ 36 #define CPSW_MIIBUS_RETRIES 5 37 #define CPSW_MIIBUS_DELAY 1000 38 39 #define CPSW_MAX_ALE_ENTRIES 1024 40 41 #define CPSW_SYSCTL_COUNT 34 42 43 struct cpsw_slot { 44 uint32_t bd_offset; /* Offset of corresponding BD within CPPI RAM. */ 45 bus_dmamap_t dmamap; 46 struct ifnet *ifp; 47 struct mbuf *mbuf; 48 STAILQ_ENTRY(cpsw_slot) next; 49 }; 50 STAILQ_HEAD(cpsw_slots, cpsw_slot); 51 52 struct cpsw_queue { 53 struct mtx lock; 54 int running; 55 int teardown; 56 struct cpsw_slots active; 57 struct cpsw_slots avail; 58 uint32_t queue_adds; /* total bufs added */ 59 uint32_t queue_removes; /* total bufs removed */ 60 uint32_t queue_removes_at_last_tick; /* Used by watchdog */ 61 uint32_t queue_restart; 62 int queue_slots; 63 int active_queue_len; 64 int max_active_queue_len; 65 int avail_queue_len; 66 int max_avail_queue_len; 67 int longest_chain; /* Largest # segments in a single packet. */ 68 int hdp_offset; 69 }; 70 71 struct cpsw_port { 72 device_t dev; 73 int phy; 74 int vlan; 75 }; 76 77 struct cpsw_softc { 78 device_t dev; 79 int active_slave; 80 int debug; 81 int dualemac; 82 int rx_batch; 83 phandle_t node; 84 struct bintime attach_uptime; /* system uptime when attach happened. */ 85 struct cpsw_port port[2]; 86 unsigned coal_us; 87 88 /* RX and TX buffer tracking */ 89 struct cpsw_queue rx, tx; 90 91 /* We expect 1 memory resource and 4 interrupts from the device tree. */ 92 int mem_rid; 93 struct resource *mem_res; 94 struct resource *irq_res[CPSW_INTR_COUNT]; 95 void *ih_cookie[CPSW_INTR_COUNT]; 96 97 /* An mbuf full of nulls for TX padding. */ 98 bus_dmamap_t null_mbuf_dmamap; 99 struct mbuf *null_mbuf; 100 bus_addr_t null_mbuf_paddr; 101 102 bus_dma_tag_t mbuf_dtag; 103 104 struct { 105 int resets; 106 int timer; 107 struct callout callout; 108 } watchdog; 109 110 /* 64-bit versions of 32-bit hardware statistics counters */ 111 uint64_t shadow_stats[CPSW_SYSCTL_COUNT]; 112 113 /* CPPI STATERAM has 512 slots for building TX/RX queues. */ 114 /* TODO: Size here supposedly varies with different versions 115 of the controller. Check DaVinci specs and find a good 116 way to adjust this. One option is to have a separate 117 Device Tree parameter for number slots; another option 118 is to calculate it from the memory size in the device tree. */ 119 struct cpsw_slot _slots[CPSW_CPPI_RAM_SIZE / sizeof(struct cpsw_cpdma_bd)]; 120 struct cpsw_slots avail; 121 }; 122 123 struct cpswp_softc { 124 device_t dev; 125 device_t miibus; 126 device_t pdev; 127 int media_status; 128 int unit; 129 int vlan; 130 struct bintime init_uptime; /* system uptime when init happened. */ 131 struct callout mii_callout; 132 struct cpsw_softc *swsc; 133 struct ifnet *ifp; 134 struct mii_data *mii; 135 struct mtx lock; 136 uint32_t if_flags; 137 uint32_t phy; 138 uint32_t phyaccess; 139 uint32_t physel; 140 }; 141 142 #endif /*_IF_CPSWVAR_H */ 143